MMC Based HVDC System Harikrishnan K, Rinku scaria

Transcription

1 MM ased HVD Syste Harkrshnan K, Rnku scara bstract Ths paper presents odellng and sulaton of a hgh oltage HVD transsson syste. Instead of usng conentonal oltage source conerter Modular ultleel conerter s used n ths syste ths paper presents a generalzed atheatcal odel for MM n realstc HVD applcatons. In the odel, as the nuber of leels n the conerter ncreases, consequently, the nuber of redundant swtchng states ncreases. Ths thess has proded a dc capactor oltage balancng ethod for ultleel conerters that n each saple of te selects the proper redundant swtchng states to sole the oltage drftng proble at the dc capactors. Fro the sulaton results, t s obsered that the deeloped ethod s able to equalze the dc sde capactor oltages wthout usng any addtonal power crcuts. ased on the sulatons, t s shown that aong all the swtchng strateges, the proded balancng ethod leads to better capactor oltage balancng at the sde and also better haronc spectru for output oltage at the ac sde. The a of ths project was the analyss of a Modular Multleel onerter (MM) for HVD applcatons. The odellng of control schee of The proposed syste s sulated usng MTL/SIMULIK software. Index Ters HVD, VS (oltage source conerter), MM (odular ultleel conerter). I. ITRODUTIO The deelopent of new technologes and deces durng the th century enhanced the nterest n electrc power systes. Modern clzaton based hs operaton on an ncreasng energy deand and on the substtutons of huan acttes wth coplex and sophstcated achnes; thus, studes on electrc power generaton and conerson deces becoe eery day ore and ore portant. The recent attenton n enronent protecton and preseraton ncreased the nterest n electrcal power generaton fro renewable sources: wnd power systes and solar systes are dffusng and are supposed to occupy an ncreasngly portant role n worldwde energy producton n cong years. ot only house utltes, but ndustral applcatons and een the electrcal network requreents dsplay the portance that energy supply and control wll hae n the future researches. s a consequence, power conerson and secondly control s requred to be relable, safe and aalable n order to accoplsh all requreents, both fro users and legal regulatons, and to reduce the enronental pact. Voltage Source onerter (VS) technology s becong coon n hgholtage drect current (HVD) transsson systes (especally transsson of offshore wnd power, aong others). HVD transsson technology s an portant and effcent possblty to transt hgh powers oer long dstances. II. MODULR MULTILEVEL OVERTER Modular ultleel conerter s a type of oltage source conerter whch conerts ac oltage nto dc oltage. The odular ultleel conerter (MM) was frst ntroduced n []. Ths conerter s an eergng cascaded ultleel conerter wth coon dc bus, and consdered sutable for VSHVD transsson [4] []. MM s well scalable to hgholtage leels of power transsson based on cascade connecton of ultple sub odules (SMs) per ar [4], whch also eans a hgh nuber of output oltage leels (e.g., Trans ay able Project s at 4 kv dc oltage, and about SMs per ar [6]). The hgh nuber of oltage leels prodes hgh qualty output oltage wth low coonode oltage, also known as zerosequence oltage n a threephase ac syste []. Thus, only sall or een no flters are requred. nother adantage of the hghleel nuber s that low swtchng frequency odulaton schee can be adopted to reduce seconductor swtchng losses. III. DESRIPTIO D PRIIPLE OF OPERTIO OF MM Fg. Scheatc of a threephase Modular Multleel onerter The typcal structure of a MM s shown n Fg., and the confguraton of a SubModule (SM) s gen n Fg.. Each SM s a sple chopper cell coposed of two IGT swtches (T and T), two antparallel dodes (D and D) and a capactor. Each phase leg of the conerter has two ars, each one consttuted by a nuber of SMs. In each ar there s also a sall nductor to copensate for the oltage dfference between upper and lower ars produced when a SM s swtched n or out. Wth reference to the SM shown n Fg.., the output oltage U s gen by, U = Uc f T s O and T s OFF U = f T s OFF and T s O Where Uc s the nstantaneous capactor oltage. The confguraton wth T and T both O should not be consdered because t deternes a short crcut across the capactor. lso the confguraton wth T and T both OFF s not useful as t produces dfferent output oltages dependng

2 on the current drecton. Fg. 4 shows the current flows n both useful states. In a MM the nuber of steps of the output oltage s related to the nuber of seres connected SMs. In order to show how the oltage leels are generated, n the followng, reference s ade to the sple three leel MM confguratons shown n Fg 4. ust be used alternately. The oltage waefor generated by the three leel conerters s shown n Fg.5. Fg.5 Voltage waefor of a ThreeLeel onerter The prncple of operaton can be extended to any ultleel confguraton as the one represented n Fg..6. Fg. hopper cell of a SubModule Fg. States of SM and current paths Fg.6 Scheatc of one phase of MultLeel onerter In ths type of nerter, the only states that hae no redundant confguratons are the two states that generate the axu poste and negate oltages, UD/ and UD/. For generatng the other leels, n general there are seeral possble swtchng confguratons that can be selected n order to keep the capactor oltages balanced. In MM of Fg. 6, the swtchng sequence s controlled so that at each nstant only SMs (.e. half of the SMs of a phase leg) are n the onstate. s an exaple, f at a gen nstant n the upper ar SMs fro to are n the onstate, n the lower ar only one SM wll be n onstate. It s clear that there are seeral possble swtchng confguratons. Equal oltage sharng aong the capactor of each ar can be acheed by a selecton algorth of nserted or bypassed SMs durng each saplng perod of the control syste. typcal oltage waefor of a ultleel conerter s shown n Fg. 7 Fg.4 Scheatc of one phase of ThreeLeel onerter In ths case, n order to get the poste output, UD/, the two upper SMs and are bypassed. ccordngly, for the negate output, UD/, the two lower SMs and 4 are bypassed. The zero state can be obtaned through two possble swtch confguratons. The frst one s when the two SMs n the ddle of a leg ( and ) are bypassed, and the second one s when the end SMs of a leg ( and 4) s bypassed. It has to be noted that the current flows through the SMS that are not by passed deternng the chargng or dschargng of the capactors dependng on the current drecton. Therefore, n order to keep the capactor oltages balanced, both zero states Fg.7 Voltage waefor of a MultLeel onerter IV. MM MODEL The typcal structure of an MM, shown n Fg., can be suarzed nto leels: I. subodules SM (the lower leel, usually hopper cells) II. ar (second leel of the conerter, half of the legphase) III. leg (can be consdered one phase)

3 If a twoleel control structure s consdered, for nstance a MasterSlae structure, lower leel of control s assgned to subodels (leel I), nstead upper leel of control deals wth arleg oltage and currents control (leel II, III). It s assued that a lower leel control for the subodules s present ensurng that all capactors are equally charged. s suggested n [], ost of exstng nestgatons and sulatons are based on swtched or dscrete odels. Howeer, dscrete odels hae two an dsadantages: a) Dscrete odels do not allow an analytcal approach to odel the conerter and to desgn the control syste; b) uercal soluton of coplex conerter confguratons usng a hgh nuber of SMs requres consderable sulaton te. contnuous odel can oercoe these dsadantages. Therefore, to clearly understand the operaton of ths conerter t s necessary to wrte the oltagecurrent equatons and to deterne a contnuous odel sutable to desgn a control schee. In the followng, an analyss s carred out wth the a to control the upper and lower ar oltages, usng the contnuous odel presented n [8], that consders only one conerter phase and s based on tearable capactors. V. MTHEMTIL MODEL OF MM onsderng a conerter wth subodules per ar, each ar can be controlled wth an nserton ndex (odulaton ndex) n(t), where n(t)= eans that all subodules n the ar are bypassed, on the other sde n(t)= eans that all the subodules n the ar are nserted. Ideal capactance of the ar should be: ar ar nt () (..) (..) Where the apex eans the nuber of the ar (for nstance, n a threephase conerter =,,,..,6). It would be possble to hae a full representaton of the MM conerter, ncludng operaton of each subodule, but ths approach tends to be farly coplcated and not easy to be used as a base for control schees deelopent. spler way would be to consder a contnuous odel, but portant assuptons are necessary n order to deelop ths approach:. the swtchng frequency s uch hgher than the frequency of the output oltage. The resoluton of the output oltage s sall, copared to the apltude of the output oltage (.e. hgh nuber of subodules) ssung and, t s possble to create a contnuous odel whch represents the oerall operaton of the conerter, neglectng the sngle subodules behaor: ths type of odel s sutable for control syste desgn and akes t possble to focus on the energy stored n the conerter and ts balance between ars. The splfed odel s shown n Fg. 8 Fg 8 Splfed rcut Used for the nalyss gan, apex represent the ar, n(t) s the nserton ndex, nstead ucσ(t) s the su of all capactance oltage n the ar. Then equatons (..) and (..) follow u c n( t) u ( t) d uc ( t) ( t) dt c ar (..) wth n(t) (..) Wth reference to Fg 9, where only one phase s consdered, t s possble to wrte a set of equatons for currents: currents fro upper and lower ars, respectely U and L, wll consttute the output current V. the dff current represents the current that crculates fro the phase leg to the D lnk (and/or to another phase leg). V U L dff U (..) These equatons are representng the deal condton n whch the contrbutons of upper and lower ars to the output current are equal. The dfference current s ntroduced to consder the possble stuaton n whch the capactors are not equally charged to the reference alue. In ths MM confguraton the su of all capactor oltages of one ar s assued to be equal to the D Voltage. Equatons (..4) and (..5) are just ephaszng the contrbutons of upper and lower ars n ters of oltage and current du U dt du () t () t n U U ar n (..4) (..5) L L L Wth all these equatons ar and the splfed crcut shown n dt Fg. 9, t s possble to wrte equatons (..6) and (..7) as sple Krchhoff oltage equatons du RU L nu uu uv dt dl R L n u u dt L L L L V (..6) (..7)

4 Subtractng equaton (..7) to (..6), and substtutng the followng equatons d dt dt dt U d d L dff (..8) t s possble to obtan ths dynac equaton of the current dff : ddff R nu nl dff u U u L dt L L L L (..9) Fro equatons (..6) and (..7)substtutng U and L wth the expressons gen n (..) two dynac equatons of upper and lower ar oltages are obtaned dul nl nl ar dff ar V dt (..) Fro (..) t can be noted that wth dff equal to zero, the load current acts n order to unbalance the upper and lower ar oltages. In steady state condtons the load current s changng assung poste and negate alues, then, the te derate of the ar oltages are also changng, and n deal condtons the ar oltage should oscllate around a constant ean alue. The presence of non dealtes and losses ay lead the conerter to be unstable. s a consequence, t can be concluded that only the presence of a sutable dfference current allows the conerter to operate correctly. Usng (..9) and (..) a dynac and contnuous odel s thus obtaned and shown R nu nl L L L dff dff d nu nu u V U ar u U ar dt u L ul n L nlv ar ar ssung that a snusodal output oltage s desred, the reference sgnal for odulaton s ( t) ˆ cos( t) (..) nd the deal ternal oltage s gen by uv ( t) ( t) (..) In order to sole the syste of equatons (..) the load current should be known. Here, the followng alternatng current s assued as the output load current ( t) ˆ ( t)cos( t ) V V (..4) Where φ s the load phase angle and s arbtrary. Usng the reference sgnal n (..) the odulaton ndces for upper and lower ars can be expressed as t ( ) nu () t t ( ) nl () t (..5) (..6) It can note that the su of upper and lower odulaton ndexes s always equal to. s a consequence, assung the capactor oltages of all odules equal to the reference alue, the su of the oltages of upper and lower ars s always equal to the D oltage. In real operatng condtons the capactor oltages wll not be exactly equal to the reference alue and as a result a dfference oltage wll be present forcng a dfference current to flow between the leg and the D source. sutable control of ths current s crucal for acheng a correct operaton of the conerter and an equal sharng of the D oltage aong all odules. possble control strategy s the one based on addng an offset oltage to upper and lower ar oltages uu and ul defned trough (..5) and (..6). Ths offset oltage (udff) s deterned wth soe crtera aed to keep the odule oltages as close as possble to the reference alue or to keep the energy stored n upper and lower capactors equalzed. It wll be shown n the next secton that udff wll not affect the ternal oltage (as uv s related to the dfference between upper and lower ar oltages), but wll pact on dff current nstead. The nuber of leels that can be obtaned depends on the assuptons ade for the analyss. When assung a constant D oltage, actually t s possble to generate output oltages hang a nuber of leels equal to, whereas the nuber of leels ust be reduced to f the D oltage has to be kept under control by the conerter tself. Ths s the stuaton that occurs n HVD systes coposed by two MMs connectng the two ends of a D cable. In ths case there s no D capactor between the D oltage ternals and a D oltage controller s necessary. In ths analyss a constant D oltage wll be assued as the a s to deelop a strategy for keepng under control the total energy stored n each leg and the unbalance between the energy stored n upper and lower ars. VI. OTROL STRTEGY It s necessary to ake an portant reark: the equatons wrote and dscussed n preous secton lead to a contnuous odel, sutable for analyss and understandng of operaton prncple of the MM. On the other hand, fro the control pont of ew, these equatons are not easy to use: een f t s possble to decouple contnuous and alternate coponent of dfferental current, n order to properly track references, nonlnear couplngs ake really coplex adanced control structures. eglectng ths low pass flter t s possble to consder that nput arables are a square nput for the syste: ths condton akes ore dffcult the deelopent 4

5 / / Scope Scope urrent Measureent urrent Measureent Seres RL ranch Voltage Measureent Scope urrent Measureent Seres RL ranch Scope Seres RL ranch 6 5 odule 9 TRL OMM TRL TRL TRL OMM OMM OMM odule odule odule 5 V V V V 4 neg V V V V pos of adanced control strateges and the study of coplex control strateges. Thus, a dfferent approach n the odelng wll be deeloped n order to splfy the analyss fro the control pont of ew. Two dfferent loops wll be pleented, the frst one to control the oerall energy of the MM leg, the second to control the balance between upper and lower ars of the phaseleg. The nteracton between two loops ay lead to nstablty: because of the nonlnear confguraton of syste equatons, t s hard to analyze systes couplng properly (for nstance Relate Gan rray analyss). It s howeer edent that total energy and energy balance nteracts dynacally n syste operaton: n order to ake a decouplng, balance of energy loop s tuned n order to be greatly slower than the oerall energy loop. Ths frequency decouplng wll hghly beneft dfferental current waefor: f not perfored, oerall energy and balance nteracton leads to a really dstorted dfferental current. Ths current, flowng n the phaseleg, would produce a oltage drop on the phase pedance, ncreasng losses and dsturbances n the stablty of the syste. VII. OVERTER OPERTIO MODEL The frst syste pleented n MTLSulnk ncludes only the equatons n (..), but t s howeer portant to understand the operaton of the conerter: n partcular, the necessty of controllng the dfferental current and thus the energy stored n upper and lower ar becoes clear. In ths sulaton, output oltage and current are posed and the operaton of the syste s then obsered: odulaton ndexes are calculated deally, neglectng dfferental oltage usage (no control strategy s pleented yet) and neglectng also the oltage drop of the output current on the ar paraeters. VIII. OTROL Fg. shows the scheatc dagra of an MMHVD syste. When asyetrcal faults occur at the ac syste, there wll be negate and zerosequence coponents n grd oltages. In conentonal conerters wth concentrated energy storage capactors at the dc sde (e.g., twoleel conerter), only poste and negatesequence current coponents are fully controllable. Thus, the conerter transforer s connected n the Y/Δ confguraton to exclude the zerosequence coponents fro the conerter. Howeer, zerosequence coponents wll appear n the eent of asyetrcal faults on the conerter sde of the conerter transforer. On the other hand, zerosequence coponents are unaodable n transforer less schee under asyetrcal fault condtons. In MM, the dstrbuted locaton of energy storage capactors perts ndependent control of each phase. Thus, a zero sequence current control becoes possble n addton to the poste and negatesequence current control. Fg 9. Model of MM for HVD syste alculate the upper and lower ar current. Output oltage and current, and other syste paraeters are lsted below n Table. Table Lst of syste paraeters Fg.. Scheatc dagra of an MMbased HVD syste. ontrol of Poste and egatesequence urrents If there are no zerosequence coponents, only poste and negatesequence coponents are taken nto consderaton. The poste and negatesequence current control of conentonal conerters (e.g., twoleel conerter and threeleel P conerter), whch s explaned can be drectly appled to MM; therefore, a bref descrpton s gen here. The control schee s dded nto two separate loops: an nner fast current loop and an outer slow loop Inner Loop urrent ontrol: The nner current control s deeloped to regulate the poste and negatesequence currents at ther coand references by adjustng the control nputs respectely. The 5

6 lower ar current upper & lower ar current dfference upper ar current / / Scope Scope urrent Measureent urrent Measureent Seres RL ranch Voltage Measureent Scope urrent Measureent Seres RL ranch Scope Seres RL ranch 6 5 odule 9 TRL OMM TRL TRL OMM OMM TRL OMM odule odule odule 5 V V V V 4 neg V V V V pos dsturbance nputs could be canceled by feedforward copensaton Outer Loop ontrol for onentonal onerters: The outer loop control s desgned to prode the coand references for the nner loop current control. Two dfferent power controllers hae been proposed for conentonal conerters under unbalanced condtons [5]. The power controller s deeloped to elnate negate sequence urrent coponents by settng ther coand references as zero [9], [5]. The power controller s deeloped to elnate the double lne frequency rpple n dcsde oltage by cancelng the double lne frequency rpple n the threephase real power nput to the conerter Outer Loop Power ontroller for MM: In conentonal conerters (e.g., twoleel conerter and threeleel P conerter), the dcsde oltage s supported by centralzed energy storage capactors arranged at the dc sde. The poste and negatesequence coponents of the power rpple n each phase, whch are crculatng between three phases, hae no effect on the threephase real power and the dcsde oltage. In MM, the energy storage capactors are separately dstrbuted n three phases and the dcsde oltage s supported by three phase unts. Thus, power rpple n a sngle phase wll result n a dcsde oltage rpple. Snce power rpple n threephase real power s elnated wth the power controller, the zerosequence coponent n the snglephase power rpple s also elnated. The dcsde oltage rpple at double lnefrequency n conentonal conerters can be elnated wth the power controller. In MM, not only the zerosequence coponent but also the poste and negatesequence coponents of the power rpple n snglephase wll cause dcsde oltage rpple. Thus, the dcsde oltage rpple n MM cannot be elnated wth the power controller. Fg. Sulnk subsyste odel of conerter staton for HVD syste TRL OT Logcal Operator IGT IGT g g E E OMM Dode Dode V Fg Sulnk SM odel of MM for HVD syste X. SIMULTIO RESULTS upper ar current response usng MMc te n sec Fg 4.Sulaton results of Upper ar current response usng MM current response of lower ar usng MM Vc V 4 IX. SIMULIK MODEL D RESULTS D apactor D Flter rd Haronc Soothng reactor Lp Pos a a a pos p 5 p _DF 8 b c MV : kv. p.u. b b c flter flters 4 Mar c neg Phase reactor con. p.u. Subsyste onerter Staton n L_DF VdcP n _DF Ln K V> pu sec K > pu sec 6 eg IdcP te n sec Fg 5 Sulaton results of lower ar current response usng MM dfference response for upper and lower ar wthout controller.8 Fg. Sulnk odel of conerter staton for HVD syste te n sec Fg 6 Sulaton results of dfference n current response for upper and lower ar wthout controller 6

7 output oltage of MM te n sec Fg 7 Sulaton results of output oltage of MM XI. OLUSIO Ths paper presents a generalzed atheatcal odel for MM n realstc HVD applcatons. In the odel, as the nuber of leels n the conerter ncreases, consequently, the nuber of redundant swtchng states ncreases. Ths thess has proded a dc capactor oltage balancng ethod for ultleel conerters that n each saple of te selects the proper redundant swtchng states to sole the oltage drftng proble at the dc capactors. Fro the sulaton results, t s obsered that the deeloped ethod s able to equalze the dc sde capactor oltages wthout usng any addtonal power crcuts. ased on the sulatons, t s shown that aong all the swtchng strateges, the proded balancng ethod leads to better capactor oltage balancng at the sde and also better haronc spectru for output oltage at the ac sde. The a of ths project was the analyss of a Modular Multleel onerter (MM) for HVD applcatons and the deelopent of a control schee to ontor the energy behaor. The analyss was based on the use of a splfed crcut, consttuted by a sngle leg of the conerter, where all the odules n each ar were represented by a sngle arable oltage source. The crcut odel was dered as a syste of dfferental equatons, used for analyzng both the steady state and dynac behaor of the MM, fro oltages and thus energy pont of ew. REFEREES []. Flourentzou, V. gelds, and G. Deetrus s, VSbased HVD power transsson systes: n oerew, IEEE Trans. Power Electron. ol. 4, no., pp. 59 6, Mar. 9. []. Lesncar and R. Marquardt, n nnoate odular ultleel conerter sutable for a wde power range, presented at the IEEE Power Tech onf., ologna, Italy, Jun.. [] S. llebrod, R. Haersk, and R. Marquardt, ew transforer less, scalable odular ultleel conerters for HVDtranssson, n Proc. IEEE Power Electron. Spec. onf., Jun. 8, pp [4] J. Dorn, H. Huang, and D. Retzann, new ultleel oltagesourced conerter topology for HVD applcatons, n Proc. onf. Int. des Grands Reseaux Electrques, 8, pp. 8 [5] M. Hagwara and H. kag, ontrol and experent of pulse wdth odulated odular ultleel conerter, IEEE Trans. Power Electron., ol. 4, no. 7, pp , Jul. 9. [6] S. Rohner, S. ernet, M. Hller, and R. Soer, Modulaton, losses and seconductor requreents of odular ultleel conerters, IEEE Trans. Ind. Electron., ol. 57, no. 8, pp. 6 64, ug.. [7] M. Saeedfard and R. Iraan, Dynac perforance of a odular ultleel backtoback HVD syste, IEEE Trans. Power Del., ol. 5, no. 4, pp. 9 9, Oct.. [8] M. Hagwara, R. Maeda, and H. kag, ontrol and analyss of the odular ultleel cascade conerter based on doublestar choppercells (MMDS), IEEE Trans. Power Electron., ol. 6, no. 6, pp , Jun.. [9] L. Franquelo, J. Rodr ıguez, J. Leon, S. Kouro, R. Portllo, and M. Prats, The age of ultleel conerters arres, IEEE Ind. Electron. Mag., ol., no., pp. 8 9, Jun. 8.[] J. Rodr ıguez, L. Franquelo, S. Kouro, J. Leon, R. Portllo, M. Prats, and M. Perez, Multleel conerters: n enablng technology for hghpower applcatons, Proc. IEEE, ol. 97, no., pp , o. 9. [] M. Guan and Z. Xu, ontrol and odulaton strateges for odular ultleel conerter based HVD syste, n Proc. 7th nnu. onf. IEEE Ind. Electron. Soc., o.,, pp [] H. Song and K. a, Dual current control schee for PWM conerter under unbalanced nput oltage condtons, IEEE Trans. Ind. Electron. ol. 46, no. 5, pp , Oct []. Yazdan and R. Iraan, unfed dynac odel and control for the oltagesourced conerter under unbalanced grd condtons, IEEE Trans. Power Del., ol., no., pp. 6 69, Jul. 6. [] L. Xu,. ndersen, and P. artwrght, VS transsson operatng Under unbalanced condtons nalyss and control desgn, IEEE Trans. Power Del., ol., no., pp , Jan. 5. [4] M. Saeedfard, R. Iraan, and J. Pou, space ector odulaton strategy for a backtoback feleel HVD conerter syste, IEEE Trans. Ind.Electron., ol. 56, no., pp , Feb. 9. [5] K. Frderch, Modern HVD PLUS applcaton of VS n odular ultleel conerter topology, n Proc. Int. Syp. Ind. Electron. Jul.,. UTHOR S PROFILE Rnku scara was born n Eranakula, Kerala n 989.She receed.tech degree n Electrcal and electroncs engneerng fro Mahatha Gandh Unersty, Kerala and M.Tech fro nna Unersty, Talnadu. EMIL:rnkscara89@gal.co Harkrshnan K was born n Trandru,kerala,n 989.He receed.tech degree n electrcal and electroncs engneerng fro kerala unersty and M.Tech n power electroncs and power systes, fro Mahatha Gandh unersty, Kerala Hs research nterests are n power electronc applcatons for the topology and control of acte haronc flter, power factor correcton,hvd systes EMIL:harkrshnank6@gal.co. 7