Instrumentation for the Belle II experiment
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1 LMU München - Excellence Cluster Universe Instrumentation for the Belle II experiment Stefan Rummel
2 BELLE 2 Pixel Detector contributing institutes LMU Munich TU Munich MPI for Physics Munich Semiconductor Lab of the MPS CNM/IFAE, Barcelona Charles University, Prague DESY Hamburg IFCA Santander IFIC Valencia IFJ PAN, Krakow IHEP, Beijing KEK-PF, Tsukuba University of Bonn University of Heidelberg University of Giessen University of Göttingen University of Karlsruhe Started with R&D towards ILC in the early 2000s, since 2008 focused towards BELLE II Stefan Rummel 2
3 Overview MOTIVATION SUPERKEKB KEKB Upgrade Belle 2 Vertex Detector DEPFET Technology System Operation HARDWARE DEVELOPMENT Power Supply System Test-Beam results PROJECT Status and Outlook Stefan Rummel 3
4 Motivation B physics offers a broad range of processes to study the flavor sector Precisions measurements of the CKM matrix Many channels over constraint Current state of unitarily triangle: Stefan Rummel 4
5 Motivation B physics offers a broad range of processes to study the flavor sector Precisions measurements of the CKM matrix Many channels over constraint With 50ab -1 tensions might show up SM correct Present values stay Stefan Rummel 5
6 Motivation Direct production of new degrees of freedom limited by center of mass energy Precision measurements of processes can reveals new physics at high energy scales. Stefan Rummel 6
7 Motivation Production of entangled B 0 /B 0 pairs After decay of the first B, the other is state is known Rest frame of B s is boosted: Timing can be studied using spatial measurements Good vertex detector performance is critical Stefan Rummel 7
8 KEKB accelerator facility KEK Japanese High Energy Research Lab Tsukuba / northern Tokyo area KEKB asymmetric e+/e- collider Y(4S) resonance KEKB accelerator currently holds the world record of integrated luminosity of 1024fb -1 Stefan Rummel 8
9 BELLE KEKB Primary purpose: CP violation in B decay Rare decays Operational from ~ 900M BBars collected Universal detector using: Silicon Strip Det. Vertexing Drift Chamber Tracking TOF / ACC Particle ID CsI Calorimetry KLM K Long / Muon Detector Stefan Rummel 9
10 BELLE KEKB Stefan Rummel 10
11 SuperKEKB accelerator upgrade Key Parameter: Luminosity L = N +N f 4 π σ x σ y R Measurement of rare decays, high precision Nano beam option + increased current Target: 8x /cm 2 s, aiming for 50ab -1 50x Belle KEKB SKEKB High Current SKEKB Nano Beam Current [A] 1.6/ / /2.6 Beamsize [µm] ~2 0.85/0.73 ~10 x 0.06 Energy [GeV] 8/3.5 8/3.5 7/4 Bunchspacing [ns] Lumi [10 34 cm -2 s -1 ] Stefan Rummel 11
12 SuperKEKB accelerator upgrade Luminosity Profile BELLE II Goal: 50ab-1 summer shutdowns Stefan Rummel 12
13 BELLE II upgrade PXD requirements Particle rates, Background scale with luminosity Upgrade of data acquisition, trigger and subdetectors Silicon strip detector suffers from high occupancy Boost has been reduced Detector with higher granularity, better rate capability required Additional Pixel Detector (PXD) Stefan Rummel 13
14 PXD in a Nutshell Requirements: High hit density ~8MHz/cm 2 Radiation hardness ~ 2 MRad/a Low momentum tracks (<1GeV) Acceptance Simulated z-vertex resolution including the 4 layer strip detector: Implementation: Two layers: at r= 14,22mm Pixel size 50x60µm², 50x75µm² Thickness: 75µm Material budget: 0.2% X 0 Pixel: 8M Radiation hardness: ~10MRad Frame time: 20µs Technology: DEPFET Upgrade will significantly improve impact parameter resolution Stefan Rummel 14
15 DEPFET Active Pixel Detector Depleted Field Effect Transistor baseline for the BELLE II PXD Technology developed by Semiconductor Laboratory of the MPS in Munich In pixel amplification of charge Potential minimum under gate Electrons modulate current in FET Charge is removed via clear Low input capacity Low noise operation Fully depleted operation on high resistivity silicon High sensitive volume Fast charge collection Low leakage currents Moderate operation temperature Charge collection always active DEPFET allows to build low mass, high S/N detector Stefan Rummel 15
16 DEPFET Signal Generation Basic MOSFET transistor model in active mode: I g ds q C di dq OX ds int W L U V 2 GS 1 f 2 L U THR Simple model for signal generation: GS V THR Q f C Gate length L is the most important parameter which determines g q ~ 1/L² Operating the detector at large (U gs -V thr ) helps, but on the expense of power consumption int OX Internal amplifications up to 1nA/e, latest standard layouts around 500pA/e Stefan Rummel 16
17 Potential Potential Potential DEPFET Clear Process Clear process crucial for operations CLEAR CLEAR GATE GATE Potential barrier can be manipulated by many external operation parameter: Clear Voltages, CCG, Gate On / OFF U CLEAR ~3V U GATE,OFF ~2-5V Charge collection state Application: Gated mode U CLEAR ~6V Barrier partially removed U CLEAR >10V U GATE,ON ~-2 -(-1)V Clear - charge is removed by drift Stefan Rummel 17
18 DEPFET Matrix operation DEPFET pixel cell arranged on grid Readout via rolling shutter mode Select row Read current Reset row Column parallel readout fast readout Low power dissipation in active area Three different ASICS needed: Switcher DCD (Drain Current Digitizer) DHP (Data Handling Processor) Stefan Rummel 18
19 DEPFET Matrix operation To optimize readout speed: 4 rows are processed parallel Signal is sampled once no correlated double sampling Row rate of 92ns has been demonstrated on long matrices Stefan Rummel 19
20 DEPFET Technology - Thinning Goal: 0.2%X 0 Double sided process: no easy thinning possible Dedicated thinning process has been developed Stefan Rummel 20
21 DEPFET Technology - Thinning Reverse bias full depletion [pa/cm²] 450 m 50 m 100pA/cm² Excellent electrical properties after thinning Low leakage allows close to room temperature operation Self supporting mechanical structure Stefan Rummel 21
22 DEPFET Technology - Thinning The first DEPFETs on thin substrate Stefan Rummel 22
23 DEPFET module concept Stefan Rummel 23
24 Module production Finished silicon module from fab Integration of ASIC s using Flip chipping / solder bumping (240 C) Placement of passive SMD components Termination resistors, decoupling Reflow 200 C Kapton attachment Past printing and 170 C Wire bonding 2 layer staggered, 32µm Al Stefan Rummel 24
25 DEPFET Module Finalized module with kapton attached Stefan Rummel 25
26 Module to Ladder Two modules glued together forming a Ladder Stefan Rummel 26
27 Ladder mounting Support on beam pipe Combined mounting cooling block Stefan Rummel 27
28 PXD Cooling 360W power dissipation while operation Dominated by readout ASICs outside of the acceptance Power consumption in active area ~.4W/cm 2 Active area cooled by cold air Modules mounted directly on cooled mounting block Direct thermal contact CO 2 cooling channels Mounting block Air inlets Stefan Rummel 28
29 Accelerator Continuous Injection Injection two times 25Hz New bunches introduce significant background in detector, 10µs revolution time Belle introduced a veto when noisy bunches cross the detector Need scheme to prevent charge collection Stefan Rummel 29
30 Solution: DEPFET Gating Depth of internal gate potential depends on operation voltages Idea: Increased gate voltage leads to deep potential minimum and charge preserved charge even in presences of high clear potential Stefan Rummel 30
31 Gated Mode - DEPFET level Pixel related issues: Charge conservation Junk charge prevention Measurements performed on low pixel count test setups DEFPET cell capable of gated operation Stefan Rummel 31
32 Gated Mode Module operation Run in Gated mode, measure signal generated by laser delay sweep Normalized Signal 1.5 µs Module level control: Timing signals Functionality of ASIC Demonstration of Gated Mode on latest Pilot Run module Stefan Rummel 32
33 Gated Mode Signal Quality Transition into Gated Mode charge / recharge complete matrix from 5-20V Normal operation just a row is recharged ~ 135pF vs. 26nF Gating the DEPFET works Significant distortion of the input signal after transition Blind to RO mode Threshold around 5 ADU Stefan Rummel 33
34 Gated Mode Demanding for system layout decoupling on and off module Improving on- and off module decoupling + optional Analog Common Mode correction of input 2.56µs Gated Mode demonstrated in actual operation Normal operation continuous after 1.5µs Stefan Rummel 34
35 PXD Module Voltages 23 voltages per module Currents up to 3A 4 quadrant operation Regulation via 15m Sensitive nodes (gates, analog part..) Stefan Rummel 35
36 Power supply requirements Steering/Biasing voltages for the DEPFET Fine tuning for optimization Parameter changes due to irradiation Precise hardware current limit Four Quadrant operation Low noise essential for SNR Supply voltages for the ASICs Sub-micron chips sensitive to over voltage Sink/source output needed Need control on transient behavior of PS-system Several dependencies between voltages Dedicated power up and down sequences Additional functionality for protection needed Development of a dedicated low noise power supply system Suppling more than 900 voltages to the PXD Stefan Rummel 36
37 PXD PS implementation Stefan Rummel 37
38 PXD PS implementation Interlock system Stefan Rummel 38
39 PXD PS implementation 9 different boards for each unit OVP card developed in Cracow, rest LMU Stefan Rummel 39
40 PXD PS implementation Stefan Rummel 40
41 PXD PS characterization and optimization Load Regulation DC- load regulation in presence of high sense line resistance Long cables and module lead to sense wire resistance up to 25 Ω Significant deterioration of output impedance Mitigation using dedicated active sense amplifier Typical output impedance ~.5m Ω Stefan Rummel 41
42 Study of Electro-Magnetic- Interference (EMI) Key to good SNR close to the laboratory environment is a throughout study of EMI: Susceptibility of system towards radiation and conducted interference Emissions from neighboring detectors Emissions from power supply system Study of EMI related to PXD-SVD together with ITA Zaragoza Optimizing grounding scheme Noise emission measurement of PS Evaluation of module detector susceptibility Common SVD PXD operation Valuable input for development Lead to implementation of CMD filters close to the detector Stefan Rummel 42
43 Study of Electro-Magnetic- Interference (EMI) Characterization of conducted PS emissions Stefan Rummel 43
44 Study of Electro-Magnetic- Interference (EMI) Characterization of detector susceptibility Stefan Rummel 44
45 DESY Test Beam campaigns Twice a year Focus on System / DAC integration Module characterization TB infrastructure 1T magnet Electrons 1-6GeV Beam telescope First full size modules in April 16 test Stefan Rummel 45
46 DESY PXD setup Stefan Rummel 46
47 Integration with SVD Stefan Rummel 47
48 Mounted in Cold Dry Volume Stefan Rummel 48
49 DESY Results Pilot Run Modules Final Sensors Latest RO ASICs 40kHz RO rate PXD Beam Spot / Hit map Pulse high distribution S/N ~ 33 Cluster size distribution Stefan Rummel 49
50 TB results Resolution as expected from cluster sizes close to digital limit RMS: 14.3µm (pitch 50µm) RMS: 18.3µm (pitch 60µm) Efficiency >99% ~.1 masked pixel Detector operated with standard parameter still space for detector optimization Resolution Phi Resolution z Stefan Rummel 50
51 Outlook PXD commissioning March DESY KEK June 18 Phase 3 physics run from beginning 2019 Stefan Rummel 51
52 Backup Stefan Rummel 52
53 Evolution of Detector Modules Hybrid 5: Small Matrices 64x128 Px Single RO chip Hybrid 6: Small Matrices 64x128 Px 3 RO ASIC s EMCM: Silicon Module Technology development for Metall System Multiple RO ASICS Pilot Run Module: 4 RO ASIC s Stefan Rummel 53
54 Evolution of Detector Modules Finalized module with kapton attached Stefan Rummel 54
55 Breakdown of material budget Stefan Rummel 55
56 Data Acquisition Integration over 20µs accumulates significant amount non physics hits Backgrounds: Dominant: QED 2-photon-process, Radiative Bahaba Touschek, Synchrotron radiation, Beam-Gas Occupancy ~1.3% /.5% Trigger rates up to 30kHz vs. 50kHz RO rate Expected BELLE II data rates PXD would dominate data rate of BELLE II Online data reduction required Stefan Rummel 56
57 Data Acquisition DHP Data Handling Processor On module steering ASIC Common Mode and pedestal correction Zero suppression DHE Data Handling Engine: Receives data from module 4 optical 1.6Gb/s Distribute timing, slow control Transmission to DHC DHC Data Handling Concentrator Load balancing Trigger distribution ONSEN ONline Selector Node Data reduction using ROI s Send data to event builder Stefan Rummel 57
58 Data Acquisition ROI Selection Online reconstruction using VXD tracks Extrapolation into PXD Rejecting hits outside of Region of Interest (ROI) Total data reduction by at least x20 Stefan Rummel 58
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