ISSN Vol.05, Issue.12, December-2017, Pages:

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1 ISSN Vol.05, Issue.12, December-2017, Pages: Design of RF Transceiver in Wireless Sensor Networks BUSHIPAKA MADHUKAR 1, CHAND PASHA MOHAMMED 2, B. MADHUSUDHAN REDDY 3 1 Research Scholar, Dept of ECE, KL University, Hyderabad, TS, India, madhukar.bushipaka@gmail.com. 2 Assistant Professor, Dept of ECE, KL University, Hyderabad, TS, India, chand.p786@gmail.com. 3 Assistant Professor, Dept of ECE, Vignan Institute of Technology and Science, JNTUH, Hyderabad, TS, India, benjaram.msreddy@gmail.com. Abstract: For a successful circuit design the functionality of active and passive components operating at various frequencies plays an important role. Technical advancements in micro sensors, Micro Electro Mechanical System (MEMS) devices, lowpower electronics, and Radio Frequency (RF) circuits and systems have enabled both design and development of such highly integrated system. Wireless Sensor Networks (WSN) demand efficient RF transceiver design. The design of RF transceiver with better working capabilities is implemented. Usually Wireless sensor nodes are mostly battery operated and in many applications they are placed isolated. Designing a transceiver requires both hardware and software so as to consume minimum power during the operations. Some transceivers operate in the Industrial Scientific and Medical (ISM) with a frequency of 2.4GHz which is suitable for all common fields of life for many WSN applications. Current size of the wireless sensor node is in the order of millimeter. Scientists and Engineers are trying to reduce its size near to the size of a dust particle. This offers a challenge to design small chip of RF transceiver in wireless sensor nodes. It is achieved by decreasing the number of enable pins on the chip that therefore reduces the size of the chip. The transceiver system is designed and fabricated using a 1μm CMOS process for WSN applications. The system integrates a transmitter and receiver this integrated chip includes four blocks which are two mixers, Power Amplifier (PA), Low Noise Amplifier (LNA).This design process has been implemented by TOP SPICE tool. In this process the design aspects like power transmission of 33 dbm and the power consumption of the transceiver 269nW at 1.8 V are achieved. Hence this finds wide range of applications such as monitoring, surveillance and tracking, smart environments and other commercial application processes in WSN applications. Keywords: WSN, RF, MEMS, CMOS, LDO, PA, LNA etc. I. INTRODUCTION The choice of the CMOS Radio Frequency (RF) transceiver architecture affects the design of the whole system and is thus a fundamental one. In order to make a good choice, several factors have to be considered, the most important ones being: performance, power consumption, die size, cost, integration level, and time-to-market. The relative weight of all other factors is determined by the Wireless Sensor Network (WSN) application at hand. The functionality of both transmitter and receiver are combined into a single device called as transceiver. As the RF transceiver developed here targets very small devices such as information gathering nodes for sensor network applications, a small size and minimum power consumption are key requirements. In particular, as power consumption sets dimensions and type of the battery, it also has a major impact on size, weight, and cost of the system. A. Wireless Sensor Networks (WSN) Recently, the desire for wireless connectivity has led an exponential growth in wireless communication. In particular, wireless sensor networks are potential wireless network applications for the following future ubiquitous computing system. (a) Wireless Sensor Network Node Fig.1. Wireless sensor networks IJVDCS. All rights reserved.

2 BUSHIPAKA MADHUKAR, CHAND PASHA MOHAMMED, B. MADHUSUDHAN REDDY The power dissipation of wireless sensor networks does require low power consumption for several years operation. There has been a great deal of interest in realizing low power, low cost, compact RF transceiver IC for wireless sensor networks. Several technological trends that are driving the technical evolution of wireless technology include the process scaling of CMOS transistors and higher bandwidth available at ISM (Industrial, Scientific and Medical) bands. Almost all of the license free bands propose both linear and nonlinear modulation standards for wireless applications, and thus requiring different design optimizations in the RF transceiver. Along with these issues, there exists the challenge to develop fully integrated wireless solutions in silicon based substrates. The SoC (System-on-Chip) design for the WSN nodes is the most significant technology of modern WSN design. There are a large amount of nodes in a WSN system, the nodes are densely deployed either inside the environment or very close to it. Each node is equipped with a sensor, an ADC (Analog-to-Digital Converter), a MCU (Micro Controller Unit), a storage unit, a power management unit, and a RF (Radio-Frequency) transceiver, as shown in Fig.1, so that it can sense, store, process, and communicate with other sensors using multi hop packet transmissions. II. LITERATURE SURVEY A. Design Approach of a RF Transceiver Design of a Radio-Frequency (RF) transceiver chip is used in wireless sensor network (WSN) applications.each fundamental block wireless sensor node is operated by battery. To extend the life of node it s important to have energy efficient transceiver design because RF transceiver is the biggest consumer of energy in WSN. We need such a design which gives us simple, reliable, less cost, minimum power and small size solution for RF transceiver design. To design a RF transceiver, first makeup a block diagram of Transmitter and receiver and then make individual blocks architectures and integrate them for a complete RF transceiver. RF transceiver is defined, which can perform both functionalities of transmitter and receiver. Fundamental block of transceiver consists of an up conversion mixer, Power Amplifier (PA), Low Noise Amplifier (LNA) and down conversionmixer. Basic block diagram of Transmitter and receiver shownin bellow fig. 2. Fig.2. Basic block diagram of transmitter&receiver respectively. B. Observations from Different IEEE Papers In [1] R.Van Langevelede has given the An ultra-low power 868/915 MHz RF transceiver for WSN Applications solution which has fabricated in 0.13um technology. Author has used binary FSK modulation scheme and the data rate of the transceiver has 45kb/s where the supply voltage has 1.2V to 1.5V. Author has minimized the size of chip by dropping some internal components like inductors and has given the small size solution. In [1] data rate isnot very high and some extra components also still in the transceiver design like, five low drop-out regulators (LDO) instead of one used. Another problem also there like now most of transceiver need to operate at 2.4GHz frequency because this operating frequency is rapidly used in all communication systems. Chinung-An Chen et al. In [2] have given the 2.4GHz transceiver solution for bio medical applications like health care monitoring using four level hierarchy systems with the help of pipeline and mapping application of wireless sensor network. This architecture reconfigures the map applications of WSN system. Authors have used the adaptive low power system design that reduces the power consumption, where the maximum distance of transmission is 10 meter, But the data rate is 40Kb/s which is not too much high in bio medical field we need high data rate and more accuracy as compare to other communication fields so we need a design that can control the whole WSN system with less power high data rate using better accuracy and more sensitive on the human temperature perspective. In [4] Chi-Jeon Hwang et al have used OOK (On-Off keying)and quasi-monolithic Microwave Integrated Circuits (quasi=mmics) method for Radio Frequency transceiver. In health monitoring sensitivity is a big problem which has related to the low operating voltage, using OOK modulation author has solved this problem (fabricated on GaAs substrate). There are two states on state and off state in off state the power consumption is less than 5ųW and LNA supply voltage is 0.3V where envelop detector supply voltage is 0.9V and the operating voltage of transceiver is 1.2V. The data rate is 10kbps which is very low and synchronization time is not very small. In [5] Alyosha Molnar et al have used 0.25ųm CMOS technology for RF transceiver. In WSN system the communicating range of the transceiver has very important factor. Authors have needed long battery life cell one chip solution and all functionality of transceiver in very less cost. There are two techniques which can minimize the cost and power consumption of the transceiver. The first one is stacking system in such a way that multiple circuits stack in a single bias circuit it means Author has reused the bias current. Second one is single high quality inductance for resonant core of the oscillator and drives all circuit through the core of oscillator. But it operates on 3 volts supply, which is very high supply voltage in this field. Author has locked digital FLL (Frequency Lock Loop) to the Radio frequency oscillator to reduce the power consumption, where all bias current programmable and intermediate frequency also programmable on 1.75MHz to 100 KHz. Finally author has obtained the 16 meter rage of the transceiver from both ends and in transmit mode it has consumed the 1.3mW power and in receiving mode it consume about 1.2mW power. Still the data rate is very low about 20 Kb/s. Note that the above range was only for indoor communication and the both chips were in bias state [5].

3 Design of RF Transceiver in Wireless Sensor Networks III. RESULTS A. Simulation Results of RF Input Signal to the Mixer RF Input Signal: Fig.3. Simulation result of RF input signal. Fig.6.Simulation result of LO pulsed input signal. Reference node V_LO Voltage is selected by double clicking on sine voltage source as follows,select a PULSE(pulsed waveform) and give a suitable values as follows as shown in Figs.5 and 6. Find pulsed value in frequency domine: Pilse width = Pulsed value = 0.4V peak to peak. Frequency = Where Fig.4. Specificationsof RF input signal. To provide a sine wave as a input to the RF Trasceiver double click on sine voltage source and select a SIN (sinusoidal) specification as follows,and enter amplitude and frequency values for the suitable circuit design as shown in Figs.3 and 4. Find frequency: C. Simulation Result of Mixer Output Frequency = B. Simulation Result of LO Signal Input to the Mixer LO Input Signal: Fig.7. Simulation result of mixed signal. Fig.5.Simulation result of LO pulsed input signal. Fig.8.Simulation result of a mixer signal after filtering.

4 BUSHIPAKA MADHUKAR, CHAND PASHA MOHAMMED, B. MADHUSUDHAN REDDY This is the result which is generated by mixer, mixed with two signals namely sinusoidal and pulsated (carrier) signals as shown in Figs.7 and 8. This simulation result is of unbalanced mixer output without filtering. These frequencies will be 1MHz, 99MHz, 100MHz, 101MHz and harmonics.this is the output result of mixer after low pass filtering for the required channel seletion. Here 99MHz is selected frequency. D. Simulation Result Power Amplifier Output Fig.12.low noise amplifier frequency responses. Fig.9. Simulation result of power amplifier. E. Simulation Result Low Noise Amplifier Low noise amplifier is a device to receive degraded signal coming from the power amplifier. Fig.12 shows the frequency response of the low noise amplifier circuit which the frequency is 99MHz and noise also added by inductors and FET. This noise and frequency response illustrations shown in figure above. F. Simulation Result Recovered Signal Down conversion mixer sets the required frequency channel at the output side of the receiver, so 1MHz frequency is recovered at this stage by the down conversion mixer as sown in fig.13. Fig.10. V-I characteristics of power amplifier. Fig. 9 shows Class-A common source power amplifier changes the output by changing 1800 phase shift and radiates maximum power. V-I characteristics of power amplifier is useful to calculate the power consumption at this stage i.e., 2V*190.7mA=381.4mW is the power consumption before adding the impedance matching circuit. Fig.10 shows power consumption after adding impedance matching circuit is as 2V*40mA=80mW. We can conclude the better result of impedance matching network by comparing without it. By this result we can improve compatibility by impedance matching network. Fig.11. V-I characteristics after impedance matching network. Fig.13.Recovered signal at down conversion mixer. VI. CONCLUSION A reliable idea to design simple circuit of an integrated RF transceiver. This proposed design also consumes less power and occupy less area. The transceiver contains four blocks which are front end mixer, Power Amplifier (PA), Low Noise Amplifier (LNA), and downconversion mixer. Overall power consumption 269.1nW, operating voltage is 1.8 Volts at required frequency and fixed load is 50 ohm in this RF transceiver design. It is also invited from the simulation results. This intelligent design has reduced the overall size of this vital component of sensor node which ultimately results in minimum power consumption and minimum cost. That the number of components are also decreased by assigning the same job to other components in a distributed way. Moreover, the reduction of enable pins from five to three on the chip has automatically reduced the size of chip.

5 Design of RF Transceiver in Wireless Sensor Networks VII. REFERENCES [1]. Abid Ali Minhas, Muhammad YasirFaheem, Muhammad BasitAzeem Ultra Low Power Small Size RF Transceiver Design for Wireless Sensor Networks IEEE 2011 Pakistan. [2]. R. van Langevelde, M. van Elzakker, D. van Goor, H. Termeer, J. Moss and A.J. Davie An Ultra-Low-Power 868/915 MHz RF Transceiver for Wireless Sensor Network Applications IEEE Radio Frequency Integrated Circuits Symposium [3]. Chiung-An Che, Ho-Yin Lee, Shih-Lun Chen, Hong-Yi Huang and Ching-Hsing Low-Power 2.4-GHz Transceiver in Wireless Sensor Network for Bio-medical Applications (ROC) IEEE 2007 Taiwan. [4]. Chi-Jeon Hwang, Ian McGregor, Richard Oxland, Griogair Whyte, Iain G. Thayne, and KhaledElgaid An Ultra-Low Power OOK RF Transceiver for Wireless Sensor Networks 29 September - 1 October 2009, Rome, Italy. [5]. Alyosha Molnar, Benson Lu, Steven Lanzisera, Ben W. Cook and Kristofer S. J. Pister in An Ultra-low Power 900 MHz RF Transceiver for Wireless Sensor Networks IEEE Custom Integrated Circuits Conference [6].Bo Li, Thomas Salter, YimingZhai, Bo Yang, Xi Shao, George Metze, and Neil Goldsman An Integrated Low Power Transceiver System C2011 IEEE USA.