DC/DC Converter. Conducted Emission. CST COMPUTER SIMULATION TECHNOLOGY

Transcription

1 DC/DC Converter Conducted Emission

2 Introduction 3D Model EDA Layout Simulation Modifications N GOALS MET? Y In modern electronic applications a majority of devices utilizes switched AC/DC or DC/DC converters in their power networks. The power provided from a source, is switched by the converter in order to adjust the output voltage level (Switch Mode Power Supply - SMPS). Unfortunately the switching always creates noise, which may be significant at higher frequencies. Furthermore, this unwanted emission can upset the source or any other device in the same supply power network, because it is easily transmitted through the power lines. Prototype Measurement The main goal of the workflow, is to calculate the overall level of the conducted emission and to design filters to suppress it. With simulation, this can be performed before a prototype of the device is manufactured. CST EMC Studio allows to import an EDA layout and perform aforementioned studies. The subject of this workflow is a bulk step-down DC/DC converter designed for the automotive industry.

3 Standalone Circuit (SC) Schematic C2 D2 C1 C5 L1 C7 C3 C6 D1 U1_2_3 A step-down buck converter is build from an inductor (L1), the input/output capacitors (C1, C3, C6), a catch diode (D1) and a switch (U1_2_3). All these components create so called switching loop (look for the components present on the blue background). By controlling a on/off state of the switch, the regulator output voltage is reduced to the certain level. It can be achieved using any signal with alternating duty cycle. In this application the converter is reducing an input DC voltage from 12V to the 5V. Taking into account the operational frequency of the converter (488 khz) and values of all lumped elements inside the switching loop, the duty cycle of the signal which controls the switch on/off state, should be 48.7%. Therefore the switch should be closed (in on state) for 1us (0.487*T), and opened (in off state) for 1.05us (0.513*T). T time period: T=1/488kHz = 2.05us A boost loop for increasing the switching efficiency of the converter, is created with help from Schottky diode (D2) and capacitor (C2). The SPICE models were imported for both diodes. Decoupling is provided by capacitors (C5, C7). The device is connected to the source thru LISN (Line Impedance Stabilization Network).

4 Transient Simulation Task Solver Specials SC Schematic 1000 Results Settings } = 1us ON-STATE To re-create aforementioned switching condition (normal operating mode of the converter) a rectangular waveform needs to be applied to the external port 1. Define an excitation signal as depicted on the left-hand side ( Transient Simulation Task ). Specify time period of the signal (Ttotal = 2.05us). The voltage amplitude (Vpulse) has to match the switch (U1_2_3) on/off thresholds to activate the switching. In order to obtain the spectrum of the voltage/current recorded at the probes, a Fourier transform has to be activated in the transient task settings. Go to the Results Settings tab. Search for: FD Data: Assume periodic signals section. Enable time gating. Set a starting time to 300us. After this time the steady state (look at the next slide) in the circuit is reached, and the resulting time domain signal can be used to calculate the emission spectrum. In order to increase the resolution of the plots, the no. of samples has to be increased. Click on the Specials button. Inside the Solver Specials window increase the no. of FD samples in Miscellaneous section. Run the task.

5 Input/Output Voltage/Current Plots steady state Navigation Tree Orange curves depict the voltage and current occurring at the load. The device reaches a steady state after 300us. Quick view at the TD Voltages/Currents plots can quickly confirm if the switching signal was defined correctly. In this particular case, the regulator reduces the input voltage to 5V at the resistive load, therefore current flowing thru the load is 1A. Additionally, during the device startup an inrush current can reach almost 2.55A.

6 Switching Noise Spectrum Navigation Tree On the graph above, the level of the conducted emissions up to 30MHz, which are transmitted directly to the source, can be seen. Next step is to combine circuit results with the geometry (layout of the PCB) response, to obtain a full picture of the emission.

7 Project global properties Landing Page The project wizard tool should not be omitted by a user, because it provides an optimal simulation setup (e.g. solver proposal, global units and mesh settings, adequate sampling, bounding box requirements, etc.) and creates probes and field monitors to capture EM field distribution around the DUT. Use the project wizard to prepare a simulation setup for the conducted emission analysis.

8 Project global properties PCB Choose the EMC/EMI application area. Select the Conducted Emission workflow. Proceed to the next window and select PCB workflow. In the next window a list of solvers, best suited for the workflow, will be presented. Choose the Frequency Domain solver. Frequency Domain

9 Project global properties Proceed to the next window with global units settings. Verify the units and move to the next window. Provide a suitable frequency range, which for current analysis is 0-30MHz. Define an additional surface current monitor at the operational switching frequency of the converter (0.488MHz). (optional) Confirm and save the created template. It will be visible in the Project Templates section of the CST Landing Page.

10 Special Settings CST EDA Import PCB import Once the project environment is created (when a CST MWS primary window can be seen) import the PCB Layout of the converter. It is saved in DC_DC_Converter_EDA.ldb file. Using a file explorer navigate to the Help_files folder and drag & drop the file into the 3D Window. The LDB file contains the PCB layout with modifications (e.g. selected traces, areas or layers, added ports). More information about it, can be found in the Appendix A. For better accuracy define the geometry of all present ports and lumped elements as face. Go to the: CST EDA Import -> PCB Preview tab and click on Specials. Set differential ports and Lumped-elements to Face ones.

11 INPUT Layout information EMI FILTER L C C DC/DC CIRCUIT LOAD The pictures depict the top view of the converter layout. The left side of the board contains an input connector, a protection against overvoltage and inverted polarity, and an EMI filter for suppressing switching noise. The main controller and its peripherals are located in the center. The right part of the PCB contains a USB-A connector and a resistive load in order to provide several load conditions. SW D C D L C R

12 1 Model preparations An input connector can be either imported as a CAD model or designed from 3D primitives. In the current workflow only the pins of the connector will be built using curves. HINT: Bricks can be utilized instead. 2 Navigate to the position of the input connector (blue circle) 1. Definition of the pin path using a 3D polygon curve. a) position the working coordinate system (WCS) as depicted in the picture 1, by picking the center of the via. b) go to the Curve list and choose 3D Polygon curve c) enter the coordinates of the points as depicted in the picture 1 2. Definition of the pin profile using 2D curve - circle. a) allocate the WCS at the end of the polygon curve make sure that w-axis is pointing towards the PCB b) go to the Curve list and choose Circle c) enter the coordinates of the points as depicted in the picture 2

13 3 Model preparations 3. Navigate to the Curve Tools and select the Sweep Curve tool. (activate the tool and follow the wizard steps; once the pin is created use the settings as depicted in picture 3) 4. Duplicate the pin using Transform Tool. a) use Picking Tool to choose point P1 (picture 4) b) repeat step a) but select point P2 (picture 4) c) double-click on the component pin and activate the Transform Tool d) activate Copy function and confirm the action 4

14 Port definition PORT U V W Port 22: GND Port 21: VIN_nf Allocate WCS in the middle of the pin face as picture on the left-hand side shows. Align WCS with XY Plane. HINT: Ribbon Bar: Modelling tab -> WCS Define two ports with coordinates as presented above in the table. Rename ports as denoted.

15 Background Properties Boundary Conditions Boundary conditions Change type of the boundaries to electric in coordinate directions: Ymin and Zmin. For other directions specify open boundaries. The boundary at Ymin has to be defined as electric because it provides a path for the return current. The boundary at Zmin models the copper table on top of which the PCB is typically placed. The project template for the conducted emissions analysis provides default dimensions of the bounding box. However distance from the model to the bounding wall: Ymin has to be reduced to zero, otherwise the current loop between the ports 21,22 and the wall will not be closed.

16 Frequency Domain Solver Parameters Model discretization and solver settings All parameters of the FD Solver are provided by the conducted emission template. Electrical model is obtained automatically using the global mesh parameters provided by the conducted emissions template. No additional action is required. Remark: For training purpose, user is asked to disable Adaptive tetrahedral mesh refinement option in order to save simulation time. During the normal simulation adaptive mesh refinement should be always activated. Run the simulation. Once the results are present move to the schematic.

17 Schematic Re-arrange ports location. HINT: Open the block properties (CTRL+E), go to the Layout tab, drag & drop pins accordingly to the picture on the left On the right-hand side user can notice all required electric components for the conducted emission analysis including the LISN. For convenience, all of these items are stored in another cst project. Using the file explorer go to the folder Help_files and open DS_components.cst project. Copy all of the items from this project to the schematic of the main project. LISN circuit Switching loop Controller IC is simplified and replaced by a voltage controlled switch (U1_2_3). Load R3 EMI Filter, type π C8,C9, L2 L1 LISNs C1-C7 SPICE models of rectifier diodes D1-D2 Auxiliary components: Main inductor Functional input/output capacitors Decoupling capacitors Schottky diodes (SPICE models)

18 Ribbon Bar Schematic Create the connections as the picture on the left-hand side depicts. Use the Connector tool. HINT: Ribbon Bar: Home tab -> Components The switching loop and all other peripherals of the converter are the same as in the standalone circuit. The SPICE models were imported for both diodes. The device is connected to the source thru LISNs ( hot wire (LISN_P) and ground wire (LISN_N)). Attach a probe to the output (R3_1_2). Rename it to OUT. HINT: Name of the probe can be changed in the Navigation Tree. There are two load conditions present on the PCB, which impose a different drain current. However from the simulation point of view, they are not relevant therefore they are replaced by a Load resistor (R3). Its resistance is fully adjustable.

19 Schematic, EMI filter A The model allows to perform analysis with or without switching noise suppression (EMI filter). On the PCB the EMI filter is switched on/off by jumpers (SW1, SW4). In the simulation model, they are emulated by ports. In this way user from the schematic is able to choose a proper test case. IN A A OUT SW1 SW4 B IN SW1 A A SW4 OUT EMI filter enabled: Pins: SW1_2_3, SW4_1_2 -> shorted SW1_1_2, SW4_2_3 -> left open EMI filter disabled: Pins: SW1_2_3, SW4_1_2 -> left open SW1_1_2, SW4_2_3 -> shorted

20 Transient Simulation Task Solver Specials 1000 Schematic Results Settings All parameters, to re-create switching condition, are taken over from the standalone circuit. In order to obtain the spectrum of the voltage/current recorded at the probes, a Fourier transform has to be activated in the transient task settings. Go to the Results Settings tab. Search for: FD Data: Assume periodic signals section. Enable time gating. Set a starting time to 300us, after which the steady state is reached. In order to increase the resolution of the plots, the no. of samples has to be increased. Click on the Specials button. Inside the Solver Specials window increase the no. of FD samples in Miscellaneous section. Run the task.

21 Results, EMI filter disabled Navigation Tree On the graph above, the level of the conducted emissions up to 30MHz can be seen. Red plot presents the simulated signal spectrum captured at the probe LISN_P and green one the prototype measurement.

22 Suppression of the switching noise In order to activate the EMI filter do the following: Create a new Simulation project HINT: Ribbon Bar: Simulation -> Simulation Project Choose option: All blocks as Schematic Model Rename it to with_filter. On the new schematic do the following: Short to the ground pin: SW1_2_3, SW4_1_2 Leave open pin: SW1_1_2, SW4_2_3 Re-run the task Tran1.

23 Results, EMI filter enabled Navigation Tree The graph above presents the comparison of the emission between the simulation and the measurement with filtering. Green plot presents the simulated signal spectrum captured at the probe LISN_P and red one the measurement.

24 DC Current Path EMI filter activated The slide presents a 3D surface current captured on the PCB by H-Field monitor at DC. In order to visualize that data, user must switch from the schematic view to the 3D view. HINT: Data accessible in: Navigation Tree ->2D/3D Results -> ->Surface Current folder EMI filter deactivated

25 3D E-field Distribution OUT IN EMI filter activated The slide presents a 3D electric field distribution captured around the PCB by E-Field monitor at 488 khz. In order to visualize that data, user must switch from the schematic view to the 3D view. HINT: Data accessible in: Navigation Tree ->2D/3D Results -> -> E-Field folder IN OUT EMI filter deactivated

26 Notes