Wuxi I-CORE Electronics Co., Ltd. AIP31107

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1 AIP CH COON DRIER FOR DOT ATRIX LCD 1 GENERAL DESCRIPTION The AIP31107 is an LCD driver LSI with 64 channel outputs for dot matrix liquid crystal graphic display systems. This device provides 64 shift registers and 64 output drivers. It generates the timing signal to control the AIP31108 ( 64 channel segment driver). The AIP31107 is fabricated by low power COS high voltage process technology, and is composed of the liquid crystal display system in combination with the AIP31108 (64 channel segment driver). Features Dot matrix LCD common driver with 64 channel output 64-bit shift register at internal LCD driver circuit Internal timing generator circuit for dynamic display Selection of master/slave mode Applicable LCD duty: 1/48, 1/64, 1/96, 1/128 Power supply voltage: % LCD driving voltage: 8~17 (DD-EE) High voltage COS process Chip size: (μm μm ). The IC substrate should be connected to DD or float in the PCB layout artwork. 100QFP and bare chip available Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 1/ 17 P.C: ER: A

2 2 BLOCK DIAGRA AND PIN DESCRIPTION 2.1 BLOCK DIAGRA Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 2/ 17 P.C: ER: A

3 2.2 PIN CONFIGURATIONS Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 3/ 17 P.C: ER: A 100-QFP C23 C24 C25 C C27 84 C31 82 C35 C42 C38 83 C28 C29 C30 C32 C33 C34 C36 C37 C39 C40 C C43 C44 C45 C C47 64 C51 62 C55 C62 C58 63 C48 C49 C50 C52 C53 C54 C56 C57 C59 C60 C NC 53 C63 C64 NC CL C2 C8 7 C3 8 C4 9 C6 10 C7 C21 C9 C20 C10 C19 C11 C17 26 C16 25 FS C14 24 DIO1 C13 23 C C5 C C22 C1 C DS1 DS2 C R CR 50 NC NC NC SHL ss S P DIO EE 1L 4L 5L 0L DD EE 1R 4R 5R 0R (100-QFP) AIP31107

4 2.3 PIN DESCRIPTION Pin No.(QFP) Symbol I/O Description ,58 27,54 24,57 25,56 26,55 DD SS EE 0L, 0R 1L, 1R 4L, 4R 5L, 5R Power Power 42 S I 39 SHL I 49 P I 30 FS I DS1 DS2 I For internal logic circuit(+5±10%) GND ( 0 ) For LCD driver circuit Bias supply voltage terminals to drive LCD. Select Level Non Select Level 0L(R), 5L(R) 1L(R), 4L(R) 0L and 0R ( 1L & 1R, 4L & 4R, 5L & 5R )should be connected by the same voltage. Selection of master/slave mode - aster mode(s=1) DIO1, DIO2, CL2 and is output state. - Slave mode(s=0) SHL=1 DIO1is input state(dio2 is output state) SHL=0 DIO2is input state(dio1is output state) CL2 and are input state. Selection of data shift direction. SHL Data shift direction H DIO1 C1 C64 DIO2 L DIO2 C64 C1 DIO1 Selection of shift clock (CL2) phase. P Shift clock (CL2) phase H data shift at the rising edge of CL2 L data shift at the falling edge of CL2 Selection of oscillation frequency. - aster mode When the frame frequency is 70 Hz, the oscillation frequency should be FS=1 fosc=430khz FS=0 fosc=215khz - Slave mode Connect to DD Selection of display duty. - aster mode DS1 DS2 Duty L L 1/48 L H 1/64 H L 1/96 H H 1/128 -Slave mode Connect to DD Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 4/ 17 P.C: ER: A

5 3 ELECTRICAL PARAETER Wuxi I-CORE Electronics Co., Ltd. 3.1 ABSOLUTE AXIU RATINGS (Tamb=25 C, All voltage referenced to ss, unless otherwise specified) Characteristic Symbol alue Unit Note Operating oltage DD -0.3~+7.0 (1) Supply oltage EE DD-19.0~DD+0.3 (4) Driver Supply oltage B -0.3~DD+0.3 (1),(2) LCD EE-0.3~DD+0.3 (3),(4) Operating Temperature TOPR -30~+85 Storage Temperature TSTG -55~+125 Soldering Temperature T L 245(10s) Note : *1. Based on SS =0 *2. Applies to input terminals and I/O terminals at high impedance. (Except 0L(R), 1L(R), 4L(R) and 5L(R) ) *3. Applies to 0L(R), 1L(R), 4L(R) and 5L(R). *4. oltage level: DD 0L = 0R 1L = 1R 4L = 4R 5L = 5R EE. 3.2 ELECTRICAL CHARACTERISTICS DC Characteristics(DD=+5±10%,SS=0, DD-EE =8~17,Ta=-30~+85 ) Characteristic Symbol condition in Typ ax Unit Note Input H IH 0.7DD DD oltage L IL SS 0.3DD (1) Output IOH=-0.4mA DD-0. H OH oltage 4 (2) L OL IOL=0.4mA 0.4 Input Leakage IN=DD-SS ILKG Current ua (1) OSC Frequency fosc Rf=47KΩ±2% Cf=20pf±5% KHz On Resistance RON DD-EE=17 Load current=±150ua 1.5 KΩ Operating Current IDD1 1/128(aster mode) 1.2 ma (3) IDD2 1/128(Slave mode) 200 ua (4) Supply Current IEE 1/128(aster mode) 100 ua (5) Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 5/ 17 P.C: ER: A

6 Operating Frequency fop1 aster mode External clock fop2 Slave mode *1. Applies to input terminals FS, DS1, DS2, CR, SHL, S and P and I/O terminals DIO1, DIO2, and CL2 in the input state. *2. Applies to output terminals, and and I/O terminals DIO1, DIO2, and CL2 in the output state. *3. This value is specified at about the current flowing through SS. Internal oscillation circuit: Rf=47 kω, Cf=20 pf, Each terminal of DS1, DS2, FS, SHL and S is connected to DD and out is no load. *4. This value is specified at about the current flowing through SS. Each terminal of DS1, DS2, FS, SHL, P and CR is connected to DD, and S is connected to SS. CL2,, DIO1 is external clock. *5. This value is specified at about the current flowing through EE. Don t connect to LCD (~5). KHz AC Characteristics(DD=5±10%,TA=-30 ~+85 ) aster mode(s=dd,p=dd,cf=20pf,rf=47kω) CL2 0.7DD 0.3DD t WLC tsu twhc t DH tsu t WHC DIO1(SHL= DD) DIO2(SHL= SS ) t D DIO2(SHL= DD ) DIO1(SHL= SS ) t D t DF t D t D 0.7DD 0.3DD t F t R t WH1 t WL1 t D12 t D21 t F t R t WH2 Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 6/ 17 P.C: ER: A

7 Characteristic Symbol in Typ ax Unit Data Setup Time tsu 20 Data Hold Time tdh 40 Data Delay Time td 5 Delay Time tdf -2 2 us Delay Time td -2 2 CL2 Low Level Widt twlc 35 CL2 High Level Width twhc 35 Low Level Width twl1 700 Low Level Width twl2 700 High Level Width twh High Level Width twh ns - Phase Difference td Phase Difference TD21 700, Rise/Fall Time tr/tf 150 Slave mode (S= SS ) CL2(PLK2= SS ) t F t R t WLC1 t WHC1 0.7DD 0.3DD t SU t WHC2 t WLC CL2(PLK2= DD ) DIO1(SHL= DD ) DIO2(SHL= SS ) 输入数据 DIO1(SHL= DD ) DIO2(SHL= SS ) 输出数据 t R t F t H t D 0.7DD 0.3DD 0.7DD 0.3DD t HCL Characteristics Symbol in Typ ax Unit Note CL2 Low Level Width twlc1 450 ns P=SS CL2 High Level Width twhc1 150 ns P=SS CL2 Low Level Width twlc2 150 ns P=DD CL2 High Level Width twhl 450 ns P=DD Data Setup Time tsu 100 ns Data Hold Time tdh 100 ns Data Delay Time td 200 ns *1 Output Data Hold Time th 10 ns CL2 Rise/Fall Time tr/tf 30 ns Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 7/ 17 P.C: ER: A

8 *1; Connect load CL=30 pf Wuxi I-CORE Electronics Co., Ltd. 4 TYPICAL APPLICATION CIRCUIT AND FUNCTION DESCRIPTION 4. 1 APPLICATION CIRCUIT 15 CS3 CS2B CS1B DB0-DB7 AIP31108 RSTB E R/W RS DD 0R/L 2R/L 3R/L 5R/L EE CL S1... S64 SS SEG128 S1... S64 EE 0R/L 2R/L AIP R/L 5R/L CL CS3 CS2B CS1B DB0-DB7 RSTB E R/W RS DD SS 15 LCD Panel 15 CS3 CS2B CS1B DB0-DB7 RSTB E R/W DD 0R/L 2R/L 3R/L 5R/L EE RS AIP31108 CL S1... S64 SS SEG1 CO1 CO128 S1... S64 EE 0R/L 2R/L 3R/L 5R/L AIP31108 CL CS3 CS2B CS1B DB0-DB7 RSTB E R/W RS DD SS 15 RS R/W E RSTB DB0-DB7 CS1B CS2B CS3 PU EE 5 C1 R 1 C C1 R DS1 DS2 P S FS SHL DD SS 0R/L... C64 DIO1 CR DIO2 CL2 AIP31107 R/L R/L 5R/L EE open open 2 C1 DIO2 C64 P FS DS1 KS2 SHL CL2 AIP31107 C CR R DD... 0R/L R/L R/L 5R/L EE SS S open open open open open DD 15 DD Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 8/ 17 P.C: ER: A

9 4. 2 APPLICATION NOTE Functional Description RC Oscillator The RC Oscillator generates CL2,, of the AIP31107, and and of the AIP31108 by the oscillation resister R and capacitor C. When selecting the master/slave mode, the oscillation circuit is as following: 1) aster ode: in the master mode, use these terminals as shown below. R R f AIP31107 CR C f C 47KΩ 20PF AIP31107 R CR C Open External Open 2) Slave ode: in the slave mode, stop the oscillator as shown below. AIP31107 R CR C Open DD Open Timing Generation Circuit It generates CL2,,, and by the frequency from the oscillation circuit. 1) Selection of aster/slave (/S) ode When /S is H, it generates CL2,,, and internally. When /S is L, it operates by receiving and CL2 from the master device. 2) Frequency Selection (FS) To adjust frequency by 70 Hz, the oscillation frequency should be as follows: FS H L Oscillation Frequency fosc=430khz fosc=215khz In the slave mode, it is connected to DD 3) Duty Selection (DS1, DS2) It provides various duty selections according to DS1 and DS2. DS1 DS2 Duty L H L 1/48 H 1/64 L 1/96 H 1/128 Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 9/ 17 P.C: ER: A

10 Data Shift & Phase Select Control 1) Phase Selection It is a circuit to shift data on synchronization or rising edge, or falling edge of the CL2 according to P. P H L Phase Selection Data shift on rising edge of CL2 Data shift on falling edge of CL2 2) Data Shift Direction Selection When /S is connected to DD, DIO1 and DIO2 terminal is only output. When /S is connected to SS, it depends on the SHL. S SHL DIO1 DIO2 Direction of Data H L H O O C1 C64 L O O C64 C1 H I O DIO1 C1 C64 DIO2 L O I DIO2 C64 C1 DIO1 Timing Diagram 1/48 Duty Timing (aster ode) Condition: DS1=L, DS2=L, SHL=H(L), P=H C CL2 DIO1(DIO2) C1(C48) C2(C47) C47(C2) 5 C48(C1) DIO2(DIO1) Relation of CL2&DIO1(DIO2) CL2 DIO1(DIO2) Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 10/ 17 P.C: ER: A

11 1/128 duty timing (aster mode) Condition: DS1=H, DS2=H, SHL=H(L), P=H C CL2 C2(C127) DIO1(DIO2) C1(C128) C127(C2) 5 C128(C1) DIO2(DIO1) Relation of CL2&DIO1(DIO2) CL2 DIO1(DIO2) 1/48 Duty Timing (Slave ode) Condition: P=L, SHL=H(L) CL2 DIO1(DIO2) C1(C48) C2(C47) C47(C2) C48(C1) DIO2(DIO1) Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 11/ 17 P.C: ER: A

12 Power Driver Circuit DD R1 0 0L/R DD L/R R1 2 R2 3 To AIP31108 AIP31107 R1 L/R R1 5 5L/R EE R EE Relation of duty & bias Duty Bias RDI 1/48 1/8 R2=4R1 1/64 1/9 R2=5R1 1/96 1/11 R2=7R1 1/128 1/12 R2=8R1 *When duty factor is 1/48, the value of R1 & R2 should satisfy. R1/(4R1+R2)=1/8,R1=3 K, R2=12 K Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 12/ 17 P.C: ER: A

13 5 PAD DIAGRA AND PAD LOCATION 5.1 PAD DIAGRA Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 13/ 17 P.C: ER: A

14 5.2 PAD Location (UNIT:µm) 序号 PAD 名 X Y 序号 PAD 名 X Y 1 C NC 2 C CL C NC 4 C R C R C R C R C EE C C C C C C C C C C C C C C C C C C C C C C C C C C C C EE C L C L C L C L C DD C DIO C FS C Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 14/ 17 P.C: ER: A

15 31 DS C DS C C C NC 84 C R C NC 86 C CR C NC 88 C SHL C ss C NC 91 C S C C C NC 95 C C C NC 98 C P C DIO C Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 15/ 17 P.C: ER: A

16 6 PACKAGE INFORATION 6. 1 QFP Wuxi I-CORE Electronics Co., Ltd. Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 16/ 17 P.C: ER: A

17 7 STATEENTS AND NOTES: 7.1 The name and content of Hazardous substances or Elements in the product Part name Lead and lead compounds ercury and mercury compounds Hazardous substances or Elements Cadmium and cadmium compounds Hexavalent chromium compounds Polybrominated biphenyls Polybrominated biphenyl ethers Lead frame Plastic resin Chip The lead Plastic sheet installed :Indicates that the content of hazardous substances or elements in the detection limit explanation of the following the SJ/T standard :Indicates that the content of hazardous substances or elements exceeding the SJ/T Standard limit requirements 7.2 NOTION: Recommended carefully reading this information before the use of this product; The information in this document are subject to change without notice; This information is using to the reference only, the company is not responsible for any loss; The company is not responsible for the any infringement of the third party patents or other rights of the responsibility. 8 CONTACT: Wuxi I-CORE Electronics Co., Ltd. Addr:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China P.C: Tel: Fax: arketing Department:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China P.C: Tel: Fax: Shenzhen office:26f Building12, xiangli garden hongli west Road, Shenzhen, Guangdong,China P.C: Tel: Fax: Guangzhou office:901room-57,ledegarden, leming fiest street,guanghua Road, baiyun District,Guangzhou,China Tel: Applied Technical Services: Application Department: Fax: F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China P.C: Tel: Fax: F Building12, xiangli garden hongli west Road, Shenzhen, Guangdong,China P.C: Tel: Fax: With collaboration of Address:2F Building9,100Di cui Road, LiYuan Development Zone, Wuxi, jiangsu, China 17/ 17 P.C: ER: A

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