34346-OP. AUG. 06, 2003 Version 0.1

Transcription

1 34346-OP DATA SHEET SPLC78D 6COM/4SEG Controller/Driver Preliminary AUG. 6, 23 Version. Information including Drawings, Schematics, Links and Code (Software) Supplied or eferenced in this Document is supplied by MPJA inc. as a service to our customers and accuracy or usefulness is not guaranteed nor is it an Endorsement of any particular part, supplier or manufacturer. Use of information and suitability for any application is at users own discretion and user assumes all risk. All rights are retained by the respective Owners/Author(s) SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.

2 SPLC78D Table of Contents PAGE. GENEAL DESCIPTION FEATUES BLOCK DIAG SIGNAL DESCIPTIONS ODEING INFOMATION FUNCTIONAL DESCIPTIONS OSCILLATO CONTOL AND DISPLAY INSTUCTIONS INSTUCTION TABLE BIT OPEATION AND 8-DIGIT -LINE DISPLAY (USING INTENAL ESET) BIT OPEATION AND 8-DIGIT -LINE DISPLAY (USING INTENAL ESET) BIT OPEATION AND 8-DIGIT 2-LINE DISPLAY (USING INTENAL ESET) ESET FUNCTION DISPLAY DATA (DD ) TIMING GENEATION CICUIT LCD DIVE CICUIT CHAACTE GENEATO OM ( OM) CHAACTE GENEATO ( ) CUSO /BLINK CONTOL CICUIT INTEFACING TO MPU SUPPLY VOLTAGE FO LCD DIVE EGISTE --- I (INSTUCTION EGISTE ) AND D (DATA EGISTE) BUSY FLAG (BF) ADDESS COUNTE (AC) I/O POT CONFIGUATION ELECTICAL SPECIFICATIONS ABSOLUTE MAXIMUM ATINGS DC CHAAC TEISTICS ( = 2.7V TO 4.5V, T A = 25 ) AC CHAACTEISTICS ( = 2.7V TO 4.5V, T A = 25 ) DC CHAACTEISTICS ( = 4.5V TO 5.5V, TA = 25 ) AC CHAACTEISTICS ( = 4.5V TO 5.5V, T A = 25 ) APPLICATION CICUITS OSCILLATO INTEFACE TO MPU SPLC78D A PPLICATION CICUIT APPLICATIONS FO LCD CHAACTE GENEATO OM SPLC78D AUG. 6, 23 Preliminary Version:.

3 SPLC78D 6COM/4SEG CONTOLLE/DIVE. GENEAL DESCIPTION The SPLC78D, a dot-matrix LCD controller and driver from SUNPLUS, is a unique design for displaying alpha-numeric, Japanese-Kana characters and symbols. The SPLC78D provides two types of interfaces to MPU: 4-bit and 8-bit interfaces. The transferring speed of 8-bit is twice faster than 4-bit. A single SPLC78D is able to display up to two 8-character lines. By cascading with SPLC or SPLC63, the display capability can be extended. The CMOS technology ensures the power saves in the most efficient way and the performance keeps in the highest rank. 2. FEATUES Character generator OM: 88 bits Character font 5 x 8 dots: 92 characters Character font 5 x dots: 64 characters Character generator : 52 bits Character font 5 x 8 dots: 8 characters Character font 5 x dots: 4 characters 4-bit or 8-bit MPU interfaces Direct driver for LCD: 6 COMs x 4 SEGs Duty factor (selected by program): /8 duty: line of 5 x 8 dots / duty: line of 5 x dots /6 duty: 2 lines of 5 x 8 dots / line Built-in power on automatic reset circuit Built-in oscillator circuit (with external resistor) Support external clock operation Low Power Consumption Package form: 8 QFP or bare chip available 3. BLOCK DIAG OSC OSC2 Timing Generation Circuit CL,CL2 M VSS DB-DB3 DB4-DB7 S /W E Power Supply for LCD Drive : (V-V5) I / O Buffer Parallel to Serial Data Conversion Circuit Busy Flag 8 8 Data egister Instruction egister Character Generator OM Instruction Decorder 7 Character Generator Address Counter Cursor Blink Control Circuit 8 Display Data 8 Bytes 4-bit Shift egister Latch Circuit 4 6-bit Shift egister 4 4 Segments x 6 Commons 6 LCD Driver D COM- COM6 SEG- SEG4 3 AUG. 6, 23 Preliminary Version:.

4 SPLC78D 4. SIGNAL DESCIPTIONS Mnemonic PIN No. Type Description 33 I Power input VSS 23 I Ground OSC OSC Both OSC and OSC2 are connected to resistor for internal oscillator circuit. For external clock operation, the clock is input to OSC. V - V I Supply voltage for LCD driving. E 38 I A start signal for reading or writing data. /W 37 I A signal for selecting read or write actions. : ead, : Write. S 36 I A signal for selecting registers. : Data egister (for read and write) : Instruction egister (for write), Busy flag - Address Counter (for read). DB - DB I/O Low 4-bit data DB4 - DB I/O High 4-bit data CL 3 O Clock to latch serial data D. CL2 32 O Clock to shift serial data D. M 34 O Switch signal to convert LCD waveform to AC. D 35 O Sends character pattern data corresponding to each common signal serially. : Selection, : Non-selection. SEG - SEG O Segment signals for LCD. SEG23 - SEG COM - COM O Common signals for LCD. 4.. Ordering Information Product Number SPLC78D-NnnV-C SPLC78D-NnnV-PQ5 Note: Code number is assigned for customer. Note2: Code number (N = A - Z or - 9, nn = - 99); version (V = A - Z). Chip form Package Type Package form - QFP 8L 4 AUG. 6, 23 Preliminary Version:.

5 SPLC78D 5. FUNCTIONAL DESCIPTIONS 5.. Oscillator SPLC78D oscillator supports not only the internal oscillator operation, but also the external clock operation Control and Display Instructions Control and display instructions are described in details as follows: S = I / D = It shifts the display to the left S = I / D = It shifts the display to the right Display ON/OFF control Clear display Code S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB D C B S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Code It clears the entire display and sets Display Data Address in Address Counter eturn home D = : Display on, D = : Display off C = : Cursor on, C = : Cursor off B = : Blinks on, B= : Blinks off 5 x 8 dot character font 5 x dot character font Code S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB X 8th line X: Do not care ( or ) Cursor th line It sets Display Data Address in Address Counter and the display returns to its original position. The cursor or blink goes to the most-left side of the display (to the st line if 2 lines are displayed). The contents of the Display Data do not change Entry mode set Cursor or display shift Without changing DD data, it moves cursor and shifts display. S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Code S/C /L X X During writing and reading data, it defines cursor moving direction and shifts the display. Code S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB I / D S I / D = : Increment, I / D = : Decrement. S = : The display shift, S = : The display does not shift. Blink display alternately S/C /L Description Address Counter Shift cursor to the left AC = AC - Shift cursor to the right AC = AC + Shift display to the left. Cursor follows the display shift AC = AC Shift display to the right. Cursor follows the display shift AC = AC 5 AUG. 6, 23 Preliminary Version:.

6 SPLC78D Function set S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Display data can be read or written after this setting. Code DL N F X X In one-line display (N = ), (aaaaaaa) 2: () 6 - (4F) 6. X: Do not care ( or ) DL: It sets interface data length. DL = : Data transferred with 8-bit length (DB7 - ). DL = : Data transferred with 4-bit length (DB7-4). It requires two times to accomplish data transferring. N: It sets the number of the display line. N = : One-line display. N = : Two-line display. F: It sets the character font. F = : 5 x 8 dots character font. F = : 5 x dots character font. N F No. of Display Lines Character Font Duty Factor 5 x 8 dots / 8 5 x dots / X 2 5 x 8 dots / 6 In two-line display (N = ), (aaaaaaa) 2: () 6 - (27) 6 for the first line, (aaaaaaa) 2: (4) 6 - (67) 6 for the second line ead busy flag and address S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Code BF a a a a a a a When BF =, it indicates the system is busy now and it will not accept any instruction until not busy (BF = ). At the same time, the content of Address Counter (aaaaaaa) 2 is read Write data to character generator or display data It cannot display two lines with 5 x dots character font Set character generator address Code S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB d d d d d d d d Code S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB a a a a a a It writes data (dddddddd) 2 to character generator or display data. It sets Character Generator Address (aaaaaa) 2 to the Address Counter ead data from character generator or display data S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Character Generator data can be read or written after this Code d d d d d d d d setting Set display data address S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB Code a a a a a a a It sets Display Data Address (aaaaaaa) 2 to the Address Counter. It reads data (dddddddd) 2 from character generator or display data. To read data correctly, do the following: ). The address of the Character Generator or Display Data or shift the cursor instruction. 2). The ead instruction. 6 AUG. 6, 23 Preliminary Version:.

7 SPLC78D 5.3. Instruction Table Instruction Instruction Code Execution time Description S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB (fosc=27khz) Clear Display Write "2H" to DD and set DD.52ms address to "H" from AC eturn Home - Set DD address to "H" from AC and.52ms return cursor to its original position if shifted. The contents of DD are not changed. Entry Mode I/D S Assign cursor moving direction and enable 38µs Set the shift of entire display Display ON/ OFF Control D C B Set display(d), cursor(c), and blinking of cursor(b) on/off control bit. 38µs Cursor or Display Shift S/C /L - - Set cursor moving and display shift control bit, and the direction, without changing of DD data. 38µs Function Set DL N F - - Set interface data length (DL: 8-bit/4-bit), numbers of display line (N: 2-line/-line) and, display font type (F:5x dots/5x8 dots) 38µs Set Address AC5 AC4 AC3 AC2 AC AC Set address in address counter. 38µs Set DD AC6 AC5 AC4 AC3 AC2 AC AC Set DD address in counter 38µs Address ead Busy Flag BF AC6 AC5 AC4 AC3 AC2 AC AC Whether during internal operation or not and Address can be known by reading BF. The Counter contents of address counter can also be read. Write Data to D7 D6 D5 D4 D3 D2 D D Write data into internal 38µs (DD/). ead Data from D7 D6 D5 D4 D3 D2 D D ead data from internal 38µs (DD/). Note: "-": don't care 7 AUG. 6, 23 Preliminary Version:.

8 SPLC78D Bit Operation and 8-Digit -Line Display (Using Internal eset) No. Instruction Display Operation Power on. (SPLC78D starts initializing) Power on reset. No display. 2 Function set Set to 8-bit operation and select -line display line and character font. S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X 3 Display on / off control _ Display on. Cursor appear. 4 Entry mode set _ 5 Write data to / DD W_ Increase address by one. It will shift the cursor to the right when writing to the DD /. Now the display has no shift. Write " W ". The cursor is incremented by one and shifted to the right. 6 Write data to / DD WE_ Write " E ". The cursor is incremented by one and shifted to the right. 7 : : 8 Write data to / DD WELCOME_ Write " E ". The cursor is incremented by one and shifted to the right. 9 Entry mode set Write data to / DD Write data to / DD WELCOME_ ELCOME _ LCOME C_ Set mode for display shift when writing Write " "(space). The cursor is incremented by one and shifted to the right. Write " C ". The cursor is incremented by one and shifted to the right. 2 : : 3 Write data to / DD COMPAMY_ Write " Y ". The cursor is incremented by one and shifted to the right. 4 Cursor or display shift X X 5 Cursor or display shift X X 6 Write data to / DD 7 Cursor or display shift X X 8 Cursor or display shift X X 9 Write data to / DD COMPAMY_ COMPAMY_ OMPANY_ COMPAMY_ OMPANY_ COMPAMY_ Only shift the cursor's position to the left (Y). Only shift the cursor's position to the left (M). Write " N ". The display moves to the left. Shift the display and the cursor's position to the right. Shift the display and the cursor's position to the right. Write " " (space). The cursor is incremented by one and shifted to the right. 2 : : : 2 eturn home Both the display and the cursor return to the original position (address ). WELCOME_ 8 AUG. 6, 23 Preliminary Version:.

9 SPLC78D Bit Operation and 8-Digit -Line Display (Using Internal eset) No. Instruction Display Operation Power on. Power on reset. No display. (SPLC78D starts initializing) 2 Function set S /W DB7 DB6 DB5 DB4 Set to 4-bit operation. 3 Set to 4-bit operation and select -line display line and character font. X X 4 _ Display on. Cursor appears. 5 6 _ W_ Increase address by one. It will shift the cursor to the right when writing to the DD /. Now the display has no shift. Write " W ". The cursor is incremented by one and shifted to the right Bit Operation and 8-Digit 2-Line Display (Using Internal eset) No. Instruction Display Operation Power on. (SPLC78D starts initializing) 2 Function set S /W DB7 DB6 DB5 DB4 DB3 DB2 DB DB X X 3 Display on / off control 4 Entry mode set _ Power on reset. No display. Set to 8-bit operation and select 2-line display line and 5 x 8 dot character font. Display on. Cursor appear. Increase address by one. _ It will shift the cursor to the right when writing to the DD /. Now the display has no shift. 5 Write data to / DD W_ Write " W ". The cursor is incremented by one and shifted to the right. 6 : : : 7 Write data to / DD WELCOME_ Write " E ". The cursor is incremented by one and shifted to the right. 8 Set DD address 9 Write data to / DD WELCOME _ WELCOME T_ It sets DD 's address. The cursor is moved to the beginning position of the 2nd line. Write " T ". The cursor is incremented by one and shifted to the right. : : : Write data to / DD WELCOME TO PAT_ Write " T ". The cursor is incremented by one and shifted to the right. 9 AUG. 6, 23 Preliminary Version:.

10 SPLC78D No. Instruction Display Operation 2 Entry mode set 3 Write data to / DD WELCOME TO PAT_ ELCOME O PATY_ When writing, it sets mode for the display shift. Write " Y ". The cursor is incremented by one and shifted to the right. 4 : : : 5 eturn home WELCOME TO PATY Both the display and the cursor return to the original position (address ) eset Function At power on, SPLC78D starts the internal auto-reset circuit and executes the initial instructions. The initial procedures are shown as follows: Power On [ 8-Bit Interface ] Wait time > 5 ms after > 4.5V Wait time > 4ms After > 2.7V S /W DB7 DB6 DB5 DB4 DB3 DB3 DB DB X X X X BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) Wait time > 4. ms S /W DB7 DB6 DB5 DB4 DB3 DB3 DB DB X X X X BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) Wait time > us S /W DB7 DB6 DB5 DB4 DB3 DB3 DB DB X X X X BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) S /W DB7 DB6 DB5 DB4 DB3 DB3 DB DB N F X X I/D S Initialization Ends BF can be checked after the following instructions. Function set ( Interface is 8 bits length. Specify the number of display lines and character font. ) The number of display lines and character font cannot be changed afterwards. Display off Display clear Entry mode set AUG. 6, 23 Preliminary Version:.

11 SPLC78D Power On [ 4-Bit Interface ] Wait time > 5 ms after > 4.5V Wait time > 4ms After > 2.7V S /W DB7 DB6 DB5 DB4 BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) Wait time > 4. ms S /W DB7 DB6 DB5 DB4 BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) Wait time > us S /W DB7 DB6 DB5 DB4 BF cannot be checked before this instruction. Function set ( Interface is 8 bits length. ) S /W DB7 DB6 DB5 DB4 N F X X I/D S Initialization Ends BF can be checked after the following instructions. Function set ( Set interface to be 4 bits length) Interface is 8 bits length. Function set ( Interface is 4 bits length. Specify the number of the display lines and character font. ) The number of display lines and character font cannot be changed afterwards. Display off Display clear Entry mode set AUG. 6, 23 Preliminary Version:.

12 SPLC78D 5.8. Display Data (DD ) The 8-bit DD is normally used for storing display data. Those DD not used for display data can be used as general data. Its address is configured in the Address Counter. The relationships between Display Data Address and LCD s position are depicted as follows. -line display, 8 display characters ( Example ) -line display, 8 display characters E 4F Display position Display data address Display position Display data address When the display shift operation is performed, the display data 's address moves as : ( i ) Left shift ( ii ) ight shift 8 4F Timing Generation Circuit The timing generating circuit is able to generate timing signals to the internal circuits. In order to prevent the internal timing interface, the MPU access timing and the access timing are generated independently. 5.. Character Generator OM ( OM) Using 8-bit character code, the character generator OM generates 5 x 8 dots or 5 x dots character patterns. It also can generate 92 s 5 x 8 dots character patterns and 64 s 5 x dots character patterns. 5.. LCD Driver Circuit Total of 6 commons and 4 segments signal drivers are valid in the LCD driver circuit. When a program specifies the character fonts and line numbers, the corresponding common signals output drive-waveforms and the others still output unselected waveforms Character Generator ( ) Users can easily change the character patterns in the character generator through program. It can be written to 5 x 8 dots, 8-character patterns or 5 x dots for 4-character patterns. 2 AUG. 6, 23 Preliminary Version:.

13 SPLC78D The following diagram shows the SPLC78D character patterns: Correspondence between Character Codes and Character Patterns. Higher 4-bit (D4 to D7) of Character Code (Hexadecimal) A B C D E F () (2) 2 (3) 3 (4) 4 (5) Lower 4-bit (D to D3) of Character Code (Hexadecimal) A (6) (7) (8) () (2) (3) B (4) C (5) D (6) E (7) F (8) 3 AUG. 6, 23 Preliminary Version:.

14 SPLC78D The relationships between Character Generator Addresses, Character Generator Data (character patterns), and Character Codes are depicted as follows: x 8 dot character patterns Character Code ( DD Data ) Address Character Patterns ( Data ) b7 b6 b5 b4 b3 b2 b b b5 b4 b3 b2 b b b7 b6 b5 b4 b3 b2 b b X X X X X X X X Character Pattern Example () Cursor Position Character Pattern Example (2) Note: It means that the bit~2 of the character code correspond to the bit3~5 of the address. Note2: These areas are not used for display, but can be used for the general data. Note3: When all of the bit4-7 of the character code are, character patterns are selected. Note4: " ": Selected, " " : No selected, " X " : Do not care ( or ). Note5: For example (), set character code (b2 = b = b =, b3 = or, b7-b4 = ) to display T. That means character code () 6,and (8) 6 can display T character. Note6: The bits -2 of the character code is the character pattern line position. The 8th line is the cursor position and display is formed by logical O with the cursor. 4 AUG. 6, 23 Preliminary Version:.

15 SPLC78D X dot character patterns Character Code ( DD Data ) Address Character Patterns ( Data ) b7 b6 b5 b4 b3 b2 b b b5 b4 b3 b2 b b b7 b6 b5 b4 b3 b2 b b X X X X X X X X X X X X X Character Pattern Example () Cursor Position Note: It means that the bit~2 of the character code correspond to the bit4~5 of the address. Note2: These areas are not used for display, but can be used for the general data. Note3: When all of the bit4-7 of the character code are, character patterns are selected. Note4: " : Selected, " : No selected, " X : Do not care ( or ). Note5: For example (), set character code (b2 = b =, b3 = b = or, b7-b4 = ) to display U. That means all of the character codes () 6, () 6, (8) 6,and (9) 6 can display U character. Note6: The bits -3 of the character code is the character pattern line position. The th line is the cursor position and display is formed by logical O with the cursor. 5 AUG. 6, 23 Preliminary Version:.

16 SPLC78D 5.3. Cursor/Blink Control Circuit This circuit generates the cursor or blink in the cursor / blink control circuit. The cursor or the blink appears in the digit at the Display Data Address defined in the Address Counter. When the Address Counter is (7) 6, the cursor position is shown as belows: b6 b5 b4 b3 b2 b b AC In a -line display digit the cursor position Display position Display data address ( Hexadecimal ) In a 2-line display digit st line 2nd line Display position Display data address ( Hexadecimal ) the cursor position 5.4. Interfacing to MPU There are two types of data operations: 4-bit and 8-bit operations. Using 4-bit MPU, the interfacing 4-bit data is transferred by 4-busline (DB4 to DB7). Thus, DB to DB3 bus lines are not used. Using 4-bit MPU to interface 8-bit data requires two times transferring. First, the higher 4-bit data is transferred by 4-busline (for 8-bit operation, DB7 to DB4). Secondly, the lower 4-bit data is transferred by 4-busline (for 8-bit operation, DB3 to DB). For 8-bit MPU, the 8-bit data is transferred by 8-buslines (DB to DB7) Supply Voltage for LCD Drive Different voltages can be supplied to SPLC78D s pins (V5 - ) for obtaining LCD drive-waveform. The relationships between bias, duty factor and supply voltages are shown as belows: Duty Factor Supply Voltage /8, / /4 /6 /5 V /4 V LCD /5 V LCD V2 /2 V LCD 2/5 V LCD V3 /2 V LCD 3/5 V LCD V4 3/4 V LCD 4/5 V LCD V5 V LCD V LCD 6 AUG. 6, 23 Preliminary Version:.

17 SPLC78D The power connections for LCD (/4 Bias, /5 Bias) are shown belows: ( +5.V ) ( +5.V ) V V V2 V2 VLCD VLCD V3 V3 V4 V4 V5 V5 / 4 Bias V / 5 Bias V (/8,/ Duty) -V or Gnd (/6 Duty) -V or Gnd The bypass-capacitor improves the LCD display quality. ( +5.V ) ( +5.V ) V C V C V2 V3 V4 C C V2 V3 V4 C C C V5 C V5 C / 4 Bias V / 5 Bias V (/8,/ Duty) -V or Gnd (/6 Duty) -V or Gnd The bias voltage must have the following relations: > V > V2 V3 > V4 > V5. 7 AUG. 6, 23 Preliminary Version:.

18 SPLC78D The relationship between LCD frame s frequency and oscillator s frequency. (Assume the oscillation frequency is 25KHz, clock cycle time = 4.µs) /8 Duty, TYPE-B waveform 4 clocks VPP V COM V2(V3) V4 VSS Frame Frame frame = 4(µs) x 4 x 8 = 28(µs) = 2.8ms Frame frequency = = 78.(Hz) 2.8(ms) / Duty, TYPE-B waveform 4 clocks VPP V COM V2(V3) V4 VSS 2 2 Frame Frame 2 frame = 4(µs) x 4 x = 76(µs) = 7.6ms Frame frequency = = 56. 8(Hz) 7.6(ms) /6 Duty, TYPE-B waveform 2 clocks COM VPP V V2 V3 V4 VSS Frame Frame frame = 4(µs) x 2 x 6 = 28(µs) = 2.8ms Frame frequency = = 78.(Hz) 2.8(ms) 8 AUG. 6, 23 Preliminary Version:.

19 SPLC78D 5.6. EGISTE --- I (Instruction egister) and D (Data egister) SPLC78D contains two 8-bit registers: Instruction egister (I) and Data egister (D). Using combinations of the S pin and the /W pin selects the I and D, see below: 5.9. I/O Port Configuration Input port: E PMOS S /W Operation I write (Display clear, etc.) ead busy flag (DB7) and Address Counter (DB - DB6) D write (D to Display data or Character generator ) D read (Display data or Character generator to D) The I can be written by MPU, but it cannot be read by MPU Busy Flag (BF) Input port: /W, S PMOS NMOS PMOS NMOS When S = and /W =, the busy flag is output to DB7. As the busy flag =, SPLC78D is in busy state and does not accept any instruction until the busy flag = Address Counter (AC) The Address Counter assigns addresses to Display Data and Character Generator. When an instruction for address is written in I, the address information is sent from I to AC. After writing to/reading from Display Data or Character Generator, AC is automatically incremented by one (or decremented by one). The contents of AC are output to DB - DB6 when S = and /W = Output port: CL, CL2, M, D PMOS NMOS Input / Output port: DB7 - DB Enable PMOS PMOS NMOS Data 9 AUG. 6, 23 Preliminary Version:.

20 SPLC78D 6. ELECTICAL SPECIFICATIONS 6.. Absolute Maximum atings Characteristics Symbol atings Operating Voltage -.3V to +7.V Driver Supply Voltage V LCD - 2V to +.3V Input Voltage ange V IN -.3V to +.3V Operating Temperature T A -3 to +8 Storage Temperature T STO -55 to +25 Note: Stresses beyond those given in the Absolute Maximum ating table may cause operational errors or damage to the device. For normal operational conditions see AC/DC Electrical Characteristics DC Characteristics ( = 2.7V to 4.5V, TA = 25 ) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Operating Current I DD ma External clock (Note) Input High Voltage V IH.7 - V Input Low Voltage V IL V Input High Voltage V IH2.7 - V Input Low Voltage V IL V Input High Current I IH µa Input Low Current I IL µa Output High Voltage (TTL) Output Low Voltage (TTL) Output High Voltage (CMOS) Output Low Voltage (CMOS) Driver ON esistance (COM) Driver ON esistance (SEG) V OH V V OL V V OH V V OL V COM KΩ SEG KΩ Pins:(E, S, /W, DB - DB7) Pin OSC Pins: (S, /W, DB - DB7) = 3.V I OH = -.ma Pins: DB - DB7 I OL =.ma Pins: DB - DB7 I OH = - 4µA, Pins: CL, CL2, M, D I OL = 4µA, Pins: CL, CL2, M, D I O = 5µA, V LCD = 4.V Pins: COM - COM6 I O = 5µA, V LCD = 4.V Pins: SEG - SEG4 LCD Voltage V LCD V -V5, /4 bias or /5 bias Note: F OSC = 25KHz, = 3.V, pin E = L, S, /W, DB - DB7 are open, all outputs are no loads. 2 AUG. 6, 23 Preliminary Version:.

21 SPLC78D 6.3. AC Characteristics ( = 2.7V to 4.5V, TA = 25 ) Internal clock operation Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition OSC Frequency F OSC KHz = 3.V, f = 75KΩ 2% External clock operation Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition External Frequency F OSC KHz Duty Cycle % ise/fall Time t r, t f µs Write mode (Writing data from MPU to SPLC78D) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition E Cycle Time t C - - ns Pin E E Pulse Width t PW ns Pin E E ise/fall Time t, t F ns Pin E Address Setup Time t SP ns Pins: S, /W, E Address Hold Time t HD ns Pins: S, /W, E Data Setup Time t SP ns Pins: DB - DB7 Data Hold Time t HD2 - - ns Pins: DB - DB ead mode (eading data from SPLC78D to MPU) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition E Cycle Time t C - - ns Pin E E Pulse Width t W ns Pin E E ise/fall Time t, t F ns Pin E Address Setup Time t SP ns Pins: S, /W, E Address Hold Time t HD ns Pins: S, /W, E Data Output Delay Time t D ns Pins: DB - DB7 Data hold time t HD ns Pin DB - DB7 2 AUG. 6, 23 Preliminary Version:.

22 SPLC78D 6.4. DC Characteristics ( = 4.5V to 5.5V, TA = 25 ) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Operating Current I DD ma External clock (Note) Input High Voltage V IH V Pins:(E, S, /W, DB - DB7) Input Low Voltage V IL V Input High Voltage V IH2 - - V Pin OSC Input Low Voltage V IL V Pin OSC Input High Current I IH µa Input Low Current I IL µa Output High Voltage (TTL) Output Low Voltage (TTL) Output High Voltage (CMOS) Output Low Voltage (CMOS) Driver ON esistance (COM) Driver ON esistance (SEG) V OH V V OL V V OH2.9 - V V OL V COM KΩ SEG KΩ Pins: (S, /W, DB - DB7) = 5.V I OH = -.ma Pins: DB - DB7 I OL =.ma Pins: DB - DB7 I OH = - 4µA, Pins: CL, CL2, M, D I OL = 4µA, Pins: CL, CL2, M, D I O = 5µA, V LCD = 4.V Pins: COM - COM6 I O = 5µA, V LCD = 4.V Pins: SEG - SEG4 LCD Voltage V LCD 3. - V -V5, /4 bias or /5 bias Note: FOSC = 25KHz, = 5.V, pin E = L, S, /W, DB - DB7 are open, all outputs are no loads AC Characteristics ( = 4.5V to 5.5V, TA = 25 ) Internal clock operation Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition OSC Frequency F OSC KHz = 5.V, f = 9KΩ 2% External clock operation Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition External Frequency F OSC KHz Duty Cycle % ise/fall Time t r, t f µs 22 AUG. 6, 23 Preliminary Version:.

23 SPLC78D Write mode (Writing Data from MPU to SPLC78D) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition E Cycle Time t C ns Pin E E Pulse Width t PW ns Pin E E ise/fall Time t, t F ns Pin E Address Setup Time t SP ns Pins: S, /W, E Address Hold Time t HD - - ns Pins: S, /W, E Data Setup Time t SP ns Pins: DB - DB7 Data Hold Time t HD2 - - ns Pins: DB - DB ead mode (eading Data from SPLC78D to MPU) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition E Cycle Time t C ns Pin E E Pulse Width t W ns Pin E E ise/fall Time t, t F ns Pin E Address Setup Time t SP ns Pins: S, /W, E Address Hold Time t HD - - ns Pins: S, /W, E Data Output Delay Time t D ns Pins: DB - DB7 Data hold time t HD ns Pin DB - DB Interface mode with LCD Driver (SPLCA) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Clock pulse width high t PWH ns Pins: CL, CL2 Clock pulse width low t PWL ns Pins: CL, CL2 Clock setup time t CSP ns Pins: CL, CL2 Data setup time t DSP ns Pins: D Data hold time t HD ns Pins: D M delay time t D - - ns Pins: M 23 AUG. 6, 23 Preliminary Version:.

24 SPLC78D Write mode timing diagram (Writing Data from MPU to SPLC78D) S VIH VIL tsp VIH VIL thd / W VIL VIL tpw tf thd E VIH VIL VIH VIL VIL DB7 - t VIH VIL tsp2 thd2 Valid Data VIH VIL tc ead mode timing diagram (eading Data from SPLC78D to MPU) S VIH VIL tsp V IH V IL thd / W VIH VIH E V IH V IL tpw V IH V IL tf thd VIL DB - DB7 t td V IH V IL Valid Data thd2 V IH V IL tc Interface mode with SPLCA timing diagram CL.9 tpwh.9 tpwh CL2. tcsp..9 D tcsp tpwl M td tdsp. thd 24 AUG. 6, 23 Preliminary Version:.

25 SPLC78D 7. APPLICATION CICUITS 7.. -Oscillator The oscillation resistor f is used only for the internal oscillator operation mode. OSC f : 75.KΩ 2% ( when = 3.V) f : 9KΩ 2% ( when = 5.V) OSC2 Since the oscillation frequency varies depending on the OSC and OSC2 pin capacitance, the wiring length to these pins should be minimized. 4 6 Fosc ( KHz ) 2 27 Fosc ( KHz ) osc ( Kohms ) osc ( Kohms ) = 3.V = 5.V 7.2. Interface to MPU Interface to 8-bit MPU (685) 685 PA PA7 PB PB PB2 8 DB DB7 E S / W COM COM6 SPLC78D SEG SEG4 6 4 LCD PANEL 6 COMMONS X 4 SEGMENTS Interface to 8-bit MPU (Z8) Z8 D D7 A A7 A IOQ W 7 8 DB DB7 E S / W SPLC78D COM COM6 SEG SEG4 6 4 LCD PANEL 6 COMMONS X 4 SEGMENTS 25 AUG. 6, 23 Preliminary Version:.

26 SPLC78D 7.3. SPLC78D Application Circuit DOT MATIX LCD PANEL 6 (8) COM6 (COM8) COM 4 SEG4 SEG 4 Y-Y4 DL D2 DL2 FCS D SHL SHL2 CL GND CL2 VEE M VV2V3V4V5V6 SPLCA 4 SPLCA Y-Y4 DL D2 DL2 FCS D SHL SHL2 CL GND CL2 VEE M VV2V3 V4V5V6 4 Y-Y4 DL D2 DL2 FCS D SHL SHL2 CL GND CL2 VEE M VV2V3V4V5V6 SPLCA GND CL CL2 M V V2 V3 V4 V5 SPLC78D V ( +5V ) C C C C C -V or Gnd 26 AUG. 6, 23 Preliminary Version:.

27 SPLC78D 7.4. Applications for LCD SPLC78D COM COM8 SEG LCD Panel 8 characters x line SEG4 ( Example ) : 5 x 8 dots, 8 characters x line [ / 4 Bias, / 8 Duty ] SPLC78D COM COM LCD Panel 8 characters x line SEG SEG4 ( Example 2 ) : 5 x dots, 8 characters x line [ / 4 Bias, / Duty ] SPLC78D COM COM8 COM9 LCD Panel 8 characters x 2 lines COM6 SEG SEG4 ( Example 3 ) : 5 x 8 dots, 8 characters x 2 lines [ / 5 Bias, / 6 Duty ] 27 AUG. 6, 23 Preliminary Version:.

28 SPLC78D SPLC78D COM COM8 SEG SEG4 COM9 COM6 ( Example 4 ) : 5 x 8 dots, 6 characters x line [ / 5 Bias, / 6 Duty ] SPLC78D SEG SEG2 COM COM8 LCD Panel 4 characters x 2 lines SEG2 SEG4 ( Example 5 ) : 5 x 8 dots, 4 characters x 2 lines [ / 4 Bias, / 8 Duty ] 28 AUG. 6, 23 Preliminary Version:.

29 Preliminary SPLC78D 8. CHAACTE GENEATO OM 8.. SPLC78D - 29 AUG. 6, 23 Preliminary Version:.