VC-711 Differential (LVPECL, LVDS) Crystal Oscillator

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1 C-7 Differential (LPECL, LDS) Crystal Oscillator C-7 Description ectron s C-7 Crystal Oscillator is a quartz stabilized, differential output oscillator, operating off either a 2.5 or 3.3 volt power supply in a hermetically sealed 7.0 x 5.0mm ceramic package. Features Ultra Low Jitter Performance, 3rd OT or Fundamental Crystal Design 0MHz -70MHz Output Frequencies Excellent Power Supply Rejection Ratio Enable/Disable 3.3 or 2.5 operation Extended Operating Temperature Range (-40 to 05 C) Option Hermetically Sealed 7.0 x 5.0mm Ceramic Package Product is compliant to RoHS directive and fully compatible with lead free assembly Applications Ethernet, GbE, Synchronous Ethernet Fiber Channel Enterprise Servers Clock source for ADC s, DAC s Test and Measurement GPON Block Diagram DD Complementary Output Output oltage Regulator Crystal Oscillator E/D or E/D or GND ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page

2 Table. Electrical Performance, LPECL Option Performance Specifications Parameter Symbol Min Typical Maximum Units Supply oltage (Ordering Option) DD Current Consumption, I DD 69 6 Frequency Nominal Frequency (Ordering Option) f N 0 70 MHz Stability 2 (Ordering Option) ±20, ±25, ±50 or ±00 ppm Output Logic Levels 3 Output Logic High Output Logic Low Outputs OH DD OL DD -.80 DD DD Output Rise and Fall Time 3,4 t R /t F 450 ps Load 50 ohms into DD -2.0 Duty Cycle 5 DC % Phase Noise, 3.3, 56.25MHz 6 0Hz 00Hz khz 0kHz 00kHz MHz 20MHz ф N Jitter 6, 56.25MHz 2kHz -20MHz ф J fs Outputs Enabled 7 Outputs Disabled Enable/Disable ma dbc/hz IH 0.7* DD IL 0.3* DD Disable Time t D 200 ns Enable/Disable Leakage Current ±200 ua Start-Up Time t SU 0 ms Operating Temp. (Ordering Option) T OP -0/70 or -40/85 or -40/05 C. The C-7 power supply pin should be filtered, eg, a 0uf, 0.uf and 0.0uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure defines the test circuit and Figure 2 defines these parameters. 4. Output rise and fall time will be 600ps (max) for -40/05 C operating temperature range. 5. Duty Cycle is defined as the On/Time Period. 6. Measured using an Agilent E5052 Signal Source Analyzer at 25 C. 7. Outputs will be Enabled if Enable/Disable is left open. DD -.3 t R t F AMP *0.8 Cross Point AMP *0.2 AMP On Time Period Figure. Figure 2. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page2

3 Performance Specifications Table 2. Electrical Performance, LDS Option Parameter Symbol Min Typical Maximum Units Supply Supply oltage (Ordering Option) DD Current Consumption, The C-7 power supply pin should be filtered, eg, a 0uf, 0.uf and 0.0uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 2 defines these parameters and Figure 3 defines the test circuit. 4. Output rise and fall time will be 600ps (max) for -40/05 C operating temperature range. 5. Duty Cycle is defined as the On/Time Period. 6. Measured using an Agilent E5052 Signal Source Analyzer at 25 C 7. Outputs will be Enabled if Enable/Disable is left open I DD Frequency Nominal Frequency (Ordering Option) f N 0 70 MHz Stability 2 (Ordering Option) ±20, ±25, ±50 or ±00 ppm Output Logic Levels 3 Output Logic High Output Logic Low Outputs OH OL ma.6 Output Amplitude m Differential Output Error 50 m Offset oltage Offset oltage Error 50 m Output Leakage Current, Outputs Disabled 0 ua Output Rise and Fall Time 3,4 t R /t F 450 ps Load 00 ohms differential Duty Cycle 5 DC % Phase Noise, 3.3, 56.25MHz 6 0Hz 00Hz khz 0kHz 00kHz MHz 20MHz ф N Jitter 6, 56.25MHz 2kHz - 20MHz ф J fs Outputs Enabled 7 Outputs Disabled Enable/Disable dbc/hz IH 0.7* DD IL 0.3* DD Disable Time t D 200 ns Enable/Disable Leakage Current I E/D ±200 ua Start-Up Time t SU 0 ms Operating Temp. (Ordering Option) T OP -0/70 or -40/85 or -40/05 C 0.0 uf Out Out DC 2 3 Figure 3. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page3

4 Package and Pinout Table 3. Pinout Pin # Symbol Function E/D or Enable/Disable or No Connection 2 E/D or Enable Disable or No Connection 3 GND Electrical and Lid Ground 4 f O Output Frequency 5 Cf O Complementary Output Frequency 6 DD Supply oltage 7.0± C-7 xxxmxx YYWW Z 5.0± ± Bottom iew dimensions are in mm Figure 4. Pad Layout Figure 5. Package Outline Drawing Marking Information C-7 - Product Type xxxmxx - Frequency (56M25) YY - Year of Manufacture WW - Week of the Year Z - Manufacturing Location LPECL Application Diagrams DD uF 0.0uF 0.0uF Figure 6. Single Resistor Termination Scheme Resistor values are typically 40 ohms for 3.3 operation and 84 ohms for 2.5 operation. Figure 7. Pull-Up Pull Down Termination Resistor values shown are typical for 3.3 opertaion. For 2.5 operation, the resistor to ground is 62 ohms and the resistor to supply is 250 ohms ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page4

5 The C-7 incorporates a standard PECL output scheme, which are un-terminated FET drains. There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 6, or for best 50 ohm matching a pull-up/pull-down scheme as shown in Figure 7 should be used. AC coupling capacitors are optional, depending on the application and the input logic requirements of the next stage. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. LDS Application Diagrams LDS Driver 00 LDS Receiver LDS Driver 00 Receiver Figure 6. LDS to LDS Connection, Internal 00ohm Resistor Some LDS structures have an internal 00 ohm resistor on the input and do not need additional components. AC blocking capacitors can be used if the DC levels are incompatible. Figure 7. LDS to LDS Connection Some input structures may not have an internal 00 ohm resistor on the input and will need an external 00ohm resistor for impedance matching. Also, the input may have an internal DC bias which may not be compatible with LDS levels, AC blocking capacitors can be used. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. IR Compliance S Suggested IR Profile Devices are built using lead free epoxy and can be subjected to standard lead free IR reflow conditions shown in Table 4. Contact pads are gold over nickel and lower maximum temperatures can also be used, such as 220C. Table 4. Reflow Profile Parameter Symbol alue PreHeat Time ts 200 sec Max Ramp Up R UP 3 C/sec Max Time above 27 C tl 50 sec Max Time to Peak Temperature tamb-p 480 sec Max Time at 260 C tp 30 sec Max Time at 240 C tp2 60 sec Max Ramp down R DN 6 C/sec Max ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page5

6 Environmental Compliance Table 5. Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002 Mechanical ibration MIL-STD-883 Method 2007 Temperature Cycle MIL-STD-883 Method 00 Solderability MIL-STD-883 Method 2003 Fine and Gross Leak MIL-STD-883 Method 04 Resistance to Solvents MIL-STD-202 Method 25 Moisture Sensitivity Level MSL Contact Pads Gold (0.3-.0um) over Nickel S Absolute Maximum Ratings and Handling Precautions Maximum Ratings, Tape & Reel Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability. Although ESD protection circuitry has been designed into the C-7, proper precautions should be taken when handling and mounting, I employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for the CDM a standard resistance of.5kohms and capacitance of 00pF is widely used and therefor can be used for comparison purposes. Table 6. Maximum Ratings Parameter alue Unit Storage Temperature -55 to 25 C Junction Temperature (maximum) 50 C Supply oltage -0.5 to 5.0 Enable Disable oltage -0.5 to DD +0.5 ESD, Human Body Model 500 ESD, Charged Device Model 500 Table 7. Tape and Reel Information Tape Dimensions (mm) Reel Dimensions (mm) W F Do Po P A B C D N W W2 #/Reel ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page6

7 Ordering Information C-7- E C E - K A A N - xxxmxxxxxx Frequency in MHz Product XO Package 7.0 x 5.0mm oltage Options E: +3.3 dc ±5% H: +2.5 dc ±5% Output C: LPECL D: LDS Temp Range W: -0/70 C E: -40/85 C F: -40/05 C Other (Future Use) N: Standard Enable/Disable Pin A: Pin (Pin 2 = No Connection) B: Pin 2 (Pin = No Connection) Enable/Disable Logic A: Output is Enabled with a Logic High or open, Output is Disabled with a Logic Low Stability E: ±20ppm F: ±25ppm K: ±50ppm S: ±00ppm Example: C-7-ECE-KAAN-56M Notes: a) Only ±00ppm stability option is available for temperature range of -40/05 C. ±50ppm is available in some cases. b) Not all combinations of options are available. Other specifications may be available upon request. Consult with factory. Revision History Revision Date Approved Description Feb 07, 207 RC Rev 0.: C-7 Preliminary datasheet for factory approval (Internal Revision) July 6, 207 N Rev 0.2: Internal Revision based on factory information and Website release. USA: ectron International 267 Lowell Road Unit 02 Hudson, NH 0305 Tel: Fax: For Additional Information, Please Contact Europe: ectron International Landstrasse, D Neckarbischofsheim, Germany Tel: +49 (0) Fax: +49 (0) Asia: I Shanghai 68 Yin Cheng Road(C), 22nd Floor One LuJiaZui Pudong, Shanghai 20020, China Tel: Fax: Disclaimer ectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page7 Rev 0.2: 07/6/207 N

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