Description. Block Diagram. Complementary Output. Output. Crystal. Oscillator. E/D or NC
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1 CC6 LPECL, LDS Crystal Oscillator Data Sheet CC6 Description ectron s CC6 Crystal Oscillator is a quartz stabilized, differential output oscillator, operating off either a 2.5 or 3.3 volt supply, hermetically sealed 5x7 ceramic package. Features Ultra Low Jitter Performance, Fundamental or 3rd OT Crystal Design Output Frequencies to MHz 0.3 typical RMS jitter, 2k-20MHz Differential Output Enable/Disable -0/70 C, -40/85 C or -55/25 C Operation Hermetically Sealed 5x7 Ceramic Package Product is compliant to RoHS directive and fully compatible with lead free assembly DD Block Diagram Complementary Output Applications Ethernet, GbE, Synchronous Ethernet Fiber Channel Enterprise Servers Telecom Clock source for A/D s, D/A s Driving FPGA s Test and Measurement PON Medical COTS Output Crystal Oscillator E/D or NC E/D or NC Gnd ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page
2 Table. Electrical Performance, LPECL Option Performance Specifications Parameter Symbol Min Typical Maximum Units Supply oltage DD The CC6 power supply pin should be filtered, eg, a 0. and 0.0uf capacitor. 2. See Standard Frequencies and Ordering Information for more information. 3. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 4. Figure defines the test circuit and Figure 2 defines these parameters. 5. Duty Cycle is defined as the On/Time Period. 6. Measured using an Agilent E5052, MHz. Please see Typical Phase Noise and Jitter Report for the CC6 series. 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if Enable/Disable is left open Current (No Load) I DD ma Frequency Nominal Frequency 2 f N MHz Stability 2,3 (Ordering Option) ±20, ±25, ±50, ±00 ppm Output Logic Levels 4, -0/70 C Output Logic High Output Logic Low Output Logic Levels 4, -40/85 C Output Logic High Output Logic Low Outputs OH DD OL DD -.80 OH DD OL DD DD DD DD DD Output Rise and Fall Time 4 t R /t F 600 Load 50 ohms into DD -.3 Duty Cycle % Jitter (2 khz - 20 MHz BW)55.52MHz 6 фj Period Jitter 7 RMS P/P Random Jitter Deterministic Jitter Output Enabled 8 Output Disabled фj Enable/Disable IH 0.7* DD IL 0.3* DD Disable Time t D 200 ns Enable/Disable Leakage Current ±200 ua Enable Pull-Up Resistor Output Enabled Output Disabled Start-Up Time t SU 0 ms Operating Temp. (Ordering Option) T OP -0/70 or -40/85 C 33 KOhm MOhm DD -.3 t R t F NC 6 OH 50% NC OL On Time -.3 Figure Period Figure 2. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page2
3 Performance Specifications Table 2. Electrical Performance, LDS Option Parameter Symbol Min Typical Maximum Units Supply oltage DD The CC6 power supply pin should be filtered, eg, a 0. and 0.0uf capacitor. 2. See Standard Frequencies and Ordering Information for more information. 3. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 4. Figure 2 defines these parameters and Figure 3 defines the test circuit. 5. Duty Cycle is defined as the On/Time Period. 6. Measured using an Agilent E5052, MHz. Please see Typical Phase Noise and Jitter Report for the CC6 series. 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if Enable/Disable is left open Current (No Load) I DD 60 ma Frequency Nominal Frequency 2 f N MHz Stability 2,3, (Ordering Option) ±20, ±25, ±50, ±00 ppm Output Logic Levels 4 Output Logic High Output Logic Low Outputs OH OL Differential Output Amplitude m Differential Output Error 50 m Offset oltage Offset oltage Error 50 m Output Leakage Current 0 ua Output Rise and Fall Time 4 t R /t F 600 Load 00 ohms differential Duty Cycle % Jitter (2 khz - 20 MHz BW)55.52MHz 6 фj Period Jitter 7 RMS P/P Random Jitter Deterministic Jitter Output Enabled 8 Output Disabled фj Enable/Disable IH 0.7* DD IL 0.3* DD Disable Time t D 200 ns Enable/Disable Leakage Current ±200 ua Enable Pull-Up Resistor Output Enabled Output Disabled Start-Up Time t SU 0 ms Operating Temp. (Ordering Option) T OP -0/70 or -40/85 C 33 KOhm MOhm Out 0.0 uf Out DC 2 3 Figure 3. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page3
4 Package and Pinout Table 3. Pinout Pin # Symbol Function E/D or NC Enable Disable or No Connection 2 E/D or NC Enable Disable or No Connection 3 GND Electrical and Lid Ground 4 f O Output Frequency 5 Cf O Complementary Output Frequency 6 DD Supply oltage The Enable/Disable function is set at the factory on either pin or pin 2 and is an ordering option. Outputs will be Enabled if the Enable/Disable is left open. 7.0± CC6-XXX XXXMXX YYWW C 5.0± max Bottom iew Dimensions are in mm Figure 4. Package Outline Drawing Figure 5. Pad Layout LPECL Application Diagrams 40Ω 40Ω Figure 6. Standard PECL Output Configuration Figure 7. Single Resistor Termination Scheme Figure 8. Pull-Up Pull Down Termination Resistor values are typically 40 ohms for 3.3 operation and 84 ohms for 2.5 operation. Resistor values are typically for 3.3 operation For 2.5 operation, the resistor to ground is 62 ohms and the resistor to supply is 240 ohms The CC6 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 6. There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 7, and a pull-up/pull-down scheme as shown in Figure 8. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page4
5 LDS Application Diagrams CC LDS Driver 00 LDS Receiver LDS Driver 00 Receiver OUT+ OUT- Figure 9. Standard LDS Output Configuration Figure 0. LDS to LDS Connection, Internal 00ohm Some LDS structures have an internal 00 ohm resistor on the input and do not need additional components. Figure. LDS to LDS Connection External 00ohm and AC blocking ca Some input structures may not have an internal 00 ohm resistor on the input and will need an external 00ohm resistor for impedance matching. Also, the input may have an internal DC bias which may not be compatible with LDS levels, AC blocking capacitors can be used. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. Environmental and IR Compliance Table 4. Environmental Compliance Parameter Condition Mechanical Shock MIL-STD-883 Method 2002 Mechanical ibration MIL-STD-883 Method 2007 Temperature Cycle MIL-STD-883 Method 00 Solderability MIL-STD-883 Method 2003 Fine and Gross Leak MIL-STD-883 Method 04 Resistance to Solvents MIL-STD-883 Method 205 Moisture Sensitivity Level Contact Pads IR Compliance MSL Gold over Nickel S Suggested IR Profile Devices are built using lead free epoxy and can be subjected to standard lead free IR reflow conditions shown in Table 5. Contact pads are gold over nickel and lower maximum temperatures can also be used, such as 220C. Table 5. Reflow Profile Parameter Symbol alue PreHeat Time ts 200 sec Max Ramp Up R UP 3 C/sec Max Time above 27 C tl 50 sec Max Time to Peak Temperature tamb-p 480 sec Max Time at 260 C tp 30 sec Max Temperature (DegC) Reliability R UP t S t AMB-P t L t P R DN Time at 240 C tp2 60 sec Max Ramp down R DN 6 C/sec Max 25 Time (sec) ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page5
6 S Absolute Maximum Ratings and Handling Precautions Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability. Although ESD protection circuitry has been designed into the CC6, proper precautions should be taken when handling and mounting. I employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for the CDM a standard resistance of.5kohms and capacitance of 00pF is widely used and therefor can be used for comparison purposes. Table 6. Maximum Ratings Maximum Ratings, Tape & Reel Parameter Symbol Rating Unit Storage Temperature T STORE -55/25 C Supply oltage -0.5 to 5.0 Enable/Disable oltage -0.5 to DD +0.5 ESD, Human Body Model 500 ESD, Charged Device Model 000 Table 7. Tape and Reel Information Tape Dimensions (mm) Reel Dimensions (mm) W F Do Po P A B C D N W W2 #/Reel Table 8. Standard Frequencies (MHz) ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page6
7 Ordering Information CC6 - X X X - XXMXXXXXX Product XO, 5x7 Package Output and oltage Q: +3.3 dc ±5%, LPECL R: +2.5 dc ±5%, LPECL L: +3.3 dc ±5%, LDS : +2.5 dc ±5%, LDS Enable/Disable A: E/D is on Pin 2 C: E/D is on Pin *Note: not all combination of options are available. Other specifications may be available upon request. Frequency in MHz Stability/Temp Range A: ±00 ppm over -0/70 C B: ±50 ppm over -0/70 C C: ±00 ppm over -40/85 C D: ±50 ppm over -40/85 C E: ±25 ppm over -0/70 C F: ±25 ppm over -40/85 C G: ±20 ppm over -0/70 C, excludes aging P: ±00 ppm over -55/25 C ±20ppm Options CC6-07-frequency LPECL +3.3 ±20ppm over -0/70 C, includes 0 years aging, E/D on Pin CC6-09-frequency LDS +3.3 ±20ppm over -0/70 C, includes 0 years aging, E/D on Pin CC6-0-frequency LPECL +2.5 ±20ppm over -0/70 C, includes 0 years aging, E/D on Pin CC6--frequency LDS +2.5 ±20ppm over -0/70 C, includes 0 years aging, E/D on Pin CC6-9-frequency LPECL +3.3 ±20ppm over -40/85 C, includes 0 years aging, E/D on Pin CC6-20-frequency LPECL +2.5 ±20ppm over -40/85 C, includes 0 years aging, E/D on Pin CC6-2-frequency LDS +3.3 ±20ppm over -40/85 C, includes 0 years aging, E/D on Pin CC6-22-frequency LDS +2.5 ±20ppm over -40/85 C, includes 0 years aging, E/D on Pin For Additional Information, Please Contact USA: ectron International 267 Lowell Road Unit 02 Hudson, NH 0305 Tel: Fax: Europe: ectron International Landstrasse, D Neckarbischofsheim, Germany Tel: +49 (0) Fax: +49 (0) Asia: ectron International 68 Yin Cheng Road(C), 22nd Floor One LuJiaZui Pudong, Shanghai 20020, China Tel: Fax: Disclaimer ectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Rev: 08/04/204 ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page7
8 Revision History Revision Date Approved Description Feb 2, 204 TG Updated ectron Logo, Hudson & Asia Contact Address Aug 04, 204 N Frequency range Limited to 275MHz. Removed Optional 7.5x5.08mm package. ectron International 267 Lowell Road, Suite 02, Hudson, NH 0305 Tel: -88-ECTRON- Page8
9 Mouser Electronics Authorized Distributor Click to iew Pricing, Inventory, Delivery & Lifecycle Information: ectron: CC6-CD-25M CC M CC6-QCB-00M000000
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