Y13007 Date: Thursday, April 17, 2014

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1 RX LN_G_TRL LK_REF SYNTH_TRL[0-] LN_G_TRL LK_REF RX_SYNTH_TRL[0-] RM MIRO LN_G_TRL RX_SYNTH_TRL[0-] IF_OUT ONNETOR IF_OUT IF_OUT IF_OUT UX S[-] UX S[-] UX S[-] UX S[-] UX S[-] UX S[-] SPI[-] RX_G SPI[-] RX_G SPI[-] RX_G RF_POWER_ET RF_POWER_ET IF_POWER_ET RSSI power detected at mixer power detected at IF output RF_POWER_ET RF_POWER_ET IF_POWER_ET RX RX_TXN TX_EN TX_G_TRL RX_TXN TX_EN TX_G_TRL RX_TXN TX_EN TX_G_TRL LOKS LKREF LKREF_T LOKS LK_REF Layout: daisy chain from TXO to RF synthesizers LKREF_T NLOG_OUT NLOG_OUT TX_I_P TX_I_N TX_Q_P TX_Q_N TX_I_P TX_I_N TX_Q_N TX_Q_P NLOG_OUT TX M&[-] M&[-] LK_REF LK_REF M&[-] TX_I_P TX_I_N TX_Q_P TX_Q_N LK_REF SYNTH_TRL[0-] TX_G_TRL RFOUT_EN TX_I_P TX_I_N TX_Q_P TX_Q_N LK_REF TX_SYNTH_TRL[0-] TX_G_TRL RFOUT_EN TX_SYNTH_TRL[0-] P_MONITORG P_MONITORG TX_G_TRL PGOO[-] RFOUT_EN PGOO[-] POWER POWER PGOO[-] PGOO[-] RX_TXN TX_EN Layout: place FF cable facing inwards RFOUT_EN TX_G_TRL P_MONITORG P_MONITORG ONNETOR 0 J0 0 - R FF ZIF board-mount connector, positions, mm pitch, right angle P/N: -, TE onnectivity, 0.mm FF TEMP TEMP TEMP POWER Z TX RM MIRO POWER PGOO[-] PGOO[-] Flower Hill Way Gaithersburg, M 0 US OM-0 / M Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

2 RX gain control UX S[-] UX S[-] Monitoring & control (through adjacent module) M&[-] SPI[-] RF_POWER_ET RF_POWER_ET IF_POWER_ET Multi-purpose analog output signal to the digital signal processing board. ould be configured as receiver RSSI, G level, power amplifier detected power, etc. NLOG_OUT RF synthesizers RX_SYNTH_TRL[0-] TX_SYNTH_TRL[0-] UX V Power Good Indicators,Must be PGOO[-] pulled up by RM processor Label "TP" TP TP_SMLL _ RM_+.V R0 0R;00;% 00uF;V;T; 0m RX_TXN TX_G_TRL RFOUT_EN LN_G_TRL TX_EN 0nF;00 0nF;00 00.uF;00.uF;00 RX_SYNTH_TRL0 {LK} RX_SYNTH_TRL {T} RX_SYNTH_TRL {LE} RX_SYNTH_TRL {L} RX_SYNTH_TRL {Enable} TX_SYNTH_TRL0 {LK} TX_SYNTH_TRL {T} TX_SYNTH_TRL {LE} TX_SYNTH_TRL {L} TX_SYNTH_TRL {Enable} US_ONNET PGOO {_+.V} PGOO {IF_+.V} R0 0R;00;% _ U RM_+.V R R0 V_ V_ V_ V_ 0R;00;% 0R;00;% VT VREG_ VREG_ UX_ {} UX_ {TSENSE_USY} P0[0]/R/TX/S M&_ {EGE_TX} P0[]/T/RX/SL M&_ {EGE_RX} 0 P0[]/TX0/0[] SPI {SSEL} P0[]/RX0/0[] SPI {SK} P0[]/ISRX_S/SSEL/MT[0] SPI {MISO} P0[]/ISTX_LK/SK/MT[] SPI {MOSI} P0[]/ISTX_WS/MISO/MT[] PGOO {RX_+.V} P0[]/ISTX_S/MOSI/MT[] PGOO {RF_+.V} 0 P0[0]/TX/S/MT[0] PGOO {_+.V} P0[]/RX/SL/MT[] PGOO {MO_+.V} P0[]/TX/SK0/SK PGOO{RX_SYNTH_+.V} P0[]/RX/SSEL0/SSEL PGOO{TX_SYNTH_+.V} P0[]/TS/MISO0/MISO PGOO {TTN_+.V} P0[]//MOSI0/MOSI P0[]/RTS/T P0[]/0[]/ISRX _S/TX P0[]/0[]/OUT/RX V 0 VREFP VREFN P[0] P[] P[] P[] P[] 0 P[0] P[] P[] P[]/US_UP_LE/PWM[]/P[0] P[]/M0/US_PPWR/P[] P[0]/MI0/PWM[]/SK0 P[]/MO0/US_PWR/MT[0] 0 P[]/MI/PWM[]/MISO0 P[]/MI/PWM[]/MOSI0 P[]/MO/MT[] P[]/MO/PWM[]/P0[0] P[]/MO/PP[0]/MT0[0] P[]/MO/PP[]/MT0[] P[]/SK/0[] _ RM ortex-m µ RM_+.V 0 _ US_ONNET R.K;00.uF;00 Q Layout Note: Place.uF cap close to US connector G S R _.uf;00 Layout Note: FN0P.K;00 Z match + & - to J 0 ohm diff US_+.0V P[0]/VUS/0[] U_US_M R R;00;% VUS P0[0]/US_- U_US_P R R;00;% - P0[]/US_+ + I FR SHIEL 0 UX S {S} LMKGSN SHIEL P[0]/PWM[]/TX UX S {SLK} SHIEL P[]/PWM[]/RX UX S {SYN#} SHIEL P[]/PWM[]/TS/TRET[] UX S {S} P[]/PWM[]//TRET[] UX S {SLK} P[]/PWM[]/SR/TRET[] UX S {SYN#} P[]/PWM[]/TR/TRET[0] UX_ {SLK} P[]/PP[0]/RI/TRELK UX_ {OUT} US_MI REEPTLE P[]/R/RTS 0 UX_ {S#} _ P[]/T/TX RE_LE P[]/US_ONNET/RX R0 OOT_MOE P[0]/ET0/NMI RM_+.V 0K;00;% VSS_ VSS_ VSS_ VSS_ VSS_ VSS_ VSS P[]/RX_MLK/MT[0]/TX P[]/TX_MLK/MT[]/RX TRST TI TMS/SWIO TK/SWLK TO/SWO RESET RSTOUT XTL 0 XTL RTX RTX M& M& {RIGHT_TX} {RIGHT_RX} RM_JTG_TRST RM_JTG_TI RM_JTG_TMS RM_JTG_TK RM_JTG_TO 0 00pF;00 LKREF_T. MHz (TXO) R 0K;00;% 0 RM_+.V _ RX_G TEMP TX_G_TRL P_MONITORG P_MONITORG 0-.V analog inputs U V V V V V 0 V V V0 P#/RST# VRIVE SLK OUT TSENSE_USY S# P VREF P V R 0R;00;% _ ground return path UX_ {SLK} UX_ {OUT} UX_ {} UX_ {TSENSE_USY} UX_ {S#} 00uF;V;T; _ RM_+.V LPF0 PZ 0 UX V FR m.uf;00.uf;00.uf;00.uf;00 ard Edge for RM JTG debugging _ RM_+.V RM_+.V LMKGSN R R R RM_+.V _ J M&_ {EGE_RX} M&_ {EGE_TX} R 0K;00;% JTG {E_} U_RESET {RST} R EGE RM_JTG_TO OOT_MOE 0 RM_JTG_RTK 0K;00;% RM_JTG_TRST ONNETOR 0 RM_JTG_TK 0K;00;% RM_JTG_TI RM_JTG_TMS ME-0-0-S--R-SL RE_LE RE LE R.R;00;% _ R-OPEN;00 RM_JTG_TRST R 0K;00;% _ R R-OPEN;00 RM_+.V R 0K;00;% _ R 0K;00;% RM_+.V R0 0K;00;% RM_+.V Z Flower Hill Way Gaithersburg, M 0 US OM-0 / RM MIRO Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

3 Layout: place close to micro. MHz frequency reference to micro LKREF_T (.MHz) V-TXO.ppm over -0/+, ppm/year aging alibrate at manufacturing _+.V R _+.V TX--0E _ m U VTR V _ OUT V-TXO.MHz _ R 00R;00;% Need amplification because amplitude is 00mVpp typ Select external frequency reference or TXO Layout: pads, component R0 0R;00;% R K;00;% _+.V R 0K;00;% U N _+.V _ V NSZ0PX Y _+.V _ R R;00;% LKREF LK REF testpoint _ place U close to the RF frequency synthesizers. The LKREF signal is fairly noisy (.V clock) and thus the trace length should be minimized. LKREF_T is 0.Vpp sinewave, thus less noisy. TP TP_SMLL EXTERNL FREQUENY REFERENE J UM G RF _ Label "EXT REF" Z Flower Hill Way Gaithersburg, M 0 US OM-0 / LOKS Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

4 IF_+.V ontingency place balun and MMX connector close to 0-pin connector (pin /) IF_OUT TX_G_TRL scale down from. to.v RX_G R.K;00;% R 0K;00;% TX_EN M&[-] SPI[-] scale down from. to.v M& M& UM G J R0 RF.K;00;% R 0K;00;% SPI SPI {RIGHT_RX} {RIGHT_TX} SPI SPI R.K;00;% T LK_REF T-W+ {SSEL} {SK} TX_I_P TX_I_N TX_Q_P TX_Q_N NLOG_OUT RX_TXN {MISO} {MOSI} Set the output common mode voltage here. aseline 0.V for interface to OM-00 R 0K;00;% R R R-OPEN;00 R-OPEN;00 R R-OPEN; J reserved output Vin = Vpp differential (0.Vpp on each signal) Input common-mode level = 00 mv Multi-purpose analog output reserved digital I/Os SQT-0-0-L- K/Z Flower Hill Way Gaithersburg, M 0 US OM-0 / ONNETOR Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

5 RF test point. NP L FILTER 0-0 MHz NPSS IF_ IF PUT UM G J RF L 0.uH;00.pF;00 IF_PF L.nH;00 0 0pF;00 L.nH;00 0pF;00 Gain: - d equivalent noise bandwidth: MHz IF_+.V m FR LMKGSN IF POWER ETETOR This power detector, in conjunction with the preceding attenuators and the microprocessor (brain) form the G. Its goal is to keep the IF output power level constant at + dm. R 0R;00;% 0nF;00 IF_PF R 0R;00 0 0nF;00 00pF;00 0nF;00 HSMP- R R.K;00;%.K;00;% ground return path FR LMKGSN _.m L 0nH;00;00m;SRF0MHz;.R L nh;00;00m;srf.ghz 00pF;00 R 0R;00;% 0nF;00 R 0R;00 0nF;00 IF_G_TRL sensitive trace L 0nH;00;00m;SRF0MHz;.R IF_+.V FR LMKGSN L L-OPEN;00 U V PUT OUT G Layout as per specs, ground vias, etc. G =.d Pdb = +.dm L L-OPEN;00 0nF;00 R.K;00;% pf;00 HSMS-K L 00nH;00 0nF;00 R.K;00;% IF_OUT Signal (agc stable): dm (. d below Pd) = 0. Vpp - + V+ V- U - + Z U OUT 0 OUT 0 R R 0K;00;% SP module expects a maximum level of Vpp differential (Vpp single-ended) Flower Hill Way Gaithersburg, M 0 US.K;00;% R.K;00;% 0 R R 0K;00;% 0K;00;% U - + VOUT 0 R0 Scale to.v max U - + 0K;00;% IF_POWER_ET VOUT 0 00pF;00 G = - to -d 0nF;00 TTN_+.V OM-0 / IF Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

6 RX_+.V 0m Layout: place LO regulator underneath or close FR LMKGSN RF_+.V m FR LMKGSN POWER ETETION RF PUT No damage: +0 dm max Operational: -00 to - dm 00pF;00 00pF;00 00pF;00 Label: RSSI TP TP_SMLL J UM RF GLN RF RF RFOUT 00pF;00 Label "RF (+0 dm max)" TQPM00 U PLE 0 0 G =.d Pdb = +dm NF =.0d L nh;00 Keep this stub very short off the main 0 Ohm trace 00pF;00 00pF;00 HPF cutoff MHz nf;00 00KHz video bandwidth 0 U HI LO LPF VPOS VPOS LPZ MHz to GHz Log etector/ ontroller N N N N OMM 0 N N N ExPad Power measurement. ynamic range: - to + dm (equivalent to - to - dm at RF connector) VOUT VSET TJ slope: 0mV/d output: 0.V to.0v R 0R;00;% RF_POWER_ET Z LN_OUT Flower Hill Way Gaithersburg, M 0 US OM-0 / LN Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

7 MIXER_+.V FR R0 0R;00;% optional automatic input IP control VSET MIXER_+.V R R-OPEN;00 R R-OPEN;00 Fixed bias setting, +V Mixer supply current 0 m 00pF;00 scale down to.v max R RF power detection, -dm to 0 dm. MIXER_+.V MIXER_+.V 00pF;00 _+.V 0m 00pF;00 MIXER_+.V MIXER_+.V LMKGSN 0.uF;00 0pF;00 0pF;00 0 ETO Source: L table (interfacing with F) Four different sets of caps/inductors depending on the frequency range. aseline is 0-00 MHz 00pF;00.K;00;% R0 K;00;% RF_MP_ RF_POWER_ET 0 dm T XNL T VSET ETO 0 00pF;00 00pF;00 00pF;00 XNL 00pF;00 U ENL 0 VSET ETO RFIP RF LOIP LO VPLO VPLO VPT VPRF 0-000MHZ IRET ONVERSION MIXER IFOP 0 IFON N MIXER_+.V T 0Ohm differential output impedance T-W+ IF L0PZ-R -OPEN;00 L 0R;00;%.pF;00 L.nH;00.pF;00 gain: d Input Pd: dm NF =. d 0 -OPEN;00 -OPEN;00 -OPEN;00 L 0R;00;% L.nH;00 Layout Note: 00 Ohm differential traces -OPEN;00.pF;00.pF;00 LO harmonics rejection Z Flower Hill Way Gaithersburg, M 0 US OM-0 / MIXER Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

8 dd SHIEL P for SHIEL FENE for the modulator + follow-on amp. MO_+.V m TX_LEVEL_TRL.uF;00 0pF;00 FR LMKGSN Low Pass Filter contingency in case the tx does not have any analog filter L Vin = Vpp differential (0.Vpp on each input) Input common-mode level = 00 mv dc L 0nF;00 00pF;00 0 L 0nH;00;00m;SRF0MHz;.R L nh;00;00m;srf.ghz TX_I_P 0R;00 0R;00 SEN I -HNNEL TX_I_N TX_Q_P SEN Q -HNNEL TX_Q_N -OPEN;00 -OPEN;00 L 0R;00 L 0R;00 0 -OPEN;00 -OPEN;00 L 0R;00 IP& and QP&QN lines are 00 Ohm diffrential pairs. Source: L table (interfacing with F) Four different sets of caps/inductors depending on the frequency range. aseline is 0-00 MHz -OPEN;00 L 0R;00 L0 0R;00 -OPEN;00 L 0R;00 R R-OPEN;00 R R-OPEN;00 00pF;00 0 dm 00pF;00 U IP 0 QP QN LO LOIP VPS VPS L-0PZ OMM OMM OMM OMM OMM OMM OMM OMM 0 OMM OMM0 ExP Quadrature Modulator RFOUT_EN RFOUT SOP N N N N Enable is active low 00pF;00 +0.dm R 0R;00 R 0R;00;% 00pF;00 R 0R;00 HSMP- R R0.K;00;% 0nF;00.K;00;% 0nF;00 L nh;00;00m;srf.ghz 00pF;00 0nF;00 0 TTN_+.V G = - to -d TX_MO_OUT -OPEN;00.pF;00.pF;00 L 0R;00;% L0.nH;00 -OPEN;00 -OPEN;00 -OPEN;00 K + Z L 0R;00;% Layout Note: 00 Ohm differential traces -OPEN;00 LO harmonics rejection L.nH;00.pF;00.pF;00 Flower Hill Way Gaithersburg, M 0 US OM-0 / MOULTOR Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

9 +V Supply OPERTIONL RNGE:. -.V J TT+ TT- P0EKV-E low-profile.mm terminal block _ Filter FR0 LMKGSN Reverse Voltage Protection Q FP -0V, -., mohm S G _ Transient Voltage Suppression _ SMJ.0-E R R;00;% _ Over Voltage Protection (.V,.) Layout Note: FR, Q, Q & Q must be placed and routed for a high current throughput. R 0K;00;% MMZV R K;00;% Vin Q ZXTP00FFT Q ZXTP00FFT _ Vin PGOO[-] Power Good Indicators Must be pulled up by RM processor Vin.uF;00 U LO OUT dj 00mOUT SHN# FULT# SET LPIMM-J NOP Imax = 00m Vout =.V R0 K;00;% R0 00K;00;% 00uF;V;T; 0.uF;00 m m RM_+.V _+.V return path _ R0 FR 0R;00;% LMKGSN.uF;00 PGOO {RF_+.V} U0 LO OUT dj 00mOUT SHN# FULT# LPIMM-J NOP SET Imax = 00m Vout =.V R K;00;% R 00K;00;%.uF;00.m RF_+.V log amp, RF amps PGOO {_+.V} return path _ R00 FR 0R;00;% LMKGSN.uF;00 U0 LO OUT dj 00mOUT SHN# FULT# SET LPIMM-J NOP Imax = 00m Vout =.V.m IF_+.V R RF & IF amplifiers K;00;% R 00K;00;%.uF;00 FR LMKGSN.uF;00 PGOO {_+.V} U LO OUT dj 00mOUT SHN# FULT# LPIMM-J NOP SET 0 Imax = 00m Vout =.V R 0K;00;% 0 R 00K;00;%.uF;00 m _+.V RF, rx mixer, aux dacs op-amps PGOO {IF_+.V} FR LMKGSN.uF;00 U LO OUT dj 00mOUT SHN# FULT# SET LPIMM-J NOP Imax = 00m Vout =.V R 0K;00;% R 00K;00;%.uF;00 0m LN RX_+.V FR LMKGSN.uF;00 PGOO {MO_+.V} U LO OUT dj 00mOUT SHN# FULT# LPIMM-J NOP SET Z Imax = 00m Vout =.V R 0K;00;% 0 R 00K;00;%.uF;00 m MO_+.V modulator PGOO {RX_+.V} Flower Hill Way Gaithersburg, M 0 US OM-0 / POWER Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

10 Vin PGOO[-] Power Good Indicators Must be pulled up by RM processor.uf;00 _ 0 _ U LO OUT dj 00mOUT SHN# FULT# LPIMM-J NOP SET Imax = 00m Vout =.V R K;00;% 0 0 R 00K;00;%.uF;00 m RX_SYNTH_+.V PGOO{RX_SYNTH_+.V}.uF;00 U LO OUT dj 00mOUT SHN# FULT# SET LPIMM-J NOP Imax = 00m Vout =.V R K;00;% 0 R 00K;00;%.uF;00 m TX_SYNTH_+.V PGOO{TX_SYNTH_+.V} FR LMKGSN.uF;00 PGOO {TTN_+.V} U LO OUT dj 00mOUT SHN# FULT# SET LPIMM-J NOP Imax = 00m Vout =.V.uF;00 Tm TTN_+.V P diode attenuators H H Fiducials H P Mounting Holes H H0 H H H H H Z Flower Hill Way Gaithersburg, M 0 US OM-0 / POWER Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet 0 of

11 LN_G_TRL RF_G_TRL FR LMKGSN FR LMKGSN 0nF;00 00pF;00 0 L 0nH;00;00m;SRF0MHz;.R L nh;00;00m;srf.ghz RF_+.V.m FR LMKGSN 0nF;00 00pF;00 L 0nH;00;00m;SRF0MHz;.R L nh;00;00m;srf.ghz RF_+.V.m FR LMKGSN RF_ 00pF;00 R 0R;00 00pF;00 R 0R;00;% 00pF;00 R 0R;00 HSMP- R R.K;00;% 0nF;00.K;00;% 0nF;00 L nh;00;00m;srf.ghz 00pF;00 0nF;00 TTN_+.V U V PUT OUT G Layout as per specs, ground vias, etc. G = d Pdb = +dm NF =.d, T=0K 00pF;00 Wideband noise rejection HPF Example: HFN-00 U NP HPF Filter RF_ G = -.d RF_OUT hange filter depending on customers' requirements 00pF;00 R 0R;00 00pF;00 R 0R;00;% 00pF;00 R0 0R;00 HSMP- R R.K;00;% 0nF;00.K;00;% 0nF;00 L nh;00;00m;srf.ghz 00pF;00 0nF;00 TTN_+.V 0 U V PUT OUT G Layout as per specs, ground vias, etc. G = d Pdb = +dm NF =.d RF_OUT G = - to -d G = - to -d shield. Standard size: "x"x0." Z Flower Hill Way Gaithersburg, M 0 US OM-0 / RF Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

12 RF_G_TRL FR LMKGSN sensitive trace 0nF;00 00pF;00 IF_+.V L0.m 0nH;00;00m;SRF0MHz;.R FR LMKGSN L nh;00;00m;srf.ghz _+.V m FR LMKGSN RF_ 0 00pF;00 R 0R;00 0nF;00 HSMP- R R.K;00;%.K;00;% 00pF;00 R 0R;00;% 0 00pF;00 R 0R;00 0 0nF;00 L nh;00;00m;srf.ghz U0 V PUT OUT G Layout as per specs, ground vias, etc. G = d Pdb = +dm NF =.d 00pF;00 Wideband noise rejection LPF Example: LFN-0 U LPF Filter RF_ NP G = -. d RF_OUT hange filter depending on customers' requirements 00pF;00 00pF;00 L0 U V PUT OUT - Layout as per specs, ground vias, etc. 0nH;00;00m;SRF0MHz;.R G G =.0d NP Pd= +.dm RF test point. NP L nh;00;00m;srf.ghz J RF 00pF;00 R R-OPEN;00 RF_OUT 00pF;00 0nF;00 TTN_+.V G = - to -d Z Flower Hill Way Gaithersburg, M 0 US OM-0 / RF Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

13 LN RF RF MIXER IF IF IF_ IF_OUT IF_OUT LN_OUT RF_POWER_ET RF_ RF_OUT RF_G_TRL RF_G_TRL RF_ RF_G_TRL RF_OUT RF_MP_ RF_POWER_ET RF_POWER_ET IF_G_TRL IF_POWER_ET IF_G_TRL IF_POWER_ET LN_G_TRL LN RF RF MIXER LN_G_TRL SYNTHESIZER IF RF_POWER_ET LK_REF LK_REF SYNTH_TRL[0-] SYNTH_TRL[0-] RX_SYNTH_+.V SYNTH_+.V SYNTHESIZER RF G ONTROL UX S[-] UX S {S} UX S {SLK} UX S {SYN#} _+.V 0.m FR LMKGSN.uF;00 U S SLK SYN V it / VOUT KSZ R 0R;00;% _ ground return path R 0K;00;% _+.V.m - V+ V- +.uf;00 0 R.K;00;% - for larger output 00pF;00 current, better slew rate over V voltage range. FR LMKGSN U OUT RF_G_TRL UX S[-] IF G ONTROL UX S {S} UX S {SLK} UX S {SYN#} U _+.V 0.m S SLK SYN V KSZ _ FR LMKGSN.uF;00 VOUT it / R 0R;00;% ground return path R 0K;00;% _+.V.m - V+ V- + R.K;00;% U OUT - 00pF;00 for larger output current, better slew rate over V voltage range. FR LMKGSN.uF;00 IF_G_TRL Z Flower Hill Way Gaithersburg, M 0 US OM-0 / RX Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

14 SYNTH_+.V FR0 m SYNTH_+.V.uF;00 0pF;00 _ 0pF;00 0 0pF;00 _ LMKGSN return path R 0R;00;%.uF;00 0 0pF;00 0pF;00 FR LMKGSN SYNTH_+.V SYNTH_TRL[0-] -OPEN;00 SYNTH_TRL0 {LK} R SYNTH_TRL {T} R SYNTH_TRL {LE} R SYNTH_TRL {L} R0 SYNTH_PLL_LOK {MUXOUT} R 0R;00;% 0R;00;% 0R;00;% 0R;00;% 0R;00;% 0 _ R0.K;00;% SYNTH_TRL {RFOUT enable}.uf;00 0pF;00 Very sensitive trace, affects overall phase noise LK_REF 0nF;00 -OPEN;00 U LK T LE L MUXOUT REF_ RSET PRF V_VO V_VO V 0 VP V SV E P _VO _VO _VO ExP Frequency Synthesizer S RF_OUT+ RF_OUT- RF_OUT- RF_OUT+ VTUNE POUT SW VREF TEMP 0 VOM R0 R-OPEN;00 Fast Lock Mode R R-OPEN;00 0.nH;00;00m;SRF.GHz.nF;00 m L.nH;00;00m;SRF.GHz 0 0nF;00 R0 Source: L table (interfacing with F) Four different inductors values depending on the frequency range. aseline is 0-00 MHz m 0R;00;% nf;00 L 0nF;00 R RF_OUT/LO traces are 00R;00;% 00 Ohm diff. impedance matched 0pF;00 FPZ R R;00;% dd SHIEL P for SHIEL FENE R 0R;00;% SYNTH_PLL_LOK Label Testpoints TP {MUXOUT} TP_SMLL PLL LOK testpoint 0 0pF;00 0 0pF;00 0 0pF;00 Z Flower Hill Way Gaithersburg, M 0 US OM-0 / TX SYNTHESIZER Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

15 SYNTH_+.V FR m SYNTH_+.V 0.uF;00 0pF;00 _ 0pF; pF;00 0 _ LMKGSN return path R 0R;00;%.uF;00 0pF;00 0pF;00 0 FR LMKGSN SYNTH_+.V R.K;00;% SYNTH_TRL {RFOUT enable}.uf;00 0pF;00 0 _ SYNTH_TRL[0-] -OPEN;00 SYNTH_TRL0 {LK} R0 0R;00;% SYNTH_TRL {T} R 0R;00;% SYNTH_TRL {LE} R 0R;00;% SYNTH_TRL {L} R 0R;00;% SYNTH_PLL_LOK {MUXOUT} R 0R;00;% 0 Very sensitive trace, affects overall phase noise LK_REF 0nF;00 -OPEN;00 U LK T LE L MUXOUT REF_ RSET PRF V_VO V_VO V 0 VP V SV E P _VO _VO _VO ExP Frequency Synthesizer S RF_OUT+ RF_OUT- RF_OUT- RF_OUT+ VTUNE POUT SW VREF TEMP 0 VOM R R-OPEN;00 Fast Lock Mode R R-OPEN;00 00.nH;00;00m;SRF.GHz.nF;00 m L 0nF;00 R.nH;00;00m;SRF.GHz Source: L table (interfacing with F) Four different inductors values depending on the frequency range. aseline is 0-00 MHz m 0R;00;% 0 nf;00 L 0nF;00 R0 RF_OUT/LO traces are 00R;00;% 00 Ohm diff. impedance matched 0pF;00 FPZ R R;00;% dd SHIEL P for SHIEL FENE R 0R;00;% SYNTH_PLL_LOK Label Testpoints TP {MUXOUT} TP_SMLL PLL LOK testpoint 0 0pF;00 0pF;00 0pF;00 Z Flower Hill Way Gaithersburg, M 0 US OM-0 / RX SYNTHESIZER Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

16 _+.V.m FR0 LMKGSN MO_+.V m.uf;00 FR LMKGSN R 0nH;00;00m;SRF0MHz;.R TX_G_TRL 0-.V R 0K;00;% - V+ V- + - for larger output 00pF;00 current, better slew rate over V voltage range..k;00;% U OUT RFOUT_EN TX_I_P TX_I_N TX_Q_P TX_Q_N Enable is active low RFOUT_EN TX_LEVEL_TRL TX_I_P TX_I_N TX_Q_P TX_Q_N 00pF;00 MOULTOR TX_MO_OUT MOULTOR SYNTHESIZER 00pF;00 L U V PUT OUT - G = d Pd= +.dm follow exact layout from vagotech (see - application note) L nh;00;00m;srf.ghz Harmonics rejection Example: LFN-0 U NP LPF Filter RF_ G = -.d RF_OUT hange filter depending on customers' requirements J UM RF G Label "RF OUT" LK_REF LK_REF SYNTH_TRL[0-] SYNTH_TRL[0-] TX_SYNTH_+.V SYNTH_+.V SYNTHESIZER _+.V R 00K;00;% Temperature sensor Vmax =.V TEMP RT NPXH0F0R t Temperature sensor. Place thermistor near a solid ground plane with several vias. Z Flower Hill Way Gaithersburg, M 0 US OM-0 / TX Size ocument Number Rev Y00 ate: Thursday, pril, 0 Sheet of

CAN-0 CAN-0 66 P0.0/CAN_RX1/TXD3/SDA1 P0.1/CAN_TX1/RXD3/SCL1 P0.5/I2SRX_WS/CAN_TX2/CAP2.1 CAN-2 CAN-2 P0.4/I2SRX_CLK/CAN_RX2/CAP2.0 P0.

CAN-0 CAN-0 66 P0.0/CAN_RX1/TXD3/SDA1 P0.1/CAN_TX1/RXD3/SCL1 P0.5/I2SRX_WS/CAN_TX2/CAP2.1 CAN-2 CAN-2 P0.4/I2SRX_CLK/CAN_RX2/CAP2.0 P0. RST P. RX N_TX MILK TI MIT TRST SL N_RX TK SL RX TO MIT MIM MIT RTK TX S TX MIT TMS P. P. P. SW_R S LE LE LE LE LE LE LE LE P. P. PWM PWM P. P. P. P. P. P. PWM P. PWM PWM PWM P. US_NET IO US_UP_LE T_PS