Simultaneous double side grinding of silicon wafers: a mathematical study on grinding marks

Transcription

1 Int. J. Abrasive Technology, Vol., Nos. 3/4, Simultaneous double side grinding of silicon wafers: a mathematical study on grinding marks Z.C. Li and Z.J. Pei* Department of Industrial and Manufacturing Systems Engineering, Kansas State University, Manhattan, KS 66506, USA lzc@ksu.edu zpei@ksu.edu *Corresponding author Graham R. Fisher MEMC Electronic Materials, Inc., 50 Pearl Drive, St. Peters, MO 63376, USA gfisher@memc.com Abstract: Most Integrated Circuits (ICs) are built on silicon wafers. A series of processes are required to manufacture high quality silicon wafers. Simultaneous Double Side Grinding (SDSG) is one of the processes used to flatten wire-sawn wafers. A critical issue in SDSG is the grinding marks on wafer surfaces. Several mathematical models have been proposed to predict the grinding marks in Single Side Grinding (SSG). However, no papers have ever been published to systematically study the grinding marks in SDSG. This paper first gives a brief literature review on mathematical models for grinding marks in SSG of silicon wafers. It then presents the development of a mathematical model for grinding marks in SDSG of silicon wafers. This developed model is then used to study the effects of SDSG parameters on the curvature of the grinding marks and the distance between adjacent grinding marks. Finally this paper discusses one practical application of the model. Keywords: grinding; grinding marks; machining; semiconductor material; silicon wafer. Reference to this paper should be made as follows: Li, Z.C., Pei, Z.J. and Fisher, G.R. (2008) Simultaneous double side grinding of silicon wafers: a mathematical study on grinding marks, Int. J. Abrasive Technology, Vol., Nos. 3/4, pp Biographical notes: Z.C. Li is a Post-Doctoral Research Fellow at Kansas State University. He received a PhD in Industrial Engineering from Kansas State University in His research interests include modelling and development of grinding, lapping and chemical mechanical polishing of semiconductor materials. Z.J. Pei received a PhD in Mechanical Engineering from the University of Illinois at Urbana-Champaign. Currently, he is an Associate Professor in the Department of Industrial and Manufacturing Systems Engineering at Kansas State University. He holds three US patents and has published 50 journal papers and over 60 papers at international conferences. His current research activities include analysis and modelling of silicon wafering processes and traditional and non-traditional machining processes. Copyright 2008 Inderscience Enterprises Ltd.

2 288 Z.C. Li, Z.J. Pei and G.R. Fisher Graham R. Fisher is the Director of Intellectual Property for MEMC Electronic Material Inc. He joined MEMC in 985 and has held various positions including Vice President Corporate Technology, Director of Operations Technology, Technical Operations Manager and Application Engineering Manager. He has authored or co-authored over 40 papers and 2 patents. He received a BSc in Physics from the University of Salford in England in 973 and a PhD in Materials Science from the University of London in 986. He is also an Adjunct Professor in the Department of Industrial and Manufacturing Systems Engineering at Kansas State University. Introduction Integrated Circuits (ICs) are built on semiconductor wafers. More than 90% of the semiconductor wafers are silicon (Van Zant, 2000). In 2005, the worldwide revenues generated by silicon wafers and semiconductor devices built upon these wafers were $8.3 billion (Van and Ogawa, 2005) and $235 billion (Norwood and Van Hoy, 2005), respectively. As shown in Figure, a sequence of processes is used to turn a silicon ingot into silicon wafers, typically consisting of the following processes (Kerstan and Peitsch, 2000; Pei et al., 999; Pietsch and Kerstan, 200; Quirk and Serda, 200): slicing, to slice a silicon ingot into wafers of thin disk shape using the internal diamond sawing method or wire sawing method 2 edge profiling or chamfering, to chamfer the peripheral edge portion of the wafer to reduce the risk of wafer damage in further processing 3 flattening (lapping or grinding), to achieve a desired wafer flatness 4 etching, to chemically remove the damage induced by slicing and flattening without introducing further mechanical damage 5 polishing, to obtain a mirror surface 6 cleaning, to remove the polishing agent or dust particles. Figure Manufacturing process flow for silicon wafers Source: Kerstan and Peitsch (2000), Pei et al. (999), Pietsch and Kerstan (200) and Quirk and Serda (200).

3 SDSG of silicon wafers: a mathematical study on grinding marks 289 As shown in Figure, three approaches can be used to flatten silicon wafers after slicing: lapping (Dudley, 986; Marinescu et al., 2002), Single Side Grinding (SSG) (Chidambaram et al., 2003a,b; Pei, 2002; Pei and Strasbaugh, 200; Zhang et al., 2006), and Simultaneous Double Side Grinding (SDSG) (Pietsch and Kerstan, 2005). In a review paper on SDSG (Li et al., 2006), these three approaches were compared in five aspects: ability to remove wire-sawing induced waviness; throughput (number of wafers processed within a unit of time); consumable cost per wafer; level of automation and environmental benignity. It was shown that SDSG is better in almost every aspect. Figure 2 illustrates the SDSG process. A silicon wafer is held by a pair of hydrostatic pads. These hydrostatic pads produce a water cushion between the respective pad and wafer surface for holding the wafer without the pads physically contacting the wafer during grinding. A pair of diamond cup wheels are located on the opposite sides of the wafer. Both sides of the rotating wafer are ground simultaneously between the two wheels, which are synchronously fed towards the wafer. Figure 2 Illustration of SDSG process Source: Pietsch and Kerstan (2005). Similar to the wafer surface ground by SSG there are many visible grinding marks on the wafer surface processed by SDSG. These grinding marks are not acceptable and required to be removed by subsequent processes. One approach to eliminate the grinding marks is to keep polishing until all the grinding marks are gone. But, it will lengthen the polishing time and increase manufacturing costs. A better approach is to optimise the SDSG process so that grinding marks can be removed with the minimum polishing amount. The success of the latter approach will, to a certain degree, depend on whether or not the following questions can be answered: How are grinding marks generated? How do process parameters (wheel rotation speed, wafer rotation speed and wheel diameter, etc.) affect grinding marks? Several mathematical models have been reported for grinding marks in cylindrical face grinding of steel parts (Shih and Lee, 999) and for grinding marks in SSG of silicon wafers (Chidambaram et al., 2003a,b; Tso and Teng, 200; Zhou et al., 2003). These mathematical models can potentially be extended to systematically study the grinding marks in SDSG but no such work has ever been published.

4 290 Z.C. Li, Z.J. Pei and G.R. Fisher Pietsch and Kerstan (2005) presented a simulation graph of the grinding marks for SDSG of silicon wafers without giving detailed equations. The grinding marks left on the wafer surface processed by SDSG was experimentally observed and compared with those by SSG. They reported that criss-cross grinding marks were found on the wafer surface processed by SDSG, different from the radial grinding marks on the wafer surface processed by SSG. However, they did not report any systematic study about the effects of SDSG process parameters on the grinding marks. This paper is organised as follows. Following the introduction section, Section 2 briefly reviews available models for grinding marks generated in cylindrical surface grinding and SSG. A mathematical model for grinding marks in SDSG is developed in Section 3. In Section 4, this developed model is used to study the effects of several SDSG parameters on the grinding marks. Conclusions are drawn up in Section 4. 2 Overview of available models for grinding marks 2. The model for cylindrical face grinding by Shih and Lee (999) Shih and Lee (999) developed a mathematical model to calculate and plot the grinding trajectories (curvature of grinding marks) in cylindrical face grinding. Figure 3 illustrates the cylindrical face grinding. The steel workpiece has the shape of a hollow cylinder and its inner and outer radii are designated by r i and r o, respectively. The grinding wheel (with a radius of r g ) was modelled as a ring of rotating abrasives and the centre of the ring was offset by a distance (r g + s) from the centre of the workpiece. Both workpiece and grinding wheel rotate about their own axes. Please note that the kinematics in the cylindrical face grinding becomes the same as that in single side wafer grinding when both the inner radius of the workpiece and the offset become zero (i.e. r i = 0 and s = 0). Figure 3 Illustration for cylindrical face grinding Source: Shih and Lee (999). The fundamental assumption in Shih and Lee s model can be stated as follows with the help of Figure 4. At time t = 0, the abrasive grit B (located at point B 0 on the grinding wheel) was in contact with point B 02 located on the outer diameter of the workpiece and

5 SDSG of silicon wafers: a mathematical study on grinding marks 29 the abrasive grit C (located at point C 0 on the grinding wheel) was in contact with point C 02 located on the inner diameter of the workpiece. At time t = T, these two abrasive grits rotated from B 0 to B T and from C 0 to C T, respectively. Because the workpiece was also rotating, abrasive grits B and C generated two curved grinding trajectories on the workpiece from B 02 to B T2 and from C 02 to C T2, respectively. Figure 4 The mechanism generating two sets of grinding trajectories Source: Shih and Lee (999). Two sets of equations were developed to present the two grinding trajectories respectively. In the derivation, the effect of workpiece rotation was modelled by rotating the centre of the grinding wheel at an angle (in the opposite direction to the rotation direction of the workpiece) around the centre of the workpiece. Shih and Lee studied the effects of the ratio of the grinding wheel rotation speed (N ) versus the workpiece rotation speed (N 2 ) and the grinding wheel diameter on the grinding trajectories. However, they did not report any results about the effects of these parameters on the distance between adjacent grinding marks. 2.2 The model for SSG of silicon wafers by Chidambaram et al. (2003a) Figure 5 illustrates the SSG of silicon wafers. The grinding wheel is a diamond cup wheel. The wafer is held on a porous ceramic chuck by means of vacuum. The rotation axis for the grinding wheel is offset by a distance of the wheel radius relative to the rotation axis for the wafer. During grinding, the grinding wheel and the wafer rotate about their own rotation axes simultaneously, and the wheel is fed towards the wafer along its axis. The ceramic chuck is typically ground to a conic shape with a very small slope. When the wafer is held onto the chuck, it elastically deforms to the chuck s conic shape, thus ensuring that the grinding wheel only contacts half of the wafer. This contact area is marked as Active grinding zone.

6 292 Z.C. Li, Z.J. Pei and G.R. Fisher Figure 5 Illustration for SSG of silicon wafers (see online version for colours) Source: Chidambaram et al. (2003a). Chidambaram et al. (2003a) developed a model based on the assumption that the grinding wheel behaves like a single-point tool. The grinding wheel cuts into the wafer from the edge to the centre along arch MO, as shown in Figure 5. They first derived the equations to present the locus of a grinding mark when the wafer was kept stationary. An offset was then added to each point on this locus to compensate the rotation of the wafer to obtain the grinding mark locus on the wafer. Using the model developed, they studied the effects of process parameters (wheel rotation speed, wafer rotation speed and wheel radius) on both the curvature of the grinding marks and the distance between adjacent grinding lines. 2.3 The model for SSG of silicon wafers by Tso and Teng (200) Tso and Teng (200) claimed that they had developed equations for the locus of a scratch (a grinding mark) for SSG of silicon wafers. However, no details of such equations and their deviations were given in their paper. They presented a comparison of scratch patterns between computer simulation and experimental results as the speed ratio (N /N 2 ) of the grinding wheel versus silicon wafer changed. Both the experimental results and computer simulations showed that, as the speed ratio increased, the grinding lines became more curved. However, they did not show any changes in the distance between adjacent grinding lines for different speed ratios. Furthermore, the effects of other parameters were not reported. 2.4 The model for SSG of silicon wafers by Zhou et al. (2003) Zhou et al. (2003) presented a general equation in matrix forms for the grinding marks in SSG of silicon wafers without detailed deviations. A diamond grain located at the wheel

7 SDSG of silicon wafers: a mathematical study on grinding marks 293 periphery was chosen for grinding of silicon wafers with a diameter of 300 mm. The cutting path patterns of the diamond grain were studied for different values of the speed ratio (N /N 2 ). In their study, the tilts of the wafer axis were considered so that the grinding marks were generated in three-dimensional coordinates. They presented cutting path patterns for three different speed ratios (N /N 2 = 2, 30 and 37.5). They observed that, when N /N 2 = 2, the cutting path formed was a straight line. Another conclusion they got was that the cutting path pattern (grinding marks) was determined by the speed ratio only, not by the absolute value of the individual rotation speed. However, they did not report the effects of other process parameters on the grinding marks. Table summarises the aforementioned investigations on grinding marks. It indicates that no mathematical model has been used to systematically study the grinding marks in SDSG of silicon wafers. Table Summary of reported work on grinding marks Reference Reported work Distance between adjacent grinding marks Shih and Lee (999) Chidambaram et al. (2003a) Tso and Teng (200) Zhou et al. (2003) Pietsch and Kerstan (2005) Cylindrical surface grinding of harden steel workpiece SSG of 200 mm silicon wafers SSG of 300 mm silicon wafers SSG of 300 mm silicon wafers SDSG of 300 mm silicon wafers Curvature of grinding marks Systematic study on effects of process parameters * Studied only the effects on the curvature of grinding marks. ** Studied only the effects on the distance between adjacent grinding lines. 3 Development of the mathematical model for grinding marks in SDSG 3. Assumptions for the mathematical model For the model in this paper, the grinding wheel is assumed to behave like a single-point cutting tool. This assumption has been validated by the authors previous research (Chidambaram et al., 2003a,b; Pei, 2002) and also used by other researchers (Shih and Lee, 999). For one side of the silicon wafer in SDSG, both the wheel (with a diameter of D ) and the wafer (with a diameter of D 2 ) are assumed to rotate in the Counter Clockwise (C.C.W.) direction. The grinding wheel rotates about its centre O at a speed of N (rpm or revolution per minute). The wafer rotates about its centre O 2 at a speed of N 2 (rpm).

8 294 Z.C. Li, Z.J. Pei and G.R. Fisher The grinding wheel cuts into the wafer from one point (B) on the wafer rim to another point (C) on the wafer rim along arc BO 2 C, as shown in Figure 6. A coordinate system XO 2 Y is used to define all the points on the wafer and the grinding wheel. The origin of the XO 2 Y coordinate system is at the centre of the wafer. Figure 6 The mathematical model to calculate the grinding marks As shown in Figure 6, it is assumed that the cutting point is located at point B on the wafer surface when time t = 0. After a time period of t, the cutting point moves from B to B t. To calculate the position of B t in XO 2 Y coordinate system, the motion of the cutting point from B to B t is decomposed into two parts. Firstly, the rotation of the wafer in the C.C.W. direction is treated by rotating the centre of the wheel at an angle α 2 in the Clockwise (C.W.) direction. Hence, the cutting point on the wheel rim also rotates an angle α 2 in the C.W. direction from B to B. Secondly, during the time period of t, the cutting point on the wheel rim has rotated an angle α in the C.C.W. direction from B to B t. 3.2 Derivations of the mathematical model The position of B t can be described by the following equation in the XO 2 Y coordinate system: x t = x+ x2 y t = y = ( y + y ) y 2 2 ()

9 SDSG of silicon wafers: a mathematical study on grinding marks 295 where D x = cos( α α 2+ α) (2) 2 D x2 = cosα2 (3) 2 D y+ y2 = sin( α α2+ α) (4) 2 y D = (5) 2 2 sinα 2 D 2 α = π BOO 2 = π 2 arcsin (constant) (6) 2D α = 2π N t (7) α = 2πN t (8) 2 2 Then the position of B t can be described as the following equation obtained by substituting Equations (2) (8) into Equation (): D D D2 x t = cos( 2πN2 t) + cos π 2 arcsin + 2πN t 2πN2 t 2 2 2D D D D2 y t = sin ( 2πN2 t) + sin π 2arcsin + 2πN t 2πN2 t 2 2 2D (9) By increasing time t, the grinding mark of the cutting point on the wafer surface (within one wheel rotation) can be described by the following equation: D D D2 x( t) = cos( 2πN2t) + cos π 2 arcsin + 2πNt 2πN2t 2 2 2D D D D2 y( t) = sin ( 2πN2t) + sin π 2arcsin + 2πNt 2πN2t 2 2 2D (0) D 0 t 4arcsin 2 2π N 2D Please note that more grinding marks can be generated as time t further increases in the following ranges: k D2 k t 4arcsin k 0,,2,3,4 N 2π N 2D + = N

10 296 Z.C. Li, Z.J. Pei and G.R. Fisher The same procedure can be applied to develop the mathematical model for the other side of the wafer where the wafer and the wheel rotate in different directions as described by the following equation: D D D2 x( t) = cos( 2πN2t) + cos π 2 arcsin + 2πNt+ 2πN2t 2 2 2D D D D2 y( t) = sin( 2πN2t) + sin π 2arcsin + 2πNt+ 2πN2t 2 2 2D () D 0 4arcsin 2 t 2π N 2D 3.3 Computer programs for the mathematical model The model developed above has been used to develop programs with a commercial software package Matlab (The MathWorks, Inc., 3 Apple Hill Drive, Natick, MA 0760, USA). All the computer programs accept SDSG parameters (i.e. wheel rotation speed N, wafer rotation speed N 2, wheel diameter D and wafer diameter D 2 ) as input variables and plot the grinding marks as output. The rotation directions of the two wheels and the wafer in SDSG operation are illustrated in Figure 7. For wafer front side, the wheel rotates in the C.C.W. direction while the wafer rotates in the C.W. direction. For wafer back side, the wheel rotates in the C.C.W. direction while the wafer rotates in the C.C.W. direction. In the rest of this paper, unless specified otherwise, the wafer has a diameter of 300 mm while the wheel has a diameter of 60 mm. Simulation results are used to study the effects of SDSG parameters on the distance between adjacent grinding marks and the curvature of the grinding marks. Figure 7 Illustration of rotation directions of the wafer and the wheels (a) wafer front side and (b) wafer back side

11 SDSG of silicon wafers: a mathematical study on grinding marks The effects of SDSG process parameters on grinding marks 4. Effects on the distance between adjacent grinding marks Figures 8 and 9 show the effects of process parameters (N /N 2 : ratio of the wheel rotation speed versus the wafer rotation speed and D : wheel diameter) on the distance between adjacent grinding marks on the front and back sides of the wafer, respectively. The distance between adjacent grinding marks on the front side is the same as that on the back side. As the speed ratio increases, the distance between adjacent grinding lines decreases. As the wheel diameter increases, the line distance does not change. Figure 8 Effects of speed ratio and wheel diameter on the distance between grinding marks on wafer front side 4.2 Effects on the curvature of grinding marks Figures 0 and show the variation of the grinding mark curvature on both sides of the wafer as the speed ratio (the wheel rotation speed versus the wafer rotation speed) and the wheel diameter change. It can be seen that the grinding mark curvature on one side of the wafer is different from that on the other side. As the speed ratio increases, the grinding marks on the wafer front side tend to be more curved but the grinding marks on the wafer back side tend to be less curved. Furthermore, as the wheel diameter increases, the grinding marks on both sides of the wafer become less curved.

12 298 Z.C. Li, Z.J. Pei and G.R. Fisher Figure 9 Effects of speed ratio and wheel diameter on the distance between grinding marks on wafer back side Figure 0 Effects of speed ratio and wheel diameter on the curvature of grinding marks on wafer front side

13 SDSG of silicon wafers: a mathematical study on grinding marks 299 Figure Effects of speed ratio and wheel radius on the curvature of grinding marks on wafer back side 5 Conclusions In this paper, a mathematical model is developed for the grinding marks in SDSG of silicon wafers. The following conclusions can be drawn from this study: The distance between the adjacent grinding lines on both sides of the wafer is determined by the ratio of the wheel rotation speed versus the wafer rotation speed. As the speed ratio increases, the line distance decreases. The wheel diameter does not affect the line distance. 2 The grinding mark curvature on the front side of the wafer is different from that on the back side. 3 The curvature of the grinding marks is determined by the wheel diameter and the ratio of the wheel rotation speed versus the wafer rotation speed. As the wheel diameter increases, the grinding lines tend to become less curved. As the speed ratio increases, the grinding lines tend to become more curved on the front side but less curved on the back side. One practical application of the mathematical model developed here is to aid the optimisation of grinding process to minimise the polishing removal and hence, further reduce the manufacturing cost. The removal amount of the subsequent polishing process after grinding has to be large enough to eliminate all grinding marks. Further reduction of polishing amount necessitates optimisation of the grinding process so that the grinding

14 300 Z.C. Li, Z.J. Pei and G.R. Fisher marks can be eliminated with minimum amount of polishing. Such optimisation will be made easier with the mathematical model of grinding marks presented in this paper. Polishing can effectively remove high-frequency surface roughness (caused by individual diamond grains in the grinding wheel), but its ability to remove grinding marks heavily depends on their frequency (or wavelength). With this mathematical model, frequency and curvature of grinding marks can be controlled by selecting proper grinding parameters. This, in turn, makes it possible to systematically study grinding and polishing processes to eliminate grinding marks. Acknowledgement This study was supported by the National Science Foundation through the CAREER Award DMI References Chidambaram, S., Pei, Z.J. and Kassir, S. (2003a) Fine grinding of silicon wafers: a mathematical model for grinding marks, International Journal of Machine Tools and Manufacture, Vol. 43, No. 5, pp Chidambaram, S., Pei, Z.J. and Kassir, S. (2003b) Fine grinding of silicon wafers: a mathematical model for the chuck shape, International Journal of Machine Tools and Manufacture, Vol. 43, No. 7, pp Dudley, J.A. (986) Abrasive technology for wafer lapping, Microelectronic Manufacturing and Testing, Vol. 4, No. 4, pp. 6. Kerstan, M. and Peitsch, G.J. (2000) Silicon wafer substrate planarization using simultaneous double-disk grinding: impact on wafer surface, geometry, morphology and subsurface crystal damage, Proceedings of the 3rd International Symposium on Advances in Abrasive Technology (ISAAT 2000), Hawaii, USA, pp Li, Z.C., Pei, Z.J. and Fisher, G.R. (2006) Simultaneous double side grinding of silicon wafers: a literature review, International Journal of Machine Tools and Manufacture, Vol. 46, Nos. 2 3, pp Marinescu, I.D., Shoutak, A. and Spanu, C.E. (2002) Technological assessment of double side lapping of silicon, Abrasive Magazine, December/January, pp.5 9. Norwood, A. and Van Hoy, G. (2005) Market share: semiconductor revenue, worldwide, Gartner Dataquest, Retrieved from: Pei, Z.J. (2002) A study on surface grinding of 300 mm silicon wafers, International Journal of Machine Tools and Manufacture, Vol. 42, No. 3, pp Pei, Z.J., Billingsley, S.R. and Miura, S. (999) Grinding-induced subsurface cracks in silicon wafers, International Journal of Machine Tools and Manufacture, Vol. 39, No. 7, pp Pei, Z.J. and Strasbaugh, A. (200) Fine grinding of silicon wafers, International Journal of Machine Tools and Manufacture, Vol. 4, No. 5, pp Pietsch, G.J. and Kerstan, M. (200) Simultaneous double-disk grinding machining process for flat, low-damage and material-saving silicon wafer substrate manufacturing, Proceedings of the 2nd Euspen International Conference, Turin, Italy, pp Pietsch, G.J. and Kerstan, M. (2005) Understanding simultaneous double disk grinding: operation principle and material removal kinematics in silicon wafer planarization, Precision Engineering, Vol. 29, No. 2, pp

15 SDSG of silicon wafers: a mathematical study on grinding marks 30 Quirk, M. and Serda, J. (200) Semiconductor Manufacturing Technology, Columbus, OH: Prentice-Hall, Inc. Shih, A.J. and Lee, N.L. (999) Precision cylindrical face grinding, Precision Engineering, Vol. 23, No. 3, pp Tso, P.L. and Teng, C.C. (200) A study of the total thickness variation in the grinding of ultra-precision substrates, Journal of Materials Processing Technology, Vol. 6, Nos. 2 3, pp Van Zant, P. (2000) Microchip Fabrication, New York: McGraw-Hill. Van, B. and Ogawa, T. (2005) Market share: silicon wafers, worldwide, Gartner Dataquest, Retrieved from: Zhang, X.H., Pei, Z.J. and Fisher, G.R. (2006) A grinding-based manufacturing method for silicon wafers: generation mechanisms of central dimples on ground wafers, International Journal of Machine Tools and Manufacture, Vol. 46, Nos. 3 4, pp Zhou, L., Shimizu, J., Shinohara, K. and Eda, H. (2003) Three-dimensional kinematical analyses for surface grinding of large scale substrate, Precision Engineering, Vol. 27, No. 2, pp