LC VCO Structure. LV VCO structure
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1 LC VCO Structure LV VCO structure LC Tank Spiral inductor (symmetric type) Ideal capacitor Cross coupled circuit Negative resistance To compensate for the loss of the tank Source MOSFET Varactor Accumulation varactor OSC frequency V outn V cont V outp f o 1 2 LC V biasn 1/26
2 Inductor Modeling An equivalent circuit model of inductor Series connection of resistance and inductance Analyze inductance into using Z-parameter < Equivalent circuit of inductor > < Simulation schematic > 2/26
3 TSMC Inductor Inductor selection Tsmc18rf RF_Device Inductor ind_sym symbol Symmetric inductor selection 3/26
4 TSMC Inductor PDK TSMC 65nm spiral inductor PDK Single-ended Symmetric Symmetric with a center tap ind-_std ind_sym ind_sym_ct 4/26
5 Inductor Setting Setting of frequency, inductor width, inner radius and number of turns. Extract inductance and Q-factor of inductor according to frequency. - Freq(Hz) : 1.5G - Inductor_Width (M) : 30u - Inner_Radius (M) : 90u - Number_Of_Turns : 4 Inductance : 5.54nH Q_factor : /26
6 Inductance Design Parameter Inductor L1 L2 (width) L3 (radius) L4 (turns) L (nh) Width (u) Radius (u) turns R (ohm) Q-factor L2 L3 L1 L4 N A L A r l 2 2 r l Q-factor simulation L1 L2_width change L3_radius change L4_turns change 6/26
7 Port Setting Port Show Categories check analoglib Sources Ports port symbol 7/26
8 S - Parameter Simulation condition setting Analysis : sp (S-Parameter Analysis) Ports : Port0 (schematic node choice) Sweep Variable : Frequency Sweep Range : 100M ~ 4G Sweep Type : Logarithmic Number of Steps : 300 Enabled check OK Netlist and Run 100M 4G 8/26
9 Z- Parameter Simulation condition setting Results Direct Plot Main Form Function : ZP Add To Outputs choice Modifier : Real Z11 and Imaginary Z11 OK 9/26
10 Z- Parameter Z = R + jωl Resistance = Real Z11 Inductance = Imaginary[Z11] ω < Equivalent circuit of inductor > Real [Z11] Resistance 1.5GHz Imaginary [Z11] Inductance 1.5GHz 10/26
11 Q-Factor In an ideal series RL circuit energy stroed L imag(z11) Q energy loss R rea(z11) Calculator (Visualization & Analysis XL) Wave choice imag(zp(1 1?result "sp")) /real(zp(1 1?result "sp")) Outputs Setup Name (Q-Factor) Get Expression Add OK imag(zp(1 1?result "sp")) /real(zp(1 1?result "sp")) 11/26
12 Q-Factor Q-factor simulation Inductor Q-factor : 1.50GHz Q-factor 1.5GHz 12/26
13 RLC Resonance frequency of 1.5GHz Add to capacitor in parallel ( p) Ls Cs Lp Rp Cp Rs Cp Lp Rp Cs 2 Rs Ls(1 ) 2 2 Ls 2 2 Ls Rs < Simulation schematic > 13/26
14 Z- Parameter Simulation condition setting Results Direct Plot Main Form Function : ZP Add To Outputs choice Modifier : Magnitude Z11 and Phase Z11 OK 14/26
15 Z- Parameter Magnitude & Phase Magnitude : resonance frequency(1.5ghz) Phase : resonance frequency(1.5ghz) Magnitude [Z11] 1.5GHz Phase [Z11] 1.5GHz 15/26
16 LC VCO Circuit 1.5GHz LC VCO schematic Inductor : 5.54nH Capacitor : pF Input NMOS Length : 180n Total Width : 20u (finger :1) Source NMOS Length : 500n Total Width : 100u (finger :1) vdd : 1.8V biasn : 0.8V 16/26
17 OSC Frequency Simulation condition setting Initial condition (output node) Transient simulation (200ns) Plot output waveform and measure frequency OSC frequency comes less LC resonance frequency. Because of Input mosfet parasitic capacitance(130ff). 1.45GHz OSC frequency 17/26
18 Phase Noise Ideal oscillator vs Real oscillator PSD of output voltage PSD of output voltage f o Ideal Oscillator Frequency Time domain vs Frequency domain f o Real Oscillator Frequency Output voltage T PSD of output voltage f Time Time domain : Jitter (ps) f o Frequency Frequency domain : Phase noise (dbc/hz) 18/26
19 Phase Noise Analyze phase noise at the frequency domain Represent phase noise as single sideband noise (SSN) in log(db) scale. Sn( o) L( ) 10log ( dbc / Hz) P signal Phase noise can be represented by the power spectral density of the voltage/ current noise normalized by the carrier power. PSD of output voltage P signal L( f f o ) = S n (f) / P signal S n (f) f o f Frequency 19/26
20 Phase Noise Phase noise in Circuit L( ) 4kT o P dissipation 2Q 2 P dissipation Q factor Phase noise better ω o (OSC frequency) 20/26
21 Phase Noise (PSS) PSS Periodic Steady-State simulation 50n Output node tstab : Oscillation 안정구간설정 vss 1.5G 10 21/26
22 Phase Noise (Pnoise) Pnoise Setup PSS first, then Pnoise 30 Output node vss Output : Voltage 설정 Output Node 설정 Input : none 1 1K 10M /26
23 Phase Noise Phase noise Calculator (Visualization & Analysis XL) Function Panel (phasenoise 입력 ) Harmonic Number : 1 Signal dataset : pss_fd Noise dataset : pnoise Apply 23/26
24 Phase Noise Phase noise 1.5GHz, 1MHz 1.5GHz, 1MHz 24/26
25 Assignments Derive parasitic resistance and Q-factor at the 1GHz and 4GHz frequency by using Z-parameter method. Inductor setting Inductor width : 30u Inner_radius (M) : 65u Number_of_turns : 4 Design 3.9GHz ~4.1GHz LC VCO and verify and plot output waveforms and phase noise from your oscillator, and Indicate inductor and capacitor value in the report. LC VCO specification VDD supply voltage : 1.8V Bias voltage : 0.8V Phase noise : Min -115dBc/Hz Due: 24 Mar. 10:30(Hardcopy) 25/26
26 Q & A superpyunki@gmail.com 26/26
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