Simplified Analysis and Design of Seriesresonant LLC Half-bridge Converters

Transcription

1 Simplified Analysis and Design of Seriesresonant LLC Half-bridge Converters MLD GROUP INDUSTRIAL & POWER CONVERSION DIVISION Off-line SMPS BU Application Lab

2 Presentation Outline LLC series-resonant Half-bridge: operation and significant waveforms Simplified model (FHA approach) 300W design example

3 Series-resonant LLC Half-Bridge Topology and features Half-bridge Driver Cr Lp LLC tank circuit Preferably integrated into a single magnetic structure f r 2 π Cr Q Q2 3 reactive elements, 2 resonant frequencies f r2 2 π ( + Lp) Cr f r > f r2 Center-tapped output with fullwave rectification (low voltage and high current) Single-ended output with bridge rectifiication (high voltage and low current) Multi-resonant LLC tank circuit Variable frequency control Fixed 50% duty cycle for Q & Q2 Dead-time between LG and HG to allow MOSFET s turn-on fsw fr, sinusoidal waveforms: low turn-off losses, low EMI Equal voltage & current stress for secondary rectifiers; ZCS, then no recovery losses No output choke; cost saving Integrated magnetics: both L s can be realized with the transformer. High efficiency: >96% achievable

4 Waveforms at resonance (f sw = f r ) Dead-time Gate-drive signals Tank circuit current is sinusoidal Magnetizing current is triangular HB mid-point Voltage Resonant cap voltage Transformer currents Diode voltages CCM operation Output current Diode currents

5 Switching details at resonance (f sw = f r ) Dead-time ZVS! Tank circuit current >0 Magnetizing current Gate-drive signals HB mid-point Voltage Resonant cap voltage Transformer currents V(D)<0 Diode voltages I(D)=0 ZCS! Diode currents

6 Operating Sequence at resonance (Phase /6) /6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON; V(D)=-2 Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, f r appears Output energy comes from Cr and Phase ends when Q2 is switched off

7 Operating Sequence at resonance (Phase 2/6) 2/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=V(D2)=0; transformer s secondary is open I(+Lp) charges C OSS2 and discharges C OSS, until V(C OSS2 )=; Q s body diode starts conducting, energy goes back to I(D2) is exactly zero at Q2 switch off Phase ends when Q is switched on

8 Operating Sequence at resonance (Phase 3/6) 3/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) back to (Q is working in the 3 rd quadrant) Phase ends when I()=0

9 Operating Sequence at resonance (Phase 4/6) 4/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) from to ground Energy is taken from and goes to Phase ends when Q is switched off

10 Operating Sequence at resonance (Phase 5/6) 5/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=VD(2)=0; transformer s secondary is open I(+Lp) charges C OSS and discharges C OSS2, until V(C OSS2 )=0; Q2 s body diode starts conducting I(D) is exactly zero at Q switch off Phase ends when Q2 is switched on

11 Operating Sequence at resonance (Phase 6/6) 6/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, fr appears I() flows through Q2 s R DS(on) (Q2 is working in the 3 rd quadrant) Output energy comes from Cr and Phase ends when I()=0, Phase starts

12 Waveforms above resonance (f sw > f r ) Dead-time Gate-drive signals Tank circuit current Magnetizing current is triangular HB mid-point Voltage Resonant cap voltage Transformer currents f=f r ~ Linear portion Diode voltages CCM operation Output current Diode currents

13 Switching details above resonance (f sw > f r ) Dead-time ZVS! Tank circuit current >0 Slope ~ -(Vc-n )/ Magnetizing current Gate-drive signals HB mid-point Voltage Resonant cap voltage Transformer currents V(D)<0 Diode voltages ZCS! I(D)=0 Output current Diode currents

14 Operating Sequence above resonance (Phase /6) /6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON; V(D)=-2 Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, f r appears Output energy comes from Cr and Phase ends when Q2 is switched off

15 Operating Sequence above resonance (Phase 2/6) 2/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=V(D2)=0; transformer s secondary is open I(+Lp) charges C OSS2 and discharges C OSS, until V(C OSS2 )=; Q s body diode starts conducting, energy goes back to V(D2) reverses as I(D2) goes to zero Phase ends when Q is switched on

16 Operating Sequence above resonance (Phase 3/6) 3/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) back to (Q is working in the 3 rd quadrant) Phase ends when I()=0

17 Operating Sequence above resonance (Phase 4/6) 4/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) from to ground Energy is taken from and goes to Phase ends when Q is switched off

18 Operating Sequence above resonance (Phase 5/6) 5/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=VD(2)=0; transformer s secondary is open I(+Lp) charges C OSS and discharges C OSS2, until V(C OSS2 )=0; Q2 s body diode starts conducting Output energy comes from Cout Phase ends when Q2 is switched on

19 Operating Sequence above resonance (Phase 6/6) 6/6 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, fr appears I() flows through Q2 s R DS(on) (Q2 is working in the 3 rd quadrant) Output energy comes from Cr and Phase ends when I()=0, Phase starts

20 Waveforms below resonance (f sw < f r ) Dead-time Gate-drive signals Tank circuit current f=f r2 Magnetizing current HB mid-point Voltage Resonant cap voltage Transformer currents f=f r2 Diode voltages DCM operation Output current Diode currents

21 Switching details below resonance (f sw < f r ) Dead-time Gate-drive signals ZVS! HB mid-point Voltage Resonant cap voltage Tank circuitcurrent = Magnetizing current >0 Portion of f=f r2 Transformer currents V(D)<0 Diode voltages I(D)=0 ZCS! Output current Diode currents

22 Operating Sequence below resonance (Phase /8) /8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON; V(D)=-2 Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, f r appears Output energy comes from Cr and Phase ends when I(D2)=0

23 Operating Sequence below resonance (Phase 2/8) 2/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q2 is ON, Q is OFF D and D2 are OFF; V(D)=V(D2)=0; transformer s secondary is open Cr resonates with +Lp, f r2 appears Output energy comes from Cout Phase ends when Q2 is switched off

24 Operating Sequence below resonance (Phase 3/8) 3/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=V(D2)=0; transformer s secondary is open I(+Lp) charges C OSS2 and discharges C OSS, until V(C OSS2 )=; Q s body diode starts conducting, energy goes back to Phase ends when Q is switched on

25 Operating Sequence below resonance (Phase 4/8) 4/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) back to (Q is working in the 3 rd quadrant) Energy is recirculating into Phase ends when I()=0

26 Operating Sequence below resonance (Phase 5/8) 5/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D is ON, D2 is OFF; V(D2)=-2 Lp is dynamically shorted: V(Lp) = n. Cr resonates with, f r appears I() flows through Q s R DS(on) from to ground Energy is taken from and goes to Phase ends when I(D)=0

27 Operating Sequence below resonance (Phase 6/8) 6/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is ON, Q2 is OFF D and D2 are OFF; V(D)=V(D2)=0; transformer s secondary is open Cr resonates with +Lp, f r2 appears Output energy comes from Cout Phase ends when Q is switched off

28 Operating Sequence below resonance (Phase 7/8) 7/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q and Q2 are OFF (dead-time) D and D2 are OFF; V(D)=VD(2)=0; transformer s secondary is open I(+Lp) charges C OSS and discharges C OSS2, until V(C OSS2 )=0, then Q2 s body diode starts conducting Output energy comes from Cout Phase ends when Q2 is switched on

29 Operating Sequence below resonance (Phase 8/8) 8/8 Q ON Q2 OFF Q Coss Cr n:: D Cout Coss2 Lp Q2 D2 Q is OFF, Q2 is ON D is OFF, D2 is ON Lp is dynamically shorted: V(Lp) =-n. Cr resonates with, fr appears I() flows through Q2 s R DS(on) (Q2 is working in the 3 rd quadrant) Output energy comes from Cr and Phase ends when I()=0, Phase starts

30 Capacitive mode (f sw ~ f r2 ): why it must be avoided Capacitive mode is encountered when f sw gets close to f r2 Although in capacitive mode ZCS can be achieved, however ZVS is lost, which causes: Hard switching of Q & Q2: high switching losses at turn-on and very high capacitive losses at turn-off Body diode of Q & Q2 is reverse-recovered: high current spikes at turn-on, additional power dissipation; MOSFETs will easily blow up. High level of generated EMI Large and energetic negative voltage spikes in the HB midpoint that may cause the control IC to fail Additionally, feedback loop sign could change from negative to positive: In capacitive mode the energy vs. frequency relationship is reversed Converter operating frequency would run away towards its minimum (if MOSFETs have not blown up already!)

31 Waveforms in capacitive mode (f sw ~ f r2 ) Dead-time Gate-drive signals Tank circuit current is piecewise sinusoidal f=f r2 Magnetizing current HB mid-point Voltage Resonant cap voltage Transformer currents f=f r Diode voltages Output current Diode currents

32 Switching details in capacitive mode (f sw ~ f r2 ) Gate-drive signals HARD SWITCHING! Very high voltage on Cr! Magnetizing current HB mid-point Voltage Resonant cap voltage Tank circuit current is <0 Transformer currents Current is flowing in Q s body diode Q s body diode is recovered Diode voltages Output current Diode currents

33 Approximate analysis with FHA approach: Basics BASIC PRINCIPLES Input source CSN (Controlled Switch Network) Resonant tank Ideal transformer Uncontrolled rectifier Low-pass filter Load CSN provides a square wave voltage at a frequency fsw, dead times are neglected Resonant tank responds primarily to its fundamental component, then: Tank waveforms are approximated by their fundamental components Uncontrolled rectifier + low-pass filter s effect is incorporated into the load. Half-bridge Driver Q Q2 Cr Lp a: Cout R 2 Q ON 0 Q2 OFF 2 π Note: Cr is both resonant and dc blocking capacitor Its ac voltage is superimposed on a dc component equal to /2 (duty cyle is 50% for both Q and Q2)

34 Equivalent model with FHA approach The actual circuit turns into an equivalent linear circuit where the ac resonant tank is excited by an effective sinusoidal input source and drives an effective resistive load. Standard ac analysis can be used to solve the circuit Functions of interest: Input Impedance Zin(jω) and Forward Transfer Function M(jω). It is possible to show that the complete conversion ratio / is: v S dc input I in controlled switch vs Zin (jω) 2 = sin( 2π fs t) π M (jω) ac resonant tank rectifier with low-pass filter dc output i S i R I out v R Re 8 Re = π 2 a R 2 R = M(jω) I in = 2 π i s cos( ϕ S ) = 2 π v S Re Zi Iout = 2 π a i R This result is valid for any resonant topology

35 Transformer model (I) Physical model All-Primary-Side equivalent model used for LLC analysis Prim. leakage inductance L L Lµ Ideal Transformer n:: L L2a Sec. leakage inductance Sec. leakage inductance Lp Ideal Transformer a:: Magnetizing inductance L L2b Results from the analysis of the magnetic structure (reluctance model appraach) n is the actual primary-to-secondary turn ratio Lµ models the magnetizing flux linking all windings L L models the primary flux not linked to secondary L L2a and L L2b model the secondary flux not linked to primary; symmetrical windings: L L2a = L L2b APS equivalent model: terminal equations are the same, internal parameters are different a is not the actual primary-to-secondary turn ratio is the primary inductance measured with all secondaries shorted out Lp is the difference between the primary inductance measured with secondaries open and NOTE: L L +Lµ = + Lp = L primary winding inductance

36 Transformer model (II) Lp Ideal Transformer a:: Prim. leakage inductance L L Lµ Ideal Transformer n:: L L2 Sec. leakage inductance Sec. leakage inductance Magnetizing inductance L L2 We need to go from the APS model to the physical model to determine transformer specification Undetermined problem (4 unknowns, 3 conditions); one more condition needed (related to the physical magnetic structure) Only n is really missing: L = + Lp = L L + Lµ is known and measurable, is measurable Magnetic circuit symmetry will be assumed: equal leakage flux linkage for both primary and secondary L L = n 2 L L2 ; then: n = a Lp Lp +

37 Transformer model (III) Example of magnetically symmetrical structure Slotted bobbin Primary winding Ferrite E-half-cores Air gap symmetrically placed between the windings Top view Secondary winding Like in any ferrite core it is possible to define a specific inductance A L (which depends on air gap thickness) such that L = Np 2 A L In this structure it is also possible to define a specific leakage inductance A Llk such that =Np 2 A Llk. A Llk is a function of bobbin s geometry; it depends on air gap position but not on its thickness

38 Numerical results of ac analysis The ac analysis of the resonant tank leads to the following result: Input Impedance: x 2 k 2 Z in ( x, k, Q) Z R Q + j x + + x 2 k 2 Q 2 x M( x, k, Q) 2 + k x Q 2 x k + x 2 k 2 Q 2 Module of the Forward transfer function (voltage conversion ratio): where: NOTES: f r 2 π Cr x x Z R f Lp 8 k Z Re R Cr π 2 a 2 x R ; f ; ; ; ; r x is the normalized frequency ; x< is below resonance, x> is above resonance Z R is the characteristic impedance of the tank circuit; Q, the quality factor, is related to load: Q=0 means Re= (open load), Q= means Re=0 (short circuit); one can think of Q as proportional to Iout 2 Q Z R Re

39 Resonant Tank Input Impedance Zin(jω) Above resonance (x>) Zin(jω) is always inductive; current lags voltage, so when v S =0, i S is still >0: ZVS k + k Below f r2 (x< ), Zin(jω) is always capacitive; current leads voltage, so when v S =0, i S is already <0: ZCS + k Below the first resonance ( <x<) the sign of Zin(jω) depends on Q: if Q<Q m (x) it is inductive ZVS; if Q>Q m (x) it is capacitive ZCS. In general, the ZVS-ZCS borderline is defined by Im(Zin(jω))=0 For x> Zin(jω) is concordant with the load: the lower the load the lower the input current 2 For x< Zin(jω) is discordant with 2 + k the load: the lower the load the higher the input current! ( ) Z i x, k C, Q max ( ) Z i x, k C, 0 a Zin(x,k,Q) Z i x, k C, 0 6 Z R Z i x, k C, 0.5 Q max ( ) ( ) Z i x, k C, 2 Q max 0 Capacitve region Current leading (always ZCS) f = f r2 + k Iout Q=0 (open output) Q=0.76 Q= (shorted output) Inductive (ZVS) for Q<Qm(x) Capacitive (ZCS) for Q>Qm(x) k x Q=0.38 Q=0.9 Inductive region Current lagging (always ZVS) f = Iout f r k=5

40 Voltage conversion ratio M(jω) All curves, for any Q, touch at x=, M=0.5, with a slope -/k; The open output curve (Q=0) is the upper boundary for converter s operating points in the x-m plane; k 2 + k M = for x ; M for x = + k All curves with Q>0 have maxima that fall in the capacitive region. Above resonance it is always M<0.5 M>0.5 only below resonance ZVS below resonance at a given frequency occurs if M> M min >0.5; if M> M min >0.5 is fixed, it occurs if Q>Q m. ( ) M x, k C, 0 ( ) M x, k C, 0.5 Q max ( ) M x, k C, 2 Q max ( ) M x, k C, Q max a M = M x, k C, 0 ( ) B x, k C a Capacitve region Current leading (ZCS) ZVS-ZCS borderline Q=0.38 Q=0.76 C Q=0 (open output) Q=0.9 Iout f = f r2 + k x Q=0 f = Inductive region Current lagging (ZVS) Resonance: Load-independent point All curve have slope = -/ k f r k=5 k 2 + k

41 Effect of k on M(jω) 2 2 k= k=2 M( x,, 0).5 M( x, 2, 0).5 M( x,, 0.5) M( x,, ) M( x, 2, 0.5) M( x, 2, ) M( x,, 2) M( x, 2, 2) x x 2 2 k=5 k=0 M( x, 5, 0).5 M( x, 0, 0).5 M( x, 5, 0.5) M( x, 5, ) M( x, 0, 0.5) M( x, 0, ) M( x, 5, 2) M( x, 0, 2) x x

42 Operating region on M(jω) diagrams a + k Q=0 C k=5 Operating region ( ) M x, k C, 0 ( ) M x, k C, 0.5 Q max ( ) M x, k C, 2 Q max M = ( ) M x, k C, Q max a M x, k C, 0 M-axis can be rescaled in terms B( x, k C ) of : is regulated Given the input voltage range ( min max ), 3 types of possible operation:. always below M<0.5 (step-down) 2. always above M>0.5 (step-up) 3. across M=0.5 (step-up/down, shown in the diagram) Q=Qm x min x x max a min a max k 2 + k

43 Full-load issue: ZVS at min. input voltage Zin(jω) analysis has shown that ZVS occurs for x<, provided Q Q m, i.e. Im[Zin(jω)] 0. If Q=Q m (Im[Zin(jω)] = 0) the switched current is exactly zero, This is only a necessary condition for ZVS, not sufficient because the parasitic capacitance of the HB midpoint, neglected in the FHA approach, needs some energy (i.e. current) to be fully charged or depleted within the dead-time (i = C dv/dt) A minimum current must be switched to make sure that the HB midpoint can swing rail-to-rail within the dead-time. Then, it must be Q Q Z <Q m. Mathematically, the ZVS condition is : (( ) (( (,, Q) ) Im Z in ( x, k, Q) Re Z in x k 2 Coss 2 + C stray min Pin max π Td Coss is the MOSFET s output capacitance, Cstray an additional contribution due to transformer s windings and the layout Analytic expression of Q Z is not handy; a good rule of thumb is to consider the value of Q m and take 0% margin for component tolerance: FHA gives conservative results as far as the ZVS condition is concerned.

44 No-load issues: regulation LLC converter can regulate down to zero load, unlike the conventional LC series-resonant At a frequency >> f r Cr disappears and the output voltage is given by the inductive divider made up by and Lp If the minimum voltage conversion ratio is greater than the inductive divider ratio, regulation will be possible at some finite frequency This links the equivalent turn ratio a and the inductance ratio k: a > max 2 k + k Equivalent schematic of LLC converter for x V a: V Lp V 2 Lp V 2 V a + Lp This is equivalent to the graphical constraint that the horizontal line a / max must cross the Q=0 curve

45 No-load issues: ZVS Zin(jω) analysis has shown that ZVS always occurs for x>, even at no load (Q=0) x> is actually only a necessary condition for ZVS, not sufficient because of the parasitic capacitance of the HB midpoint neglected in the FHA approach A minimum current must be ensured at no load to let the HB midpoint swing rail-to-rail within the dead-time. This poses an additional constraint on the maximum value of Q at full load: Q π Td 4 ( + k) x max Re 2 Coss + C stray ( ) Tdead ( 2 Coss + C stray ) max Td Hard Switching at no load

46 No-load issues: Feedback inversion Parasitic intrawinding and interwinding capacitance are summarized in Cp Cj is the junction capacitance of the output rectifiers; each contributes for half cycle Under no-load, rectifiers have low reverse voltage applied, Cj increases. The parasitic tank has a high-frequency resonance that makes M increase at some point: feedback becomes positive, system loses control Cure: minimize Cp and Cj, limit max fsw. a: Cj Lp Cp Cj Lp ( ) MM x, k C, 0, p MM ( x, k C, 0.05, p ) a q M = MM ( x, k C, 0., p ) (,, 0.2, p ) MM x k C C D C D x C j Cp + a 2 x d dx M < 0 region λ 4 k λ 2 C D Cr λ =0.08 d dx M > 0 region

47 Design procedure. General criteria. DESIGN SPECIFICATION range, holdup included ( min max ) Nominal input voltage ( nom ) Regulated Output Voltage () Maximum Output Power (Pout max ) Resonance frequency: (f r ) Maximum operating frequency (f max ) ADDITIONAL INFO C oss and C stray estimate Minimum dead-time The converter will be designed to work at resonance at nominal Step-up capability (i.e. operation below resonance) will be used to handle holdup The converter must be able to regulate down to zero load at max. Q will be chosen so that the converter will always work in ZVS, from zero load to Pout max There are many degrees of freedom, then many design procedures are possible. We will choose one of the simplest ones

48 Design procedure. Proposed algorithm (I).. Calculate min., max. and nominal conversion ratio with a=: M min M max M max nom min nom 2. Calculate the max. normalized frequency x max : x max 3. Calculate a so that the converter will work at resonance at nominal voltage a f max 4. Calculate k so that the converter will work at x max at zero load and max. input voltage: k 5. Calculate the max. Q value, Q max, to stay in the ZVS region at min. and max. load: f r 2 M nom 2 a M min 2 a M min 2 x max Q max k 2 a M max ( ) 2 2 a M max ( ) 2 2 n M max + k

49 Design procedure. Proposed algorithm (II). 6. Calculate the effective load resistance: Re 8 a 2 R π 2 8 a 2 2 π 2 Pout max 7. Calculate the max. Q value, Q max2, to ensure ZVS region at zero load and max. : Q max2 π Td 4 ( + k) x max Re 2 Coss + C stray ( ) 8. Choose a value of Q, Q S, such that Q S min(q max, Q max2 ) 9. Calculate the value x min the converter will work at, at min. input voltage and max. load: x min + k ( ) 2 n M max 0. Calculate the characteristic impedance of the tank circuits and all component values: Z R Re Q S Cs 2 fr Z R π + Q S Q max Z R 2 π fr 4 Lp k

50 Design example. 300W converter range Nominal input voltage Regulated ouput voltage Maximum output Current Resonance frequency Maximum switching frequency Start-up switching frequency HB midpoint estimated parasitic capacitance Minimum dead-time (L6599) ELECTRICAL SPECIFICATION 320 to 450 Vdc 400 Vdc 24 V 2 A 90 khz 80 khz 300 khz 200 pf 200 ns 320V after missing cycle; 450 V is the OVP theshold of the PFC pre-regulator Nominal output voltage of PFC Total Pout is 300 W

51 Design example. 300W converter M min. Calculate min. and max. and nominal conversion ratio referring to 24V output: 24 max M max min M nom nom Calculate the max. normalized frequency x max : x max f max 80 f r Calculate a so that the converter will work at resonance at nominal voltage a 2 M nom 4. Calculate k so that the converter will work at x max at zero load and max. input voltage: k 2 a M min 6 2 a M min 2 x max 5. Calculate the max. Q value, Q max, to stay in the ZVS region at min. and max. load: Q max k 2 a ( ) 2 2 a M max + k M max ( 2 n M max ) 2

52 Design example. 300W converter 6. Calculate the effective load resistance: Re 8 a 2 R π 2 8 a Ω π 2 Pout max 7. Calculate the max. Q value, Q max2, to ensure ZVS at zero load: Q max2 π Td ( + k) x max Re ( 2 Coss + C stray ) 8. Choose a value of Q, Q S, such that Q S min(q max, Q max2 ) Considering 0% margin: Q S = = Calculate the value x min the converter will work at, at min. input voltage and max. load: x min + k ( ) 2 n M max + Q S Q max f min khz Z R 0. Calculate the characteristic impedance of the tank circuits and all component values: Z R Re Q S Ω Cs 46 nf 68 µh Lp k 408 µh 2 fr Z R π 2 π fr

53 Design example. 300W converter. Calculate components around the L6599: Oscillator setting. Choose CF (e.g. 470 pf as in the datasheet). Calculate RFmin: Calculate RFmax: RF min = = = 3. kω 3 CF f min = RF RF min max = = k Ω fmax 80 f min Calculate Soft-start components: 3 3 RF RSS = min = = kω CSS = = = µ F fstart 300 R 3 SS f min 3 3

54 Comparison with ZVS Half-bridge (I) Primary Conduction Losses (W).8 AHB LLC Primary Switching Losses (W).6 AHB LLC Secondary Conduction Losses Input Voltage (V) Input Voltage (V) AHB LLC ELECTRICAL SPECIFICATION Input Voltage: 300 to 400 (*) Vdc Output voltage: 20 Vdc Output power: 00 W Switching frequency: 200 khz (*) 300 V holdup, 400 V nominal voltage Primary Conduction Losses Primary Switching Losses Secondary Conduction Losses Secondary Switching Losses Total Losses AHB 0.97 W.38 W 3.5 W? ? W LLC 0.95 W 0.6 W 2.25 W 0 W 3.8 W

55 Comparison with ZVS Half-bridge (II) Efficiency (%) Efficiency (%) AHB optimized for 400 V 94.5 AHB 94 AHB LLC 93 LLC Output Power (W) 92 Nominal voltage Input Voltage (V) ZVS Half-bridge LLC resonant half-bridge MOSFETs: high turn-off losses; ZVS at light load difficult to achieve Diodes: high voltage stress higher V F higher conduction losses; recovery losses Holdup requirements worsen efficiency at nominal input voltage MOSFETs: low turn-off losses; ZVS at light load easy to achieve Diodes: low voltage stress (2 ) lower V F low conduction losses; ZCS no recovery losses Operation can be optimized at nominal input voltage