Introduction to LLC resonant converters. Roman Stuler

Transcription

1 Introduction to LLC resonant converters Roman Stuler LLC resonant converter training, Brno 2012

2 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 2

3 Introduction - Regulatory Agencies Targets Standby(no load) Power Reduction ~25% of total energy passing through power supplies is in standby mode [13] Concerted effort by worldwide regulatory agencies Active Mode Efficiency Improvement ~75% of total energy passing through power supplies is in active mode [13] Power Factor Correction (or Harmonic Reduction) Applicable with IEC [11] (Europe, Japan) Some efficiency specifications also require >0.9 PF. example: computers (ENERGY STAR rev. 4 [12] ) => Energy conversion efficiency significantly affects total power consumption! Korea e-standby program [8] China CSC [6] (ex-cecp), Japan Top Runner [9] program Japan Eco Mark [10] program Australia AGO [7] California CEC [5] Europe COC [4] ENERGY STAR [3] 3

4 Energy Efficiency Regulations Computing Desktops: ENERGY STAR 5.0 effective on Jul. 1, PLUS & Climate Savers Computing Initiative Tiered efficiency levels Laptops (More information at ENERGY STAR 2.0 for External Power Supplies) Efficiency: 87% Standby (no load) power: 500 mw PF 0.9 Solid State Lighting Luminaires ENERGY STAR 1.1 effective on Feb. 1, 2009 Off-state power: 0 Minimum efficacy (Lumen/Watt) requirements by applications (downlights, outdoor lights, etc ) PF 0.9 for Commercial 0.7 for Residential ENERGY STAR 1.2 effective in 2H2009 ENERGY STAR additional requirements for LED bulbs PF 0.7 High system efficacy high efficiency power supply Set-Top Boxes (STB) ENERGY STAR 2.0 effective on Jan 1, 2009 Europe Code of Conduct version 7 effective Jan 1, 2009 Standard is based on maximum allowable TEC (Total Energy Consumption in kwh/year) or allowance Base Allowance depends on the type of STB (Cable, Satellite, etc ) Additional functionalities allowance (DVR, etc ) Annual Energy Allowance (kwh/year) = Base Functionality Allowance + Additional Functionalities Allowance For up-to-date information on agencies and regulations, check the PSMA energy efficiency data base at: 4

5 Regulation example - Computing Power Supplies Efficiency (%) Levels Specification 20% of rated output power 50% of rated output power 100% of rated output power Effective Date Single-Output Non-Redundant PFC 0.9 at 50% 81% 85% 81% Start June 2007 Single-Out tput Single-Output Non-Redundant PFC 0.9 at 50% Single-Output Non-Redundant PFC 0.9 at 50% 85% 89% 85% 88% 92% 88% Start June 2008 Start June 2010 All in 1 PC Single-Output Non-Redundant PFC 0.9 at 50% 90% 94% 91% Target Sources: 80 PLUS : Climate Savers Computing Initiative: ENERGY STAR : 5

6 Summary - World consumption of energy increases year-by-year (More and more Computers, LCD and PLASMA TVs, Game consoles) - Significant portion of energy is lost during power conversion and also during standby mode - Conversion efficiency has to be increased and no-load consumption has to be minimized to assure that given power networks will be able to supply increased number of electric equipment - Energy agencies releasing various national programs that define minimum equipment efficiency and maximum no-load consumption in given category 6

7 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 7

8 Switch in power electronics Lower switch Upper switch Complementary switch - Power switch always composes from a switch and freewheeling path (diode or transistor) - Switch is used to deliver energy to storage element (inductor) - Freewheeling path is used to close demagnetization current 8

9 Switch in power electronics using MOSFET Lower switch Upper switch Complementary switch - Body diode can be used as a freewheeling diode in complementary switch configuration when using MOSFET 9

10 Switch in basic non-isolated topologies i 1 T u CE R L R L U 1 U D i 2,I i (U 2 ) 2 i 2,I 2 u X i D DC ss motor or LC filter I 2 C R Z U 2 Buck converter topology i 2 =i D i 1 L = U 1 u L i C u X C Z R Z U 2 Boost converter topology Magnetization phase Demagnetization phase 10

11 Switch in forward topology Forward topology Two switch forward topology Magnetization phase Demagnetization phase 11

12 Switch in buck-boost topology Inverting B-B topology Flyback topology Magnetization phase Demagnetization phase 12

13 Switch in ideal flyback converter - Minimum current and voltage overlap i.e. negligible switching losses 13

14 Real components parasitic elements Transistor Diode Transformer - Parasitic inductances and capacitances causes unwanted resonances - PCB parasitic inductances and capacitances has to be included as well 14

15 Switch in real flyback converter 15 -Ringing and more significant voltage and current overlap occurs in real application just due to parasitic elements

16 Switch in real flyback converter with snubbers - Ringing can be damped by snubbers that however uses dissipative elements the power dissipation is still here 16

17 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 17

18 Need for soft switched topologies - High turn-on and turn-off losses occur during hard switching - Coss energy (1/2*Coss*Vds^2) is burnt during each turn-on - Llk energy (1/2*Llk*Id^2) is burnt during each turn-off - Diode is commutated under high current => Qrr related losses - Various parasitic resonances are present causing voltage spikes that may exceed maximum ratings of used components - Passive and thus dissipative snubber networks are usually needed to damp system - Application EMI signature is affected by parasitic oscillations and capacitive currents (Coss discharge) 18

19 Soft switching basic principles - Using application parasitic and/or adding some additional energy storage devices (L or C) to implement two basic soft switching principles: ZVS Zero Voltage Switching: Switch is turned ON when there is low or ideally zero voltage across its terminals - Ideal switching technique for MOSFETs because it eliminates Coss related losses ZCS Zero Current Switching: Switch is turned OFF when there is low or ideally zero current flowing though its terminals - Ideal switching technique for diodes, BJTs or IGBTs because eliminates trr and storage time related losses Note: ZVS/ZCS techniques eliminates switching losses however, usually increases conduction losses due to higher RMS current in the switch 19

20 Zero voltage switching QR converters - Example: Half wave mode ZVS QR buck 20

21 Zero current switching QR converters - Example: Full wave mode ZCS QR buck 21

22 Quasi resonant AC/DC topologies - Uses portion of the resonant cycle to prepare nearly ZVS or ZCS condition - Typical example is flyback quasi resonant topology - Drawback of DCM operation => high primary and secondary rms current - Vin and Pout are dependent parameters 22

23 Introduction Agenda Switch techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 23

24 Resonant and Multi-resonant topologies -The primary current has sinusoidal wave shape for nominal load and line conditions - ZVS and ZCS conditions are prepared for power semiconductors -Some resonant converters are called multi resonant because the resonant frequency changes during one switching cycle - Two main resonant converter topologies can be identified: Series resonant converter Parallel resonant converter Came out from well known half bridge topology by its power stage modification. Disadvantage of these converters is relatively low regulation range => the line and load changes are limited. 24

25 Classical HB to resonant topology transition Classical HB topology LLC resonant topology 25

26 Series resonant converter - Lr, Cr and load resistance forms series resonant circuit. - Resonant tank impedance is frequency dependent - Regulation can be done by the operating frequency modification - Maximum gain of this converter is equal to transformer turns ratio for: f sw = f s = 2 π 1 L r C r 26

27 Parallel resonant converter - Lr and Cr forms the series resonant circuit again - Load resistance is now connected in parallel with resonant capacitor thus called parallel RC. 27

28 Series parallel resonant converter (LCC) - Contains three resonant components Lr, Csr and Cpr - Combines advantages of SRC and PRC - The light or even no load regulation is not problem. 28

29 Transition to the LLC resonant converter -The LCC converter has still many disadvantages => other topology is desirable for high density and efficiency SMPS - LCC resonant tank can be changed to the LLC resonant tank 29

30 Gain characteristics of the LLC converter - Operation at fs is possible for nominal load and line conditions 30

31 Benefits of an LLC series resonant converter Type of serial resonant converter that allows operation in relatively wide input voltage and output load range when compared to the other resonant topologies Limited number of components: resonant tank elements can be integrated to a single transformer only one magnetic component needed Zero Voltage Switching (ZVS) condition for the primary switches under all normal load conditions Zero Current Switching (ZCS) for secondary diodes, no reverse recovery losses Cost effective, highly efficient and EMI friendly solution for high and medium output voltage converters 31

32 Classical HB and LLC topology differences Topology Advantages Disadvantages Classical HB LLC resonant Low ripple current on the secondary Wide regulation range Constant frequency operation ZVS condition is assured for whole load range Primary current is harmonic for heavy loads =>EMI ZCS condition for secondary rectifier for heavy loads Switching under high currents (primary and secondary) ZVS conditions for primary switches can be assured only for limited loads Higher ripple current on the secondary => lower ESR capacitors needed Operating frequency isn't constant Lower regulation range 32

33 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 33

34 Configurations of an HB LLC single res. cap - Higher input current ripple and RMS value - Higher RMS current through the resonant capacitor - Lower cost - Small size / easy layout 34

35 Configurations of an HB LLC split res. cap Compared to the single capacitor solution this connection offers: - Lower input current ripple and RMS value by 30 % - Resonant capacitors handle half RMS current - Capacitors with half capacitance are used 35

36 Resonant tank configurations discrete solution Resonant inductance is located outside of the transformer Advantages: - Greater design flexibility (designer can setup any L s and L m value) - Lower radiated EMI emission Disadvantages of this solution are: - Complicated insulation between primary and secondary windings - Worse cooling conditions for the windings - More components to be assembled 36

37 Resonant tank configurations integrated solution Leakage inductance of the transformer is used as a resonant inductance. Advantages: - Low cost, only one magnetic component is needed - Usually smaller size of the SMPS -Insulation between primary and secondary side is easily achieved - Better cooling conditions for transformer windings Disadvantages: - Less flexibility (achievable Ls inductance range is limited) - Higher radiated EMI emission - LLC with integrated resonant tank operates in a slightly different way than the solution with discrete L s, different modeling has to be used - Strong proximity effect in the primary and secondary windings 37

38 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 38

39 Operating states of the LLC converter F s = 2 π 1 Discrete resonant tank solution Two resonant frequencies can be defined: C s L s F min = 2 π C s 1 ( L LLC converter can operate: a) between F min and F s c) above F s b) direct in F s d) between F min and F s - overload e) below F min s + L m ) 39

40 Operating states of the LLC converter a) Operating waveforms for f min < f op < f s A B C D E F G H 40

41 Operating states of the LLC converter b) Operating waveforms for f op = f s A B C D E F 41

42 Operating states of the LLC converter c) Operating waveforms for F op > F s Discrete resonant tank solution A B C D E F 42

43 Operating states of the LLC converter d) Operating waveforms for fmin < fop < fs strong overload A B C D E F G H 43

44 Operating states of the LLC converter Integrated resonant tank solution - Integrated resonant tank behaves differently than the discrete resonant tank - leakage inductance is given by the transformer coupling - L lk participates only if there is a energy transfer between primary and secondary - Once the secondary diodes are closed under ZCS, L lk has no energy M = 1 L L lk m Secondary diodes are always turned OFF under ZCS condition in HB LLC. The resonant inductance L s and magnetizing inductance L m do not participate in the resonance together as for discrete resonant tank solution when secondary diodes are closed! 44

45 Operating states of the LLC converter Integrated resonant tank solution Two resonant frequencies can be defined: F s = 2 π 1 C s L s F min = 2 π 1 C s L m LLC converter can again operate: a) between Fmin and Fs c) above Fs b) direct in Fs d) between Fmin and Fs overload e) below Fmin 45

46 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 46

47 LLC converter modeling equivalent circuit LLC converter can be described using firs fundamental approximation. Only approximation accuracy is limited!! Best accuracy is reached around F s. Transfer function of equivalent circuit: G ac = n V V in out = Z 1 Z + 2 Z 2 Z 1, Z 2 are frequency dependent => LLC converter behaves like frequency dependent divider. The higher load, the L m gets to be more clamped by R ac. Resonant frequency of LLC resonant tank thus changes between F s and F min. 47

48 LLC converter modeling equivalent circuit Real load resistance has to be modified when using fundamental approximation to convert non linear circuitry to linear model. In a full-wave bridge circuit the RMS current is: π I ac = I _ RMS O 2 2 Considering the fundamental component of the square wave, the RMS voltage is: 2 2 V ac = V _ RMS O π The AC resistance R ac ca be expressed as: V E R ac _ RMS 8 O 8 Rac = = = 2 2 Iac π I _ RMS O π L 48

49 Resonant tank equations Quality factor: 2 n RL Q = Z 0 Load dependent! Characteristic impedance: Z = 0 L C s s Lm/Ls ratio: m = L L m s Gain of the converter: G = 2 ( V + V out V in f ) Series resonant frequency: F s = 2 π 1 C s L s F min Minimum resonant frequency: = 2 π C s 1 ( L s + L m ) 49

50 voltage gain Lm/Ls=6 Normalized gain characteristic Q=200 Light load Region 2 ZVS Region 1 Q=0.05 Q=0.5 Q=1 Q=2 Q=3 Q=4 Q=5 Q=10 Q=20 Q=50 Q=100 Q= ZCS Region 3 Q=0.05 Heavy load f / fs Region3: ZCS region Region 1 and 2: ZVS operating regions 50

51 Gain characteristic discussion - The desired operating region is on the right side of the gain characteristic (negative slope means ZVS mode for primary MOSFETs). -Gain of the LLC converter, which operates in the f s is 1 (for discrete resonant tank solution) - i.e. is given by the transformer turns ratio. This operating point is the most attractive from the efficiency and EMI point of view sinusoidal primary current, MOSFETs and secondary diodes optimally used. This operating point can be reached only for specific input voltage and load (usually full load and nominal V bulk ). Gain characteristics shape and also needed operating frequency range is given by these parameters: - L m /L s ratio - Characteristic impedance of the resonant tank - Load value 51

52 How to obtain gain characteristics? Use fundamental approximation and AC simulation in any simulation software like PSpice, Icap4 etc.. Direct gain plot for given R ac 1 V amplitude AC supply 52

53 Discrete and integrated tank gain differences Simulation schematic for discrete solution Simulation schematic for integrated solution 53

54 Discrete and integrated tank gain differences (the same Ls, Lm values and transformer turn ratio) Gain = 0, Gain = 0,125 Gain = 109 khz i.e. out from f s for integrated version and same turns ratio!!!!! Gain [-] f s Ls and Lm separated Ls and Lm integrated E E E+06 Frequency [Hz] 54

55 Discrete and integrated tank gain differences - Integrated solution provides higher gain in comparison to the discrete solution and the same transformer turn ratio! - The leakage inductance boost the transformer gain - Gain difference increases with L s /L m ratio i.e. higher L s causes higher gain difference as the L m gets to be less clamped by the secondary load - Turns ratio correction has to be done when designing integrated solution based on the discrete solution model. n int n = k disc = n disc L 1 L lk m Where: n int n disc k is turns ratio of the integrated solution is turns ratio of the discrete solution is transformer coupling coefficient Note: Leakage inductance is usually very small in comparison to the magnetizing inductance for discrete solution => its impact to the gain characteristic can be neglected but in fact the discrete solution is always combination of both solutions as ideal transformer doesn t exist. 55

56 Discrete and integrated tank gain differences (the same Ls, Lm values after turn ratio correction) Gain = f s for both versions when correction of turns ratio is used for integrated version!!!! Gain [-] Ls and Lm separated f s Ls and Lm integrated E E E+06 Frequency [Hz] 56

57 Basic transformer model As mentioned in previous slides, there exist differences in gain characteristic and power stage operation when comparing discrete and integrated resonant tank solutions. These differences are related to the leakage inductance existence. Generic transformer model reflects the reality and can be used without any problems: Thanks to the transformer reciprocity the M 12 =M 21 =M one can then derive: di1 ( t) di2 ( t) u1( t) = L1 M dt dt di1 ( t) u2 ( t) = M L2 dt di2 ( t) dt k = M L 1 L 2 How to get coupling coefficient k?: k = L 1 L 1s = 1 1 L L Where: L 1s is primary inductance when secondary is shorted L 1 is primary inductance when secondary is opened L 2s is secondary inductance when primary is shorted L 2 is secondary inductance when primary is opened 2s 2 57

58 Impedance transformer model parameters derivation from Ls and k and Gnom Inputs from res. tank deign: L s G m = - required resonant inductance - nominal Lm L gain at nom f s s - Inductance ratio L 1 = L = m m L s k = 1 1 m L 2 2 = Ls ( m 1) Gnom Basic model parameters can be easily derived from resonant inductance, required nominal gain and primary to resonant inductances ratio 58

59 APR transformer model Inputs from real transformer: L 1, L 2, k L = Lm _ eq = L1 Llk1 n s L lk1 APR 1 = G nom = k n = k L L Where: Gnom nominal gain at fs n primary and secondary transformer ratio - FHA can be easily applied to APR model => suitable for analysis Ideal trf. in APR model transfers sec. impedance to primary by 1/G nom - Real transformer inductance ratio n is affected by coupling coefficient Integrated LLC stage can be also modeled using T or Π transf. model 59

60 T model of the transformer Inputs from real transformer: L 1, L 2, k, n n = L 1 L 2 L lk 1 _ e = ( 1 k) L1 L m 1_ e = k L L 1 lk 2 _ e = Llk 1_ e - The equivalent magnetizing inductance cannot be clamped by output load - Model components values cannot be measured physically - This model uses ideal transformer with turns ratio that is equal to inductance turns ratio 60

61 Π model of the transformer Inputs from real transformer: L 1, L 2, k n = L L 1 2 Lm1= - The left equivalent magnetizing inductance cannot be clamped by load - Model components values cannot be measured physically - This model uses ideal transformer with turns ratio that is equal to inductance turns ratio - Magnetizing inductance is not fully clamped by load in integrated res. tank designs due to leakage inductance 61

62 Gain characteristics - multiple output design Use fundamental approximation with AC simulation and recalculate AC resistances to only one output i.e. parallel combination of recalculated AC resistances. R ac _ total = Rac Rac 1 1 Rac + 2 Rac 2 n n 2 3 n n

63 Full load Q and m factors optimization Proper selection of these two factors is the key point for the LLC resonant converter design! Their selection will impact these converter characteristics: - Needed operating frequency range for output voltage regulation - Line and load regulation ranges - Value of circulating energy in the resonant tank - Efficiency of the converter The efficiency, line and load regulation ranges are usually the most important criteria for optimization. Quality factor Q directly depends on the load. It is given by the L s and C s components values for full load conditions: Q = n 2 R L C s s L 63

64 Full load Q and m factors optimization n=8, L s /L m =6, Q=parameter, Rload=2.4Ω Gain [-] Gmax Needed gains band for full load regulation Gmin f@q=4 f@q= E E E+06 Frequency [Hz] Q=2 Q=3 Q=4 - Higher Q factor results in larger F op range - Characteristic impedance has to be lower for higher Q and given load => higher C s - Low Q factor can cause the loss of regulation capability! - LLC gain characteristics are degraded to the SRC for very low Q values. 64

65 Full load Q and m factors optimization n=8, C s =33nF, L s =100uH, L m =parameter, Rload=2.4Ω Gain [-] Gmax Gmin Needed gains band for full load regulation f@k=2 f@k= E E E+06 Frequency [Hz] k=2 k=4 k=6 k=8 k=10 - The m=l m /L s ratio dictates how much energy is stored in the L m. - Higher m will result in the lover magnetizing current and gain of the converter. - Needed regulation frequency range is higher for larger m factor. 65

66 Full load Q and k factors optimization Practically, the L s (i.e. leakage inductance of the integrated transformer version) has only limited range of values and is given by the transformer construction (for needed power level) and turns ratio. The Q factor calculation is then given by the wanted nominal operating frequency f s. The m factor has to be calculated to assure gains needed for the output voltage regulation (with line and load changes). The m factor can be set in such a way that converter wont be able to maintain regulation at light loads skip mode can be easily implemented to lover no load consumption. The higher Z 0 i.e. L s /C s ratio is used the lower freq range is needed to maintain Regulation. If to low C s is used the voltage grows to excessive values and gain doesn t have to be high enough for regulation. 66

67 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 67

68 2.0A 1.0A -0.0A -1.0A -2.0A ms -I(IDM2) ms ms ms ms ms ms ms Time ms 400V 300V 200V 100V 2.0A 1.0A -0.0A -1.0A -2.0A ms -I(IDM1) ms ms ms ms ms ms ms Time 0V 2.780ms 2.782ms 2.784ms 2.786ms 2.788ms 2.790ms 2.792ms 2.794ms 2.796ms 2.798ms V(Cs2:2) Time ms Primary currents single resonant cap I IN, I DM1 F sw = F s I DM2 1.0A 2.0A V Cs I Cs -0.0A -1.0A -2.0A ms ms ms ms ms ms ms I(Cs2) I(L5) -I(TX1) Time Isec I C = I primary = + n s L m I IC s _ RMS Iout π Vbulk n 24 Lm f sw 68

69 2.54A 2.00A 1.00A 0A -1.00A -1.49A ms -I(V1) ms ms ms ms ms ms Time 2.0A 1.0A -0.0A -1.0A -2.0A ms -I(IDM2) 2.0A 1.0A -0.0A -1.0A -2.0A ms -I(IDM1) ms ms ms ms ms ms ms Time ms ms ms ms ms ms ms ms 400V 300V 200V 100V Time ms 0V 1.320ms 1.325ms 1.330ms 1.335ms 1.340ms 1.345ms 1.350ms V(Cs2:2) Time 2.0A 1.0A -0.0A -1.0A -2.0A ms ms ms ms ms ms ms ms I(Cs) 2.0A 1.0A -0.0A -1.0A -2.0A Time ms ms ms ms ms ms ms ms I(Cs2) Time Primary currents split resonant cap I DM1 I Cs1 Fsw=Fs I DM2 I IN V Cs2 I Cs2 69

70 Comparison of Primary Currents Single and split resonant capacitor solutions - 24 V / 10 A application Parameter Single Cap Split Caps I Cs_Pk 2.16 A 1.08 A I Cs_RMS 1.52 A 0.76 A I IN_Pk 2.16 A 1.08 A I IN_RMS 1.07 A 0.76 A Split solution offers 50% reduction in resonant capacitor current and 30% reduction in input rms current Select resonant capacitor(s) for current and voltage ratings 70

71 Primary switches dimensioning 2.0A 1.0A 0A A B -1.0A ms ms ms ms ms ms -I(IDM1) (V(M1:g)- V(bridge))/10 V(M2:g)/10 Time ms - Body diode is conducting during the dead time only (A) - MOSFET is conducting for the rest of the period (B) - Turn ON losses are given by Q g (burned in the driver not in MOSFET) - MOSFET turns OFF under non-zero current => turn OFF losses 71

72 Primary switches dimensioning MOSFET RMS current calculation - The body diode conduction time is negligible - Assume that the MOSFET current has half sinusoid waveform I switch _ RMS Iout π Vbulk n 24 Lm fsw Turn OFF current calculation - Assume that the magnetizing current increases linearly I OFF V 8 L bulk m f sw -Turn OFF losses (E I OFF ) can be find in the MOSFET datasheet or calculated Total switch loses: switch_ total 2 switch_ RMS P I R + dson P OFF 72

73 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 73

74 Secondary Rectifier Design Secondary rectifiers work in ZCS Possible configurations: Push-Pull Configuration Advantages: - Half the diode drops compared to bridge - Single package, dual diode can be used - Space efficient a) Push-Pull configuration for low voltage / high current output b) Bridge configuration for high voltage / low current output c) Bridge configuration with two secondary windings for complementary output voltages Disadvantages: - Need additional winding - Higher rectifier breakdown voltage - Need good matching between windings 74

75 Secondary Rectifier Design Rectifier waveforms for different operating states a) F op < F s b) F op = F s - rectifier current - rectifier voltage c)f op > F s Simplification by analyzing the operating state in the series resonant frequency F s is used thereafter. Another simplification is done assume that the secondary current has sinusoidal shape. 75

76 Secondary Current Calculations Push-Pull Equations RMS diode current I D I _ RMS = out π 4 24 V/10 A output I D _ RMS = 7. 85A 12 V/20 A output I D _ RMS = A AVG diode current I = D _ AVG I D I _ PK = out I 2 out Peak diode current π 2 I I D _ AVG = 5 A _ PK = 15. A I D _ PK = 31. 4A D 7 I D _ AVG = 10A To simplify calculations, assume sinusoidal current and F op =F s 76

77 Rectifier Losses Push-Pull Equations Losses due to forward drop: P DFW = V F I 2 OUT Losses due to dynamic resistance: P DRd R I 16 d OUT = 2 π 2 24 V/10 A Vf=0.8 V, Rd=0.01 Ohm P DFW P DRd = 4.0 W = 0.62 W 12 V/20 A Vf=0.5 V, Rd=0.01 Ohm P DFW P DRd = 5.0 W = 2.48 W Equation 24 V/10 A 12 V/20 A P Rect _ total = ( P + P ) n DFW DRd rect P Re ct _ total = 9.24 W P Re ct _ total = 15 W 77

78 Secondary Rectifier - Bridge Configuration Advantages: - Lower voltage rating - Needs only one winding - No matching needed for windings Disadvantages: - Higher diode drops - Need four rectifiers 78

79 Secondary Rectifier Complementary outputs Bridge configuration complementary output Advantages: - Needs only two windings - Low power looses (one Vf only) Disadvantages: - Rectifiers with higher breakdown voltage (Vbr>2*Vout) - Matching between secondary windings needed 79

80 Secondary Rectifier Design Procedure 1. Select appropriate topology (push-pull or bridge) 2. Calculate rectifier peak, AVG and RMS current 3. Select rectifier based on the needed current and voltage ratings 4. Measure the diode voltage waveform in the application and design snubber to limit diode voltage overshoot and improve EMI signature (for LLC weak snubber is needed since diodes operate in ZCS mode) Notes: - The current ripple increases for f op <f s, the current waveform is still half sinusoidal but with dead times between each half period - The peak current is very high for low voltage and high current LLC applications example 12 V/20 A output: I peak = 31.4 A and I RMS = 9.7 A!! Each mω becomes critical - PCB layout. The secondary rectification paths should be as symmetrical as possible to assure same parameters for each switching half cycle. 80

81 Output Capacitor Dimensioning Output capacitor is the only energy storage device Higher peak/rms ripple current and energy Ripple current leads to: Voltage ripple created by the ESR of output capacitor (dominant) Voltage ripple created by the capacitance (less critical) 81

82 ESR Component of Output Ripple In phase with the current ripple and frequency independent Low ESR capacitors needed to keep ripple acceptable Cost/performance trade-off (efficiency impact) V Equations: Peak rectifier current I rect I _ peak out _ ripple _ pk pk = out π 2 Output voltage ripple peak to peak = ESR I rect _ peak 24 V/10 A example: Cf=5000 uf, ESR=6 mω I rect _ peak = A V out _ ripple _ pk pk= 94 mv Capacitor RMS current: P ESR I Cf = I _ RMS out ESR power losses = I 2 Cf _ RMS ESR π I Cf P ESR _ RMS = 4.83 A = 140 mw 82

83 ESR Component of Output Ripple ms ms ms ms ms ms I(rect) I(Iout) -I(Cf) (V(Iout:+)-24)*10 Time ESR component of the output voltage ripple is in phase with current ripple and is frequency independent. 83

84 Capacitive Component of Output Ripple Out of phase with current and frequency dependent Actual ripple negligible due to high value of capacitance chosen Equation: 24 V/10 A output example: Cf=5000 uf, Fop=100 khz V out _ ripple _ cap _ pk pk = 2 3 I out π f op C f ( π 2) V out _ ripple _ cap = 2.1 mv 24 V/10 A output example: Cf=100 uf, Fop=100 khz V out _ ripple _ cap = 104 mv 84

85 Capacitive Component of Output Ripple us 416.0us 420.0us 424.0us 428.0us 432.0us I(rect) I(Iout) -I(Cf) (V(Iout:+)-23.98)*1000 Time Capacitive component of the output voltage ripple is out of phase with current ripple and is frequency dependent. 85

86 f3 Filter Capacitor Design Procedure 1. Calculate peak and rms rectifier and capacitor currents based on Io and Vout 2. Calculate needed ESR value that will assure that the output ripple will be lower than maximum specification 3. Select appropriate capacitor(s) to handle the calculated rms current and having calculated ESR or lower 4. Factor in price, physical dimensions and transient response 5. Check the capacitive component value of the ripple (usually negligible for high enough C f ) Notes: The secondary rectification paths should be as symmetrical as possible to assure same parameters for each switching half cycle 86

87 Slide 86 f3 This slide may be better off getting split into two slides and add some more notes. Let's discuss. ffmrmw;

88 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 87

89 Resonant inductance balance Transformer leakage inductance - Total L s is always affected by the transformer leakage inductance - Special case for transformer with integrated leakage inductance - L s =L lk - Push pull and mult. output app. are sensitive to the leakage inductance balance Example:L lk(p-s1) = 105 uh L lk(p-s2) = 115 uh L lk = 10 uh L lk(total) = 100 uh L m = 600 uh C s = 33 nf 88 Parameter f s1 = 85.5 khz f s2 = 81.7 khz Measured between pins Secondary pins configuration L A-B C-D short lk(p-s1) D-E open L lk(p-s2) A-B C-D open D-E short L lk(total) A-B C-D short D-E short L m A-B C-D open D-E open 5 % difference

90 Resonant inductance balance Series resonant frequency differs for each switching half-cycle that results in primary and mainly secondary current imbalance. 16A 12A 8A 4A 0A us us us us us us us us I(D6) I(D3) Time 3 A difference in the peak secondary current the power dissipation is different for each rectifier from pair as well as for the secondary windings. 89

91 Resonant inductance balance I primary Converter works below series resonant frequency F s for the one half of the switching cycle and in the F s for the second half of the switching cycle. 90

92 Resonant inductance balance For high power app. it is beneficial to connect primary windings in series and secondary windings in parallel. There is possibility to compensate transformer leakage imbalance by appropriate connection of the secondary windings: L lk_total = 2* L lk L lk_total = 0 91

93 Resonant inductance balance The secondary leakage inductance is transformed to the primary and increases the total resonant inductance value. Situation becomes critical for the LLC applications with high turns ratios. 12 V / 20 A application example: N p = 35 turns L lk_s1 = 100 nh N s = 2x2 turns L lk_s2 = 150 nh n = N p /N s = 17.5 L s = 110 uh L m = 630 uh L lk_s = 50 nh 2 Ls = Llk _ s n = 15.3µ H 50 nh difference on the secondary causes 14 % difference of L s!!! 92

94 Resonant inductance balance Transformer construction and secondary layout considerations: - Resonant tank parameters can change each switching half cycle when push pull configuration is used. This can cause the primary and secondary currents imbalance. - For the transformer with integrated resonant inductance, it has to be checked how the transformer manufacturer specifies the leakage inductance. Specification for all secondary windings shorted is irrelevant. The particular leakage inductance values can differ. - When using more transformers with primary windings in series and secondary windings in parallel the leakage inductance asymmetry can be compensated by appropriate secondary windings connection. - Secondary leakage inductance can cause significant resonant inductance imbalance in applications with high transformer turns ratio. Layout on the secondary side of the LLC resonant converter is critical in that case. 93

95 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 94

96 Transformer winding dimensioning The primary current is sinusoidal for F op = F s. The secondary current is almost sinusoidal too there is slight distortion that is given by the magnetizing current. I primary _ RMS Iout π Vbulk n 24 Lm fsw I secondary _ RMS I out π 2 2 (single winding solution) - The skin effect and mainly proximity effect decreases effective cooper area. - Proximity effect can be overcome by the interleaved winding construction (for discrete resonant tank solution) - The proximity effect becomes critical for the transformer with integrated leakage - Wires that are located to the center of the bobbin feels much higher current density than the rest of the windings even when litz wire used! 95

97 Transformer with integrated leakage - For the standard transformer with good coupling (L lk <0.1*L m ) is the leakage inductance independent on the air gap thickness and position M = 1 L L lk m - Transformer with divided bobbin exhibits high leakage inductance - Significant energy is related to the stray flux - The L lk is dependent on air gap thickness and position 96

98 Transformer with integrated leakage - A ferrite core with air gap on the center leg is used to allow for primary inductance adjustment. - The air gap stores most of the magnetizing current energy related to the primary winding. Thus it is beneficial to place the air gap below the primary winding to minimize additional stray flux and reduce the proximity effect. 97

99 Transformer with integrated leakage -The air gap position within the bobbin affects primary and secondary inductance - Inductance inductor with gapped ferrite core is lower when the gap is located below the coil winding rather than outside of the winding - The difference between both cases is due to the magnetic flux bulging out from the gap and coil - Same coil features higher inductance when gap is not shielded!! 98

100 Transformer with integrated leakage - Gap is shielded by primary winding only - The magnetic conductivity for the primary winding Λ primary is lower than magnetic conductivity for the secondary winding Λ secondary L primary secondary Λ primary = 2 sec ondary 2 N N p s Λ Λ primary < Λ sec ondary = L - Thanks to this core non-homogeneity, the physical turns ratio (N) is not equal to the electrical turns ratio (n) that is given by the primary and secondary inductances: N N p s L primary secondary => It makes no sense to specify transformer turn number before we know real primary and secondary magnetic conductivities L N p is the primary winding turns number N s is the secondary winding turns 99

101 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 100

102 Overcurrent protection techniques for the LLC series resonant converters Impedance of the resonant tank reaches very low values when LLC converter operates near the resonant frequency. Fast over current protection has thus be used to protect the primary switches in case of overload or short circuit. There are few solutions how to protect the LLC power stage from over current: A) Use current sense transformer in the primary path B) Use charge pump to monitor resonant capacitor voltage C) Use split resonant capacitor with clamping diodes D) Prepare design which will work always above fs (not very good solution from the efficiency point of view) Operating frequency of the converter is pushed up by the current control loop in cases A) and B). Primary current is thus limited to the desired value. 101

103 A) Using current sense transformer to prepare OCP feature Advantages: - Easy to implement - Immediate reaction to the primary current changes - Good accuracy of the output current limit when bulk voltage is stable (with PFC front stage) Disadvantages: - High component count - CST transformer needed => higher cost 102

104 B) OCP with resonant capacitor voltage monitoring using charge pump Advantages: - Easy to implement - Good accuracy of the output current limit when bulk voltage is stable (with PFC front stage) Disadvantages: - Another HV capacitor (C1) needed - One half period delay in response 103

105 C) Use two resonant capacitors with voltage clamps Advantages: - Resonant capacitors voltage cannot go above bulk voltage, primary current and output power are thus limited automatically no need for other control loop - Converter will never enter ZCS region - Input current ripple is lower in comparison to the one cap solution - Resonant capacitors with lower voltage ratings can be used - Can be also used in single resonant capacitor solution Disadvantages: - Output current limit has pure accuracy => can be used only as short circuit protection - Limits the resonant capacitor value - Is bulk voltage dependent 104

106 Introduction Agenda Switching techniques in SMPS Soft switched topologies Resonant topologies Configurations of the HB LLC converter and a resonant tank Operating states of the HB LLC with discrete resonant tank HB LLC converter modeling and gain characteristics Primary currents and resonant cap dimensioning Secondary rectification design and output cap dimensioning Resonant inductance balance Transformer winding dimensioning and transformer construction Overcurrent protection sensing Design example of 12 V / 20 A output LLC converter with SR 105

107 Design Example 12 V / 20 A LLC converter with synchronous rectification - AND

108 LLC stage requirements Requirement Min Nom Max Unit Input voltage (dc) V Output voltage (dc) V Output current 0-20 A Total output power W Consumption a 500 mw output load in STBY mode W Consumption a 100 mw output load in STBY mode W No load consumption SR operating mw No load consumption SR turned off W Load regulation mv Average Efficiency % -High efficiency is required => secondary SR is needed to fulfill this requirement 107

109 SMPS block diagram EMI Filter NCP4303B SR controller Synchronous Rectification for improved efficiency 90V 265Vac NCP1605 PFC Controller NCP1397B Resonant Controller with built-in Half Bridge Driver 12V / 20A Frequency Clamped Critical Conduction Mode Power Factor Controller Resonant Technology for Increased Efficiency and Lower EMI Bias circuitry NCP4303B SR controller TL431 - Bulk voltage is provided by PFC stage driven by NCP NCP1397B is used to implement latched OCP protection - NCP4303 control SR MOSFETs to maximize efficiency - TL431 regulates output voltage by modulating LLC stage operating frequency via optocoupler and NCP1397B 108

110 Resonant tank design Selection of some design parameters: - Resonant tank type: Integrated resonant inductance (cost constrains) - Nominal operating frequency: 80 khz (Efficiency constrains) - Resonant frequency: same as nominal operating frequency 80 khz - Minimum operating frequency: > 60 khz (transformer size constrains) - Maximum full load operating frequency: < 100 khz - Maximum light load operating frequency: 110 khz (then skip) - Nominal resonant capacitor voltage: < 350 V pk 109

111 Step 1 calculate Rac needed for FHA analysis - Small signal AC analysis is desirable for accurate resonant tank design - Equivalent load resistance (Rac) has to be used for FHA: R ac 8 Vout 8 12 = = = 0. 51Ω 2 2 π I η π out _ nom 110

112 Step 2 calculate needed LLC stage gain - Calculate needed converter gain for maximum bulk voltage: G 2 ( V + V ) 2 ( ) 425 out f _ SR min = = = Vbulk _ max Calculate needed converter gain for nominal bulk voltage: G nom = 2 ( V V out + V bulk _ nom f _ SR ) = 2 ( ) 395 = Calculate needed converter gain for minimum bulk voltage: G 2 ( V + V ) 2 ( ) 350 out f _ SR max = = = Vbulk _ min

113 Step 3 Cs value selection/calculation - Optimization criterion has to be selected - Maximum efficiency is required for this design Z = 0 L C s s f s = 2 π 1 L s C s Q = n 2 Z R 0 ac Several facts can be considered from above equations: - The lower Cs is, the higher characteristic impedance and lower quality factor are - The lower Cs is the higher Ls needs to be used to keep required res. frequency - The higher Ls is used the lower frequency range is needed for regulation - The higher Ls is used the higher Lm will be and thus lower magnetizing current Design with minimized Cs brings two main advantages - low operating frequency range for regulation - high efficiency 112

114 Step 3 Cs value selection/calculation - Resonant capacitor voltage reaches too high level if low capacitance is used - It is beneficial to keep Vcs below Vbulk for nominal operating conditions because: - Low voltage caps. handle higher RMS current with small dimensions, lower cost and good reliability - Lower voltage stress occurs to the PCB and transformer primary Step 3 with regards to above considerations is finally as follows: Calculate ICs_RMS_nom based on load current value: π π ICs _ RMS _ nom Isec_ RMS _ mon Gnom Iout _ nom Gnom A Calculated Cs value based on the Ics_RMS_mon and selected Vcs_peak_nom: ICs _ RMS _ nom Cs = = = 31.6nF => 2* 15nF Vbulk _ nom π fop nom V _ Cs _ peak _ nom π 2 2 Note: Some error is induced because we did not included magnetizing current component into calculation as it is not know yet. 113

115 Step 4 Ls calculation - Resonant inductor value can be calculated based on selected resonant frequency and previously calculated resonant capacitor value using modified Thompson law: L 1 1 = = 131.9µ H => ) (2 π ) = s Cs (2 π f µ s Step 5 maximum Lm calculation -The maximum Lm value is given by total bridge parasitic capacitance (Coss of MOSFETs and stray capacitance). Magnetizing inductance has to provide enough energy to overcharge bridge parasitic capacitance and prepare ZVS condition within selected deadtime. L DT C = 1. m f 1 _ max = = op _ max HB _ total mh Future transformer magnetizing inductance should not be higher than this value. H 114

116 Step 6 Ls/Lm ratio selection -The most appropriate Ls/Lm ratio can be selected based on application gain characteristics simulation. Simulation schematic for gain characteristics analysis: - Use Lm = k*ls as a parameter we will get several gain characteristics 115

117 Step 6 Ls/Lm ratio selection -It is evident that k = 5.5 provides optimum performance + some gain margin => Lm = Lprimary = 130u * 5.5 = 715 uh 116

118 Step 7 Integrated resonant tank turns ratio - The turns ration for discrete resonant tank solution that uses transformer with negligible leakage is inverse of nominal gain at resonant frequency n discrete = G 1 primary bulk _ nom nom = L L secondary V = 2 ( V out + V f ) 395 = = ( ) - The gain is boosted when using integrated resonant tank solution because the leakage inductance is not located just only before Lm like in used model G nom _ int egrated > discrete - The higher leakage inductance is the higher gain boost will occur.the integrated resonant tank turns ratio can be then calculated as: n n n discrete int egrated = = = L 1 L s m

119 Step 8 Secondary inductance calculation - The secondary inductance Lsec can be calculated using nint. and Lprimary L L 6 secondary sec ondary = = = 2.23µ 2 2 integrated n Step 9 Final resonant tank gain simulation Calculated components of future integrated resonant tank: Cs = 30 nf (2 x 15 nf) Lprimary= 715 uh Llk_primary = 130 uh Lsecondary= 2.23 uh H 118

120 Step 10 Final gain characteristic review - Integrated resonant tank provides higher peak gain margin (~12 % above Gmax) 119

121 Step 11 Transient simulation - Simple model for transient simulation using elementary simulator libraries 120

122 Step 11 Transient simulation - Proposed resonant tank operates at fs for full load and nominal Vbulk conditions - Ics_rms = 1.57 A can be measured more precisely 121

123 Step 11 Transient simulation - Operating frequency has to drop to 66.6 khz to maintain full load regulation for Vbulk = 350 Vdc 122

124 Step 11 Transient simulation - Operating frequency has to increase to 90 khz to maintain full load regulation for Vbulk = 425 Vdc 123

125 LLC stage primary side components design - Typical NCP1397B connection with minimum component count 124

126 OCP network design - Charge pump OCP sensing is used in consumer electronics due to cost reasons - AC voltage on the resonant capacitor causes AC current through C29 - Current goes through D14 and causes voltage drop on R60 when upslope occurs on the Vcs voltage i.e. each half period only - Charge pump sensor features natural delay as it delivers current information only during one switching half period 125

127 I OCP network design - Calculate or simulate primary RMS current during overload: 2 1 V bulk _ nom imary _ rms Iout π Gnom A _ max Lm f op _ ovld Pr = - Calculate resonant capacitor AC voltage during overload: IPrimary _ rms 1.68 V = Cs ac = 114 Vac _ π f C = op _ ovld 3 VCs _ peak 1 10 Rs = = = 50kΩ 3 I f _ limit - Calculate filtering capacitor value and check power loss : s - Calculate series limiting resistors and OCP charge pump capacitor value: C C = 29 = 2 2 π f op _ ovld ( R R ) VCs R _ ac π Vref _ faul ( R + R ) = = 68nF Vref _ fault PRs = π Rs = W fop _ ovld R R pf 126

128 Fault timer components selection - NCP1397 uses cumulative fault timer that allows for fault and also auto-recovery periods adjustment Ctimer 4u7 150k - Time to fault confirmation: Vtimer ( on) T = R C56 ln 1 = ln R103 I timer fault 103 = Time to auto-recovery time: V T = R C56 ln V 4 timer ( on) 3 6 off 103 = ln = 977 timer ( off ) 1 ms ms 127

129 DT, Fmin, Fmax resistor values - Use NCP1397 DT, Fmin and Fmax nomograms from DS or calculate based on below equations: - Deadtime calculation T DT R 8 = DT ( ) - Fmin calculation based on Rdt and Rt f min = R t R DT R t Fmax calculation based on Rdt, Rt and Rfmax f max = R 11 Note: Excel sheet available t R f max R R t f max R DT => Values for our design: Rdt = 13 kω, Rfmin = 30 kω Rfmax = 27 kω R 7 f max 128

130 Soft Start and frequency shift components - R97 is used to slow down the frequency shift slope in order to overcome oscillations during slight overloading - Startup frequency is given by the total resistance connected to Rt pin during application start: R = R ( R Rt _ start R104 + R97 + R R ) - RRrt_start value can be calculated from above equations or find in the Fmin vs. Rfmin nomogram. The value of R100 can be then calculated as: R 100 RRt _ start R104 + RRt _ start R104 R97 R104 = = 6.2kΩ R R 104 Rt _ start - Soft Start capacitor value C55 = 1 uf has been used to provide SS time constant of ~ 6 ms (C55 - R100). 129

131 FB pin and skip mode components - R84 and R94 values has been used as compromise between optocoupler pole position and light load consumption. R84 limits max. voltage on FB pin. - FB pin voltage overshoot above 5.1 V during skip is given by FB loop response and Skip pin divider R101, R105. The higher overshoot is the longer time SMPS stays in skip mode reducing switching losses. 130

132 Secondary side design - SR with parasitic inductance compensation is used to maximize efficiency when SR MOSFETs in TO220 package are used 131

133 SR design Vds Id SR MOSFET losses: - Conduction losses P π = Iout 4 COND R ds _ on@ Vgs _ clamp => Rds_on selection 2 - Gate drive losses P = Vcc V C DRV clamp g _ ZVS f SW _ max => gate charge selection SR controllers consumption and gate drive losses in standby will affect light load efficiency - Body diode losses P body = I 2 out V f + out R => Affected by diode Vf and dynamic resistance I 2 π 4 dyn 132

134 SR design MOSFET selection SR MOSFET works under ZVS conditions => Gate charge is given by Ciss capacitance (Cgs+Cgd) and gate voltage MOSFET type 5 V [nc] 12 V [nc] 5V [mω] 12V [mω] IPP015N04N FDP047AN IRFB

135 Total SR MO OSFETs power losses (conduc ction+driving) [W] Lpar compensation Vclamp= 6 V Vclamp= 12 V Output current [A] 134

136 NCP4303 Zero Current Detection - The Vcs_off threshold is 0 mv in case no resistor is used in CS - Maximum conduction period of SR MOSFET is desirable for max efficiency 135

137 SR MOSFET parasitic inductance impact - The SR MOSFET conduction time is shortened when MOSFET in TO220 package is used 136

138 SR MOSFET parasitic inductance impact TO220 package is mostly used due to cost and also simple soldering process Parasitic inductances L drain and L source create voltage drop that is proportional to the secondary current I sec(t) derivative. The V ds voltage reaches zero level prior secondary current SR controller detects zero voltage in the time the secondary current has still significant level => efficiency degradation Higher frequency or di sec(t) /dt is, higher efficiency drop will be 137

139 NCP4303 parasitic inductance compensation L comp can be done on PCB or using ferrite bead Secondary current SR MOSFET gate voltage SR MOSFET conduction period is maximized when NCP4303 implemented with compensation Inductance 138