THREE DIMENSIONAL SIMULATION STUDY OF FULLY DEPLETED SILICON ON INSULATOR MOSFET (SOI MOSFET) BY SEPARATION OF VARIABLE METHOD

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1 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 THREE DIMENSIONAL SIMULATION STUDY OF FULLY DEPLETED SILICON ON INSULATOR MOSFET (SOI MOSFET) BY SEPARATION OF VARIABLE METHOD Neha Goel, Manoj Kumar Paney, Bhawna agarwal 3 (Research Scholar,SRM University NCR Campus Ghaziaba, Inia,7nehagoel@gmail.com) (Department of ECE, SRM University NCR Campus Ghaziaba,Inia,) 3 (Assistant prof. Birla Instt of Tech. Mesra. Ext(jaipur) ) ABSTRACT A three imensional fully eplete Silicon-On-Insulator (SOI MOSFET) evice is evelope, base on the numerical solution of three imensional Poisson s equation, is presente in this paper. Separation of variable metho is use to solve the three imensional Poisson s equation analytically with necessary bounary conitions. In this Paper, Variation of Front Surface potential wrt channel Length, channel With are presente. In Aition to that threshol voltage, Electric Fiel an Mobility Profiles wrt channel length an channel With are also presente, Keywors: Silicon on insulator (SOI), Poisson s Equation with bounary conitions, Front surface potential, Threshol voltage. Mobility, Gate With, Gate Length, Gate Oxie Thickness. INTRODUCTION Gain in integrability an spee are the main reason for the continuous improvements through scaling in metal oxie semiconuctor fiel effect transistors (MOSFETs), However Bulk CMOS will remain as the main technology for submicron gate ULSI systems. Thin film fully eplete silicon on insulators (SOI) MOSFETs have superior electrical performances ue to better control of short channel effects, excellent Latchup immunity, improve isolation & reuce parasitic capacitances compare to bulk silicon technology[]. In this paper, an analytical three imensional moel for small geometry SOI MOSFET is presente by solving 3D poissons equation. The moel is use to preict the subthreshol behavior of small geometry MOSFET as the egraation of threshol voltage an the increase of sub-threshol swing, are the ominant small geometry effects limiting the scaling of channel imensions an to give insights into evice esign an their scaling limits. In this paper, 3D poissons equation is solve by separation of variables metho. SILICON ON INSULATOR (SOI) MOSFET

2 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 There are various characteristics of SOI MOSFET ue to which it woul be beneficial to switch to SOI MOSFET technology. The main avantages of SOI technology are the following. Due to insulation layer, there is no parasitic bipolar evices, As a result, latch up can be totally eliminate. SOI MOSFETs are having higher raiation tolerance. Due to the insulation layer above the substrate, these evices have smaller leakage current. These evices have high spee of operation ue to the lower capacitance between evice an substrate. Power issipation of SOI MOSFET is small, because operate at lower voltages an current levels []. There is a nee to evelop numerical evice moels for SOI-base MOSFETs as these are suitable for circuit simulation. The analytical moeling of the threshol voltage of FD SOI MOSFETs has alreay been reporte by numerous authors [3]-[5]. Small evice structures are ifficult to escribe by one-imensional or even two-imensional (D) moels, that s why 3D numerical evice moels are evelope for stuy of the accurate electrical characterization of small geometry evices [7] [8]. Fig; Cross sectional view of SOI MOSFET along channel Length Now, In orer to analyze the structure shown in Fig., we nee to solve both Poisson s equation an current continuity equation. In this paper, we consier a fully eplete (FD) SOI film. The 3-D Poisson s equation in the FD SOI film region is given by, ( x y x ( x y y ( x y z q Na si () where NA is the oping concentration an ψ(x,y, is the potential at a particular point (x,y, in the SOI film. The 3-D Poisson s Equation is numerically solve by using Separation of Variable metho. The bounary conitions use for the solution of Poisson s equation are applicable only for bulk MOSFETs. Davi Esseni [9] escribe a mobility moel also for SOI MOSFET using solution of D Poisson s equation.

3 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 POISSON S EQUATION WITH BOUNDARY CONDITIONS Fig. illustrates a three-imensional view of a typical MOSFET structure with corresponing evice imensions. The source SOI film an rain SOI film junctions are locate at y=0 an y=leff, respectively,where, Leff is the effective channel length. The front an back Si SiO interfaces are locate at x=0 an x=t s, where t s is the SOI film thickness. t oxf an t oxb are the front an the back gate oxie thicknesses, respectively, where the applie potential to the front an back gates are V gf an V gb.the vertical an the lateral irections are efine as x an y, respectively, while the irection along the with of the transistor is efine as z. The siewall Si SiO interfaces are locate at z=0 an z=w. In general, in orer to analyze this structure, we nee to solve the Poisson s equation. In this paper, we consier a fully eplete (FD) SOI film. The Separation of variables technique is use to solve the 3D poisson s equation analytically with appropriate bounary conitions. The 3-D Poisson s equation in the FD SOI film region is given by: ( x y x ( x y y ( x y z q Na si () In orer to solve equation (), it is separate into D Poisson s equation, -&3-D Laplace equation as : q Na( x) l( x) x si () ( x y) x s( x y) 0 y (3) v( x y x v( x y y v( x y 0 z (4) Where, Ψi=Ψl(x)+Ψs(x,y)+Ψv(x,y, (A) A: Solution of Ψ l (x) l i sb Esb ts x i B: Solution of Ψ s (x,y) q Na ts x si i (5) s( j) sinh Leff j Vssinh y Vr sinh Leff y j sin x si ox toxfcos x (6) 3

4 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 Vs Vr Vs si cos ts ox toxf sin ts idnum (7) inum Vr si ox toxfinum idnum (8) idnum 4 ts sints si ox toxf ts sints 4 sitoxf ox cos ts (9) inum q Na cos ts 3 si sin ts q Esb Vbi sb Esb ts Na ts Vbi sb si cos ts -----(0) inum q Na sin ts Esb cos ts 3 si q Na ts Esb Vbi sb si sin ts () C: Solution of Ψ v (x,y, sinhsrz v Psr sinh sr( W Z) sin s ( y Leff ) cos sleff sin rx si ox toxfr cos r x () Psr Nsr cosh srw (3) Nsr sinh srw inum idnum si cosh sr W toxw srcosh srw ox si ox toxw sr sinh sr W si ox toxw sr sinhsrw (4) cos s Leff inum scos sleff i si ox toxf ri cos sleff i3 sinh rleff ( Vsi4 Vr i5) (5) 4

5 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 idnum r ts sinr ts 4r i i q Na sir 3 q Na sir 3 cos rts sinrts si ox toxfr 4r r ts sinr ts sitoxf ox cos r ts cos sleff sin s Leff Leff s (6) sin r ts Esb q Vgf Vfb sb Esbts Na ts r Vgf Vfb sb si r Esb cos r ts r q Nats Esb Vgf Vfb sb si r sin r ts r cos r ts r i3 i4 i5 4r r ts sinr ts sinsleff s r r s sinh r Leff r cosh s Leff s r sinh r Leff si ox toxfr s r sinsleff 4r r ts sinr ts cosh rleff r sitoxf ox cos r ts Main Equation of Surface Potential (Ψi) can be calculate by putting values of Ψl,Ψs an Ψv in Equation A. RESULTS Variation of Surface Potential, Threshol Voltage, Electric Fiel an Mobility with respect to Channel Length an with can be seen as below. SURFACE POTENTIAL The basic 3D Poisson s equation () is solve using Separation of Variable Metho to etermine the surface potential for fixe value of gate voltage an assume value of the rain voltage. The variation of front surface potential at the front Si-SiO interface (i.e., x=0) of a uniformly ope SOI MOSFET for ifferent values of channel length is shown in fig.a. In this figure, we etermine the Variation of front surface potential for n-channel SOI MOSFETs along the ifferent values of channel length at the front Si-SiO interface an z=w/. The values we have taken here are: toxf=3nm,ts=70nm, toxb=400nm, N A = 0 7 /cm 3 at Vgf=Vgb=0 & Vs=.5V 5

6 front surface potential front surface potential International Journal of Electronics, Electrical an Computational System ISSN 348-7X November i position along channel length (y/leff) Fig. (a) Fig.a. Variation of the front Surface Potential along ifferent values of the channel length at the front Si- SiO interface From this graph we foun that the front surface potential ecreases linearly near the source en an increases linearly near rain en. This is ue the fact that the high electric fiel near the rain causes the conuctivity rapily. Due to this it is expecte that the electric fiel near the rain en reaches the critical fiel for high rain voltage an hence causes the velocity saturation. Similarly, the variation of front surface potential at the front Si-SiO interface of a uniformly ope SOI MOSFET for ifferent values of channel with is shown in fig.b. In this figure, we etermine the Variation of front surface potential for n-channel SOI MOSFETs along the ifferent values of channel with at the front Si-SiO interface an z=w/. The values we have taken here are: for toxf=3nm,ts=70nm,toxb=400nm,n A = 0 7 /cm 3 at Vgf=Vgb=0 & Vs=50mV y i 0. i position along the channel with (z/w) Fig.(b) Fig.b. Variation of the front Surface Potential along ifferent values of the channel with at the front Si- SiO interface Z i 6

7 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 THRESHOLD VOLTAGE OF A SMALL GEOMETRY FDSOI MOSFET The threshol voltage of the short channel MOSFET[5,] is efine as the gate voltage at which the minimum surface potential in the channel is the same as the channel potential at threshol for a long channel evice, i.e., at threshol. The variation of threshol voltage with respect to Channel length an Channel With is shown in Fig 3(a),3(b) resp, Fig 3(a). shows the variation of threshol voltage for n-channel SOI MOSFETs with ifferent values of channel length having these values: Leff=µm,toxf=0nm,toxb=400nm,toxw=5nm, for Vs=50mV an Vgb=0V. Fig 3(b). shows the variation of threshol voltage for n-channel SOI MOSFETs with ifferent values of channel with having these values: W=.µm,toxf=0nm,toxb=400nm,toxw=5nm, for Vs= 50 mv an Vgb=0V. VTF of a small geometry SOI MOSFET is efine as: VTF=Vgf when Ψ(0,y,W/) =φb (B) Now, putting (B) in main Equation of surface potential, an using (5), (6) (5), we have VTF VTFO VTF VTFW i i (7) Where, VT FO Vfb Cs Cit Coxf b Cs Coxf sb qnats Coxf si VT F Coxf sinh Leff srw si i VT FW i Coxf Psr sinh Vssinhy Vr sinh ( Leff y) sin s( y Leff ) cos sleff r 7

8 front channel threshol Voltage(VTF) front threshol voltage,vtf International Journal of Electronics, Electrical an Computational System ISSN 348-7X November VTF i channel Length Fig. 3(a) Fig.3(a) Variation of threshol voltage for n-channel SOI MOSFETs with respect to channel length. Here Fig 3(a) shows that Threshol Voltage Increases linearly near the source en an Decreases linearly near rain en. y i VTF i Channel With Fig.3(b) Fig.3(b). Variation of threshol voltage for n-channel SOI MOSFETs with respect to channel length. W i 8

9 Electric Fiel,E Electric Fiel,E International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 ELECTRIC FIELD: The electric fiel istribution along the channel length an with is also obtaine an it is shown in figures 4(a),4(b). The electric fiel along the length of the channel (Ey) is ominant over the electric fiel along channel with (E The electric fiel increases rapily near the rain en. This is ue to the fact that the carrier ensity near the rain en experiences a rapi ecrease in surface concentration which calls for a rapi increase in the electric fiel to maintain the constant rain current Ey i channel Length Fig. 4(a) Fig.4(a).Variation of Electric Fiel along the length of channel y i 0 5 Ez i Channel With Fig. 4(b) Fig.4(b).Variation of Electric Fiel along the with of channel Z i 9

10 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 MOBILITY: The value of mobility (velocity per unit electric fiel) is influence by several factors. The mechanisms of conuction through the valence an conuction bans are ifferent, an so the mobility associate with electrons an holes are ifferent. As the ensity of opants increases, more scattering occurs uring conuction. Mobility therefore ecreases as oping increases. At low temperatures, electrons an holes gain more energy than the lattice with increasing T, therefore mobility increases. At high temperatures, lattice scattering ominates, an thus mobility falls. We can fin out the mobility of charge carriers from the electric fiel values. The mobility along channel length & channel with is given by, y Eysiox (8) & z Ez siox (9) Where, Ey=Electric fiel along channel length Ez=Electric fiel along channel with εsi=silicon permittivity εox=oxie permitivity The mobility variation along the channel length & channel with is shown in Fig 5(a) & 5(b) resp. Mobility is irectly proportional to the electric fiel. So the shape of the mobility curve along the channel length an with is same as that of the electric fiel curve along channel length an with resp. 0

11 Mobility Mobility International Journal of Electronics, Electrical an Computational System ISSN 348-7X November y i channel Length Fig. 5(a) Fig. 5(a) Variation of mobility with respect to length of channel y i z i Channel With Fig. 5(b) Fig. 5(b) Variation of mobility with respect to with of channel Z i Conclusion: A threshol voltage moel for fully eplete (FD) SOI MOSFET base on numerical solution of 3-D Poisson s equation is presente by using Separation of variables metho. The Stuy of Surface potential istribution, Threshol Voltage, electric Fiel an Mobility is one with respect to channel length an with in this paper.

12 International Journal of Electronics, Electrical an Computational System ISSN 348-7X November 04 References: [] C. Fiegna, H. Iwai, T: Waa, T. Saito, E. Sangiorgi, an B. Ricco, A new scaling methoology for the pm MOSFET, in I993 Symp. VLSI Technol. Dig. Tech. Papers, 993, pp [] Guruprasa Katti, Nanita DasGupta, Amitava DasGupta, Threshol Voltage Moel for Mesa Isolate Small Geometry Fully Deplete SOI MOSFETs Base onanalytical Solution of three Dimensional Poisson s Equation, IEEE Transactions On Electron Devices, Vol. 5, No. 7, July 004. [3] Jason C. S. Woo, Kyle W. Terrill, Prahala K. Vasuev, Two Dimensional Analytic Moeling of Very Thin SO MOSFET s, IEEE Transactions on Electron Devices, Vol. 37. No.9. September 990. [4] Hans van Meer, Kristin De Meyer, A -D Analytical Threshol Voltage Moel for Fully-Deplete SOI MOSFETs with Halos or Pockets, IEEE Transactions on Electron Devices, Vol. 48, No. 0, October 00. [5] H.K Lim, J.G.Fossum, Threshol voltage of thin film SOI MOSFETs, IEEE Transactions on electron evices, Vol. 30, Oct 983. [6] Francis Balestra, Mohcine Benachir, Jean Brini, Gerar Ghibauo, Analytical Moels of Sub threshol Swing an Threshol Voltage for Thin- an Ultra-Thin - Film SO MOSFET s, IEEE Transactions On Electron Devices. Vol 37. No II. November 990. [7] C.Mallikarjun, K. N. Bhat, Numerical an Charge Sheet Moels for Thin Film SO MOSFET s,ieee Transactions On Electron Devices, Vol. 37. No. 9. September 990. [8] Takeshi Shima, Hisashi Yamaa, Ryo Luong MoDang, Table Look-Up Simulator MOSFET Moeling System Using a -D Device an MonotonicPiecewise cubic Interpolation,IEEE transactions on Computer Aie esign of Integrate Circuits an Systems, Vol.CAD., No., April 983. [9] Davi Esseni, Antonio Abramo, Luca Selmi, Enrico Sangiorgi, Physically Base Moeling of Low Fiel Electron Mobility in Ultrathin Single - an Double Gate SOI N - MOSFETs, IEEE Transactions On Electron Devices,Vol. 50, No., December 003. [0] 0.S. Veeraraghavan an J. G. Fossum, Short - channel effects in SO MOSFET S IEEE Trans. Electron Devices, vol. 36, pp. 5-58, 989. [] Z. H. Liu, C. H. Hu, J. H. Huang, T. Y. Chan, M. C. Jeng, P. K. KO, an Y. C. Cheng, Threshol voltage moel for eep- sub micrometer MOSFET s, IEEE Trans. Electron Devices, vol. 40, pp , 993. [] Y. A. El Mansy an A. R. Boothroy, A simple two - imensional moel for IGFET operation in the saturation region, IEEE Trans. Electron Devices, vol. 4, p. 54, 977. [3] T. Y. Chan, P. K. KO, an C. Hu, Depenence of channel electric fiel on evice scaling, IEEE Electron Devices Lett., vol. 6, p. 55, 985. [4] K. W. Temll, C. Hu, an P. K. KO, An analytical moel for the channel electric fiel in MOSFET with grae - rain structure, IEEE Electron Device Lett., vol. 5, p. 440, 984.