Introduction to the Long Channel MOSFET. Dr. Lynn Fuller
|
|
- Dana Haynes
- 6 years ago
- Views:
Transcription
1 ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Introduction to the Long Channel MOSFET Dr. Lynn Fuller Webpage: Electrical and 82 Lomb Memorial Drive Rochester, NY Tel (585) Department webpage: MOSFET_L.ppt Page 1
2 OUTLINE MOSFET s Long Channel vs. Short Channel MOSFET I-V Characteristics MOS Threshold Voltage Design Example References Page 2
3 NMOS Sub p Gate S MOSFET TRANSISTORS G starting wafer Drain Sub Source D SYMBOL CROSSECTION Gate D G Drain Sub Source n n p p NMOS well well PMOS S PMOS Sub In most MOSFETs the source and drain are symmetrical. The source is the source of carriers (electrons in NMOS, holes in PMOS) and the drain is the drain of carriers. The external circuitry will determine the direction of current flow. Holes flow in the same direction as current, electrons flow in the opposite direction. n Page 3
4 THE LONG CHANNEL MOSFET Long-channel MOSFET is defined as devices with width and length long enough so that edge effects from the four sides can be neglected Channel length L must be much greater than the sum of the drain and source depletion widths Depletion Channel Depletion L L L Long Channel Device Short Long Tiny Long Channel Page 4
5 LONG CHANNEL NMOS I-V CHARACTERISTICS +Ids +Id Family of Curves Ids vs Vgs +Vgs Vds Vsub = 0 Saturation Region Id Vgs=Vds + D G - S Id (Amps) + Vgs - Non Saturation Region Vd = 0.1 Volt D G S Id Vsub Vto volts +Vg Vt Sub Vt Slope (mv/dec) Subthreshold Vgs Page 5
6 LONG CHANNEL THRESHOLD VOLTAGE, VT Xox Flat-band Voltage V FB = ms - Q ss - 1 X (x) dx C C 0 ox ox X ox p-type substrate n-type substrate (n-channel) (p-channel) Q ss = q N ss Bulk Potential : p = -KT/q ln (N A /n i ) n = +KT/q ln (N D /n i ) Work Function: M S = M - ( X + Eg/2q + [ p ]) M S = M - ( X + Eg/2q - [ n ]) Difference *Maximum Depletion Width: 4 s[ p ] 4 s[ n ] of channel qna qnd NMOS Threshold Voltage: VT = V FB + 2 [ p ] s q Na ( 2[ p ]) p-type substrate C ox PMOS Threshold Voltage: VT = V FB - 2 [ n ] s q Nd ( 2[ n ]) n-type substrate C ox Page 6
7 n+ Poly p+ Poly MAJOR FACTORS AFFECTING VTO Gate work function, n+, p+, aluminum Substrate doping, Nd or Na Oxide thickness, Xox Surface State Density, Nss or Qss Threshold Voltge 650Å n+ poly gate left scale p+ poly gate right scale Nss= 0 Vbs = 0 implant dose = zero Nss is never zero, typically adds 0.5 volts that is shifts both scales up 0.5 volts Å 250Å 150Å 150Å 250Å Substrate doping Page 7
8 APPROXIMATE EQUATION FOR ID IN NON-SATUATION REGION p n S Q Vg L Vd I D n I D = µw Cox (Vg-Vt-V d /2)V d L Cox = Cox/Area = o r/xox and Area = WL and Xox is gate oxide thickness Estimate I D = charge in transit divided by the transit time charge in transit Q = (Q source end + Q drain end) ave Q = CV = [Cox(Vg-Vs-Vt)+Cox(Vg-Vd-Vt)]/2 Q = Cox(Vg-Vt-Vd/2) = Cox WL(Vg-Vt-Vd/2) Transit time = distance/velocity = L/v = L/µE = L/µ(Vd/L) = L 2 /µvd E is electric field mobility Page 8
9 NON SATURATION REGION CHARACTERISTICS + Vgs G - +Id S D Id Vto Vsub Vd = 0.1 Volt Vsub = volts +Vg Body Effect +Ids Non Saturation Region S n G Vsub +Vgs +Vds D nmosfet with Vt=1, since the Drain is at 0.1 volts and the source is at zero. Both drain and source will be on at gate voltages greater than 1.1 volt. the transistor will be in the non saturation region. n p Page 9
10 APPROXIMATE EQUATION FOR ID IN SATURATION REGION p n S Q Vg L Vd I D n I Dsat = µw Cox (Vg-Vt) 2 2L If Vd increases eventually Vg-Vd will be less than Vt and further increases in Vd will not cause increases in ID (because the additional voltage will be across the gap region at the drain end where it can not reduce the transit time) So substitute Vg-Vd = Vt or Vd = Vg-Vt into equation for non saturation region to get equation for saturation region. Page 10
11 SATURATION REGION CHARACTERISTICS +Id G S D Id Vto + Vgs=Vds - Vsub Vsub = volts +Vg NMOS Body Effect +Ids S n Saturation Region +5 G Vsub +4 +Vgs Vds nmosfet with Vt=1, Drain end is never on because Voltage Gate to Drain is Zero. Therefore this transistor is always in Saturation Region if the gate voltage is above the threshold voltage. D n p Page 11
12 Ids CALCULATOR FOR IDEAL I-V CHARACTERISTICS ROCHESTER INSTITUTE OF TECHNOLOGY mosfetiv.xls zip/excell/tools/ MICROELECTRONIC ENGINEERING 9/21/99 CALCULATION OF MOSFET I-V CHARACTERISTICS Dr. Lynn Fuller To use this spreadsheet change the values in the white boxes. The rest of the sheet is protected and should not be changed unless you are sure of the consequences. The calculated results are shown in the purple boxes. CONSTANTS VARIABLES CHOICES 1=yes, 0=No T= 300 K Na = 1.00E+16 cm-3 Aluminum gate 0 KT/q = volts Nd = 1.00E+15 cm-3 n+ Poly gate 1 Select one type of gate ni = 1.45E+10 cm-3 Nss = 3.00E+10 cm-2 p+ Poly gate 0 Eo = 8.85E-14 F/cm Xox = 1000 Ang N substrate 0 Select one type of substrate Er si = 11.7 P substrate 1 Er SiO2 = 3.9 E affinity = 4.15 volts Carrier Mobility, µ 250 cm2/v-s q = 1.60E-19 coul Eg = volts L (length) = 20 µm Gate W (width) = µm Source Vg CALCULATIONS: RESULTS Vs METAL WORK FUNCTION = volts SEMICONDUCTOR POTENTIAL = +/ volts OXIDE CAPACITANCE / CM2 = E-08 F/cm2 METAL SEMI WORK FUNCTION DIFF = volts FLAT BAND VOLTAGE = volts THRESHOLD VOLTAGE = volts L Ids = µ W Cox'/L (Vgs-Vt-Vd/2)Vd in Non Saturation Region Ids = µ W Cox' / 2L (Vgs - Vt)^2 in Saturation Region Drain Vd See: Vgs Idsat Vds Ids Ids Ids Ids Ids E E E E MOSFET I-V Characteristics 5.00E E E E E E E E E E E Vds Vgs = 5 Vgs = 7 Vgs = 9 Vgs = 11 Idsat Page 12
13 CHANNEL LENGTH MODULATION Channel length modulation is a description of the effective decrease of the channel length as the voltage on the drain increases causing an increase in the drain-tosubstrate junction reverse bias and an increase in the width of the drain-to-substrate junction space charge layer. This effect begins as soon as the voltage on the drain is greater than zero. As a result it effects both the non-saturation and the saturation region of operation. Resulting in an increase in current in both regions. Professor David Hodges suggested modeling this effect by adding current linearly with voltage drain-to-source using a channel length modulation parameter called lambda adding the term (1+l Vds) to the equations for Ids. NMOS +Ids Channel length modulation causes the current to be higher Vgs Vds Page 13
14 CHANNEL LENGTH MODULATION n Channel Length Modulation Parameter l l = Slope/ Idsat S Vg L - L L Vd2 Vd1 I Dsat = µw Cox (Vg-Vt) 2 (1+ lvds) 2L in saturation region Vd n p Slope +Ids Idsat Vd1 NMOS Saturation Region Vgs Vd2 +Vds NMOS Transistor in Saturation Region DC Model, l is the channel length modulation parameter and is different for each channel length, L. I D = µw Cox (Vg-Vt-V d /2)V d (1+ lvds) L in non-saturation region Page 14
15 MEASURED LONG CHANNEL n-mosfet ID-VDS 16/8 L=16µ W=8µ Page 15
16 MEASURED LONG n-channel MOSFET 16/8 L=16µ W=8µ Page 16
17 SUMMARY The ideal long channel MOSFET does not really exist. Most MOSFETs will exhibit some short channel behavior such as channel length modulation. However, the equations are easy to work with and to understand and are often used as a starting point for the study of MOSFETs. Similarly SPICE (Simulation Program for Integrated Circuit Engineering) modeling of MOSFETs originated using these long channel equations. The Level 1 model by Shichman and Hodges uses basic device physics equations for MOSFET threshold voltage and drain current in the saturation and non-saturation regions of operation. Mobility is assumed to be a function of total doping concentration only and a parameter called LAMBDA is used to model channel length modulation. Newer models (BSIM-3) do a better job including short channel effects. David A. Hodges hodges@eecs.berkeley.edu Page 17
18 EXAMPLE PROBLEM Design a transistor that can switch 24 volts in a 200 ohm resistor using a 0 5 Volt gate signal. V VIN R VOUT Page 18
19 EXAMPLE PROBLEM Lets first check the Drain and source p/n junctions: N+ with Nd = ~1E19 cm-3 Substrate Na =? Find Na and smallest transistor length L Electric Field Breakdown ~ 3E5 V/cm Find at Na = 1E16, Wsc = 1.9µm with Vr = 24 V So L min > 1.9µm µm, pick 5µm Page 19
20 EXAMPLE PROBLEM Lets next find the gate oxide thickness, Xox Use maximum electric field = 4M V/cm Efield = Vmax /Xox = 24 V / Xox = 4M V/cm Xox = 600 E -8 = 600 Å Then calculate the threshold voltage, Vt Vt = -.24 volts So need threshold adjust dose ~ 3.56E11 x 2 to get Vt = 1.0 volts Page 20
21 EXAMPLE PROBLEM Now lets find transistor width to give the desired current. I = V / R = 24 / 200 = 0.12 Amps use Vgs = 5, Vt=1, L = 5µm, mobility µ = 1250 But divide by 2 to account for surface scattering use µ = 625 I Dsat = µw Cox (Vg-Vt) 2 2L Cox = o r / Xox =4.6E-8 F/cm find: W = 1400µm Page 21
22 EXAMPLE PROBLEM Finally lets calculate the field threshold voltage. For 10,000Å oxide thickness find Vt= -0.2 volts but need > 24volts so need a channel stop implant to make substrate in field area heavier doped Page 22
23 FINAL TRANSISTORS Xox = 600 Å N+ Source Gate Drain Metal Xfield = 10,000 Å N+ N+ N+ P type Wafer Na=1E16 Channel Stop B11 2E12 Threshold Adjust B e11 Page 23
24 REFERENCES 1. Microelectronic Circuits, any Edition, Adel Sedra and Kenneth Smith, Oxford University Press, latest edition. 2. Device Electronics for Integrated Circuits, Richard S. Muller, Theodore I. Kamins, John Wiley & Sons., MOSFET Modeling with SPICE, Daniel Foty, 1997, Prentice Hall, ISBN The MOS Transistor, Yannis Tsividis, 2 nd Edition, McGraw Hill, 1999 Page 24
25 HOMEWORK INTRO TO MOSFET 1. Calculate the IDS -VDS characteristics for a PMOS transistor for 0<VDS <5 built with the following parameters: substrate doping ND = 1E15 cm-3, Xox = 500 Å, N+ poly gate, Nss = 3E11, W = 32 µm, L = 16 µm 2. Use SPICE to simulate the IDS-VDS characteristics for the PMOS transistor above. Compare SPICE versus hand calculated (Excel). Page 25
Advanced MOSFET Basics. Dr. Lynn Fuller
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Advanced MOSFET Basics Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035
More informationAdvanced MOSFET Basics. Dr. Lynn Fuller
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Advanced MOSFET Basics Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035
More informationMOS Inverters Dr. Lynn Fuller Webpage:
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING MOS Inverters Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Email: Lynn.Fuller@rit.edu
More informationElectronic CAD Practical work. Week 1: Introduction to transistor models. curve tracing of NMOS transfer characteristics
Electronic CAD Practical work Dr. Martin John Burbidge Lancashire UK Tel: +44 (0)1524 825064 Email: martin@mjb-rfelectronics-synthesis.com Martin Burbidge 2006 Week 1: Introduction to transistor models
More informationLECTURE 09 LARGE SIGNAL MOSFET MODEL
Lecture 9 Large Signal MOSFET Model (5/14/18) Page 9-1 LECTURE 9 LARGE SIGNAL MOSFET MODEL LECTURE ORGANIZATION Outline Introduction to modeling Operation of the MOS transistor Simple large signal model
More informationHigh Voltage and MEMS Process Integration
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING High Voltage and MEMS Process Integration Dr. Lynn Fuller and Dr. Ivan Puchades webpage: http://people.rit.edu/lffeee Electrical and Microelectronic
More informationLecture-45. MOS Field-Effect-Transistors Threshold voltage
Lecture-45 MOS Field-Effect-Transistors 7.4. Threshold voltage In this section we summarize the calculation of the threshold voltage and discuss the dependence of the threshold voltage on the bias applied
More informationUNIT-1 Bipolar Junction Transistors. Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press
UNIT-1 Bipolar Junction Transistors Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press Figure 6.1 A simplified structure of the npn transistor. Microelectronic Circuits, Sixth
More informationSolid State Device Fundamentals
Solid State Device Fundamentals 4.4. Field Effect Transistor (MOSFET) ENS 463 Lecture Course by Alexander M. Zaitsev alexander.zaitsev@csi.cuny.edu Tel: 718 982 2812 4N101b 1 Field-effect transistor (FET)
More informationECE520 VLSI Design. Lecture 2: Basic MOS Physics. Payman Zarkesh-Ha
ECE520 VLSI Design Lecture 2: Basic MOS Physics Payman Zarkesh-Ha Office: ECE Bldg. 230B Office hours: Wednesday 2:00-3:00PM or by appointment E-mail: pzarkesh@unm.edu Slide: 1 Review of Last Lecture Semiconductor
More informationBJT Characterization Laboratory Dr. Lynn Fuller
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING BJT Characterization Laboratory Dr. Lynn Fuller 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041 Email:
More informationSub-Threshold Region Behavior of Long Channel MOSFET
Sub-threshold Region - So far, we have discussed the MOSFET behavior in linear region and saturation region - Sub-threshold region is refer to region where Vt is less than Vt - Sub-threshold region reflects
More informationSession 10: Solid State Physics MOSFET
Session 10: Solid State Physics MOSFET 1 Outline A B C D E F G H I J 2 MOSCap MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor: Al (metal) SiO2 (oxide) High k ~0.1 ~5 A SiO2 A n+ n+ p-type Si (bulk)
More informationNMOS Inverter Lab ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING. NMOS Inverter Lab
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING NMOS Inverter Lab Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee/ 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035
More informationField-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism;
Chapter 3 Field-Effect Transistors (FETs) 3.1 Introduction Field-Effect Transistor (FET) is one of the two major transistors; FET derives its name from its working mechanism; The concept has been known
More informationDepartment of Electrical Engineering IIT Madras
Department of Electrical Engineering IIT Madras Sample Questions on Semiconductor Devices EE3 applicants who are interested to pursue their research in microelectronics devices area (fabrication and/or
More informationLecture 4. MOS transistor theory
Lecture 4 MOS transistor theory 1.7 Introduction: A MOS transistor is a majority-carrier device, in which the current in a conducting channel between the source and the drain is modulated by a voltage
More informationIntroduction to Electronic Devices
Introduction to Electronic Devices (Course Number 300331) Fall 2006 Dr. Dietmar Knipp Assistant Professor of Electrical Engineering Information: http://www.faculty.iubremen.de/dknipp/ Source: Apple Ref.:
More informationStudy of Differential Amplifier using CMOS
Study of Differential Amplifier using CMOS Mr. Bhushan Bangadkar PG Scholar Mr. Amit Lamba Assistant Professor Mr. Vipin Bhure Assistant Professor Electronics and Communication Electronics and Communication
More informationLecture 16: MOS Transistor models: Linear models, SPICE models. Context. In the last lecture, we discussed the MOS transistor, and
Lecture 16: MOS Transistor models: Linear models, SPICE models Context In the last lecture, we discussed the MOS transistor, and added a correction due to the changing depletion region, called the body
More informationNAME: Last First Signature
UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 130: IC Devices Spring 2003 FINAL EXAMINATION NAME: Last First Signature STUDENT
More informationExperiment 3. 3 MOSFET Drain Current Modeling. 3.1 Summary. 3.2 Theory. ELEC 3908 Experiment 3 Student#:
Experiment 3 3 MOSFET Drain Current Modeling 3.1 Summary In this experiment I D vs. V DS and I D vs. V GS characteristics are measured for a silicon MOSFET, and are used to determine the parameters necessary
More informationHW#3 Solution. Dr. Parker. Spring 2014
HW#3 olution r. Parker pring 2014 Assume for the problems below that V dd = 1.8 V, V tp0 is -.7 V. and V tn0 is.7 V. V tpbodyeffect is -.9 V. and V tnbodyeffect is.9 V. Assume ß n (k n )= 219.4 W/L µ A(microamps)/V
More information55:041 Electronic Circuits
55:041 Electronic Circuits Mosfet Review Sections of Chapter 3 &4 A. Kruger Mosfet Review, Page-1 Basic Structure of MOS Capacitor Sect. 3.1 Width 1 10-6 m or less Thickness 50 10-9 m or less ` MOS Metal-Oxide-Semiconductor
More informationECE 340 Lecture 40 : MOSFET I
ECE 340 Lecture 40 : MOSFET I Class Outline: MOS Capacitance-Voltage Analysis MOSFET - Output Characteristics MOSFET - Transfer Characteristics Things you should know when you leave Key Questions How do
More informationUNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences.
UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences Discussion #9 EE 05 Spring 2008 Prof. u MOSFETs The standard MOSFET structure is shown
More informationSemiconductor Physics and Devices
Metal-Semiconductor and Semiconductor Heterojunctions The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is one of two major types of transistors. The MOSFET is used in digital circuit, because
More informationUNIT 3: FIELD EFFECT TRANSISTORS
FIELD EFFECT TRANSISTOR: UNIT 3: FIELD EFFECT TRANSISTORS The field effect transistor is a semiconductor device, which depends for its operation on the control of current by an electric field. There are
More informationDiode Curve Tracer ROCHESTER INSTITUTE OF TECHNOLOGY ELECTRICAL & MICROELECTRONIC ENGINEERING
ROCHESTER INSTITUTE OF TECHNOLOGY ELECTRICAL & MICROELECTRONIC ENGINEERING Diode Curve Tracer Using Digilent Analog Discovery Module, Adam Wardas Webpage: http://people.rit.edu/lffeee Electrical and 82
More informationWeek 9a OUTLINE. MOSFET I D vs. V GS characteristic Circuit models for the MOSFET. Reading. resistive switch model small-signal model
Week 9a OUTLINE MOSFET I vs. V GS characteristic Circuit models for the MOSFET resistive switch model small-signal model Reading Rabaey et al.: Chapter 3.3.2 Hambley: Chapter 12 (through 12.5); Section
More informationIntroduction to Modeling MOSFETS in SPICE
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Introduction to Modeling MOSFETS in SPICE Dr. Lynn Fuller Electrical and 82 Lomb Memorial Drive Rochester, NY 14623-5604 Dr. Fuller s Webpage:
More informationMOSFET Terminals. The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals.
MOSFET Terminals The voltage applied to the GATE terminal determines whether current can flow between the SOURCE & DRAIN terminals. For an n-channel MOSFET, the SOURCE is biased at a lower potential (often
More informationproblem grade total
Fall 2005 6.012 Microelectronic Devices and Circuits Prof. J. A. del Alamo Name: Recitation: November 16, 2005 Quiz #2 problem grade 1 2 3 4 total General guidelines (please read carefully before starting):
More informationEE105 Fall 2015 Microelectronic Devices and Circuits: MOSFET Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)
EE105 Fall 2015 Microelectronic Devices and Circuits: MOSFET Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) 7-1 Simplest Model of MOSFET (from EE16B) 7-2 CMOS Inverter 7-3 CMOS NAND
More information4.1 Device Structure and Physical Operation
10/12/2004 4_1 Device Structure and Physical Operation blank.doc 1/2 4.1 Device Structure and Physical Operation Reading Assignment: pp. 235-248 Chapter 4 covers Field Effect Transistors ( ) Specifically,
More information8. Characteristics of Field Effect Transistor (MOSFET)
1 8. Characteristics of Field Effect Transistor (MOSFET) 8.1. Objectives The purpose of this experiment is to measure input and output characteristics of n-channel and p- channel field effect transistors
More informationEE70 - Intro. Electronics
EE70 - Intro. Electronics Course website: ~/classes/ee70/fall05 Today s class agenda (November 28, 2005) review Serial/parallel resonant circuits Diode Field Effect Transistor (FET) f 0 = Qs = Qs = 1 2π
More information55:041 Electronic Circuits
55:041 Electronic Circuits MOSFETs Sections of Chapter 3 &4 A. Kruger MOSFETs, Page-1 Basic Structure of MOS Capacitor Sect. 3.1 Width = 1 10-6 m or less Thickness = 50 10-9 m or less ` MOS Metal-Oxide-Semiconductor
More informationField Effect Transistors (FET s) University of Connecticut 136
Field Effect Transistors (FET s) University of Connecticut 136 Field Effect Transistors (FET s) FET s are classified three ways: by conduction type n-channel - conduction by electrons p-channel - conduction
More informationField Effect Transistors
Field Effect Transistors LECTURE NO. - 41 Field Effect Transistors www.mycsvtunotes.in JFET MOSFET CMOS Field Effect transistors - FETs First, why are we using still another transistor? BJTs had a small
More informationDevice Technologies. Yau - 1
Device Technologies Yau - 1 Objectives After studying the material in this chapter, you will be able to: 1. Identify differences between analog and digital devices and passive and active components. Explain
More informationLearning Outcomes. Spiral 2-6. Current, Voltage, & Resistors DIODES
26.1 26.2 Learning Outcomes Spiral 26 Semiconductor Material MOS Theory I underst why a diode conducts current under forward bias but does not under reverse bias I underst the three modes of operation
More informationSolid State Devices- Part- II. Module- IV
Solid State Devices- Part- II Module- IV MOS Capacitor Two terminal MOS device MOS = Metal- Oxide- Semiconductor MOS capacitor - the heart of the MOSFET The MOS capacitor is used to induce charge at the
More informationEEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters
EEC 118 Spring 2010 Lab #1: NMOS and PMOS Transistor Parameters Dept. of Electrical and Computer Engineering University of California, Davis March 18, 2010 Reading: Rabaey Chapter 3 [1]. Reference: Kang
More informationMicroelectronics Circuit Analysis and Design. MOS Capacitor Under Bias: Electric Field and Charge. Basic Structure of MOS Capacitor 9/25/2013
Microelectronics Circuit Analysis and Design Donald A. Neamen Chapter 3 The Field Effect Transistor In this chapter, we will: Study and understand the operation and characteristics of the various types
More informationThree Terminal Devices
Three Terminal Devices - field effect transistor (FET) - bipolar junction transistor (BJT) - foundation on which modern electronics is built - active devices - devices described completely by considering
More informationINTRODUCTION TO MOS TECHNOLOGY
INTRODUCTION TO MOS TECHNOLOGY 1. The MOS transistor The most basic element in the design of a large scale integrated circuit is the transistor. For the processes we will discuss, the type of transistor
More informationECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline:
ECE 340 Lecture 37 : Metal- Insulator-Semiconductor FET Class Outline: Metal-Semiconductor Junctions MOSFET Basic Operation MOS Capacitor Things you should know when you leave Key Questions What is the
More informationLECTURE 4 SPICE MODELING OF MOSFETS
LECTURE 4 SPICE MODELING OF MOSFETS Objectives for Lecture 4* Understanding the element description for MOSFETs Understand the meaning and significance of the various parameters in SPICE model levels 1
More informationMOS TRANSISTOR THEORY
MOS TRANSISTOR THEORY Introduction A MOS transistor is a majority-carrier device, in which the current in a conducting channel between the source and the drain is modulated by a voltage applied to the
More informationSPICE MODELING OF MOSFETS. Objectives for Lecture 4*
LECTURE 4 SPICE MODELING OF MOSFETS Objectives for Lecture 4* Understanding the element description for MOSFETs Understand the meaning and significance of the various parameters in SPICE model levels 1
More informationHW#3 Solution. Dr. Parker. Fall 2015
HW#3 Solution Dr. Parker Fall 2015 Assume for the problems below that V dd = 1.8 V, V tp0 is -.7 V. and V tn0 is.7 V. V tpbodyeffect is -.9 V. and V tnbodyeffect is.9 V. Assume ß n (k n )= 219.4 W/L µ
More informationSingle Supply Op Amp Circuits Dr. Lynn Fuller Webpage:
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Single Supply Op Amp Circuits Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 146235604 Tel (585)
More informationMEASUREMENT AND INSTRUMENTATION STUDY NOTES UNIT-I
MEASUREMENT AND INSTRUMENTATION STUDY NOTES The MOSFET The MOSFET Metal Oxide FET UNIT-I As well as the Junction Field Effect Transistor (JFET), there is another type of Field Effect Transistor available
More informationENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration)
Revised 2/16/2007 ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration) *NOTE: The text mentioned below refers to the Sedra/Smith, 5th edition.
More informationChannel Engineering for Submicron N-Channel MOSFET Based on TCAD Simulation
Australian Journal of Basic and Applied Sciences, 2(3): 406-411, 2008 ISSN 1991-8178 Channel Engineering for Submicron N-Channel MOSFET Based on TCAD Simulation 1 2 3 R. Muanghlua, N. Vittayakorn and A.
More informationElectrical Characterization of a Second-gate in a Silicon-on-Insulator Transistor
Electrical Characterization of a Second-gate in a Silicon-on-Insulator Transistor Antonio Oblea: McNair Scholar Dr. Stephen Parke: Faculty Mentor Electrical Engineering As an independent double-gate, silicon-on-insulator
More informationES 330 Electronics II Homework # 1 (Fall 2016 SOLUTIONS)
SOLUTIONS ES 330 Electronics II Homework # 1 (Fall 2016 SOLUTIONS) Problem 1 (20 points) We know that a pn junction diode has an exponential I-V behavior when forward biased. The diode equation relating
More informationCOLLECTOR DRAIN BASE GATE EMITTER. Applying a voltage to the Gate connection allows current to flow between the Drain and Source connections.
MOSFETS Although the base current in a transistor is usually small (< 0.1 ma), some input devices (e.g. a crystal microphone) may be limited in their output. In order to overcome this, a Field Effect Transistor
More informationMEMS Signal Conditioning Circuits Dr. Lynn Fuller Electrical and Microelectronic Engineering
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING MEMS Signal Conditioning Circuits Dr. Lynn Fuller Electrical and 82 Lomb Memorial Drive Rochester, NY 146235604 Email: Lynn.Fuller@rit.edu
More informationECSE-6300 IC Fabrication Laboratory Lecture 7 MOSFETs. Lecture Outline
ECSE-6300 IC Fabrication Laboratory Lecture 7 MOSFETs Prof. Rensselaer Polytechnic Institute Troy, NY 12180 Office: CII-6229 Tel.: (518) 276-2909 e-mails: luj@rpi.edu http://www.ecse.rpi.edu/courses/s16/ecse
More informationDesign Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness
MIT International Journal of Electronics and Communication Engineering, Vol. 4, No. 2, August 2014, pp. 81 85 81 Design Simulation and Analysis of NMOS Characteristics for Varying Oxide Thickness Alpana
More informationMetal Oxide Semiconductor Field-Effect Transistors (MOSFETs)
Metal Oxide Semiconductor Field-Effect Transistors (MOSFETs) Device Structure N-Channel MOSFET Providing electrons Pulling electrons (makes current flow) + + + Apply positive voltage to gate: Drives away
More informationStatic Random Access Memory - SRAM Dr. Lynn Fuller Webpage:
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Static Random Access Memory - SRAM Dr. Lynn Fuller Webpage: http://people.rit.edu/lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 Email:
More information6.012 Microelectronic Devices and Circuits
Page 1 of 13 YOUR NAME Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology 6.012 Microelectronic Devices and Circuits Final Eam Closed Book: Formula sheet provided;
More informationDIGITAL VLSI LAB ASSIGNMENT 1
DIGITAL VLSI LAB ASSIGNMENT 1 Problem 1: NMOS and PMOS plots using Cadence. In this exercise, you are required to generate both NMOS and PMOS I-V device characteristics (I/P and O/P) using Cadence (Use
More informationVLSI Design I. The MOSFET model Wow!
VLSI Design I The MOSFET model Wow! Are device models as nice as Cindy? Overview The large signal MOSFET model and second order effects. MOSFET capacitances. Introduction in fet process technology Goal:
More informationConduction Characteristics of MOS Transistors (for fixed Vds)! Topic 2. Basic MOS theory & SPICE simulation. MOS Transistor
Conduction Characteristics of MOS Transistors (for fixed Vds)! Topic 2 Basic MOS theory & SPICE simulation Peter Cheung Department of Electrical & Electronic Engineering Imperial College London (Weste&Harris,
More informationTopic 2. Basic MOS theory & SPICE simulation
Topic 2 Basic MOS theory & SPICE simulation Peter Cheung Department of Electrical & Electronic Engineering Imperial College London (Weste&Harris, Ch 2 & 5.1-5.3 Rabaey, Ch 3) URL: www.ee.ic.ac.uk/pcheung/
More informationConduction Characteristics of MOS Transistors (for fixed Vds) Topic 2. Basic MOS theory & SPICE simulation. MOS Transistor
Conduction Characteristics of MOS Transistors (for fixed Vds) Topic 2 Basic MOS theory & SPICE simulation Peter Cheung Department of Electrical & Electronic Engineering Imperial College London (Weste&Harris,
More informationBJT Amplifier. Superposition principle (linear amplifier)
BJT Amplifier Two types analysis DC analysis Applied DC voltage source AC analysis Time varying signal source Superposition principle (linear amplifier) The response of a linear amplifier circuit excited
More informationMOSFET & IC Basics - GATE Problems (Part - I)
MOSFET & IC Basics - GATE Problems (Part - I) 1. Channel current is reduced on application of a more positive voltage to the GATE of the depletion mode n channel MOSFET. (True/False) [GATE 1994: 1 Mark]
More informationTwo Dimensional Analytical Threshold Voltages Modeling for Short-Channel MOSFET
Two Dimensional Analytical Threshold Voltages Modeling for Short-Channel MOSFET Sanjeev kumar Singh, Vishal Moyal Electronics & Telecommunication, SSTC-SSGI, Bhilai, Chhatisgarh, India Abstract- The aim
More informationOrganic Electronics. Information: Information: 0331a/ 0442/
Organic Electronics (Course Number 300442 ) Spring 2006 Organic Field Effect Transistors Instructor: Dr. Dietmar Knipp Information: Information: http://www.faculty.iubremen.de/course/c30 http://www.faculty.iubremen.de/course/c30
More informationDifferential Amplifier with Current Source Bias and Active Load
Technical Memo: Differential Amplifier with Current Source Bias and Active Load Introduction: From: Dr. Lynn Fuller, Professor, Electrical and Microelectronic Engineering, Rochester Institute of Technology
More informationMicroelectronic Circuits, Kyung Hee Univ. Spring, Chapter 3. Diodes
Chapter 3. Diodes 1 Introduction IN THIS CHAPTER WE WILL LEARN the characteristics of the ideal diode and how to analyze and design circuits containing multiple ideal diodes together with resistors and
More information! PN Junction. ! MOS Transistor Topology. ! Threshold. ! Operating Regions. " Resistive. " Saturation. " Subthreshold (next class)
ESE370: ircuit-level Modeling, Design, and Optimization for Digital Systems Today! PN Junction! MOS Transistor Topology! Threshold Lec 7: September 16, 2015 MOS Transistor Operating Regions Part 1! Operating
More informationChapter 6: Field-Effect Transistors
Chapter 6: Field-Effect Transistors Islamic University of Gaza Dr. Talal Skaik MOSFETs MOSFETs have characteristics similar to JFETs and additional characteristics that make then very useful. There are
More informationWhy Scaling? CPU speed Chip size R, C CPU can increase speed by reducing occupying area.
Why Scaling? Higher density : Integration of more transistors onto a smaller chip : reducing the occupying area and production cost Higher Performance : Higher current drive : smaller metal to metal capacitance
More informationMOS Field Effect Transistors
MOS Field Effect Transistors A gate contact gate interconnect n polysilicon gate source contacts W active area (thin oxide area) polysilicon gate contact metal interconnect drain contacts A bulk contact
More informationFIELD EFFECT TRANSISTOR (FET) 1. JUNCTION FIELD EFFECT TRANSISTOR (JFET)
FIELD EFFECT TRANSISTOR (FET) The field-effect transistor (FET) is a three-terminal device used for a variety of applications that match, to a large extent, those of the BJT transistor. Although there
More informationChapter 2 : Semiconductor Materials & Devices (II) Feb
Chapter 2 : Semiconductor Materials & Devices (II) 1 Reference 1. SemiconductorManufacturing Technology: Michael Quirk and Julian Serda (2001) 3. Microelectronic Circuits (5/e): Sedra & Smith (2004) 4.
More informationMOSFET short channel effects
MOSFET short channel effects overview Five different short channel effects can be distinguished: velocity saturation drain induced barrier lowering (DIBL) impact ionization surface scattering hot electrons
More informationChapter 5: Field Effect Transistors
Chapter 5: Field Effect Transistors Slide 1 FET FET s (Field Effect Transistors) are much like BJT s (Bipolar Junction Transistors). Similarities: Amplifiers Switching devices Impedance matching circuits
More informationEFM Ec. a) Sketch the electrostatic potential inside the semiconductor as a function of position.
1.The energy band diagram for an ideal x o =.2um MOS-C operated at T=300K is shown below. Note that the applied gate voltage causes band bending in the semiconductor such that E F =E i at the Si-SiO2 interface.
More informationPMOS Testing at. Rochester Institute of Technology. Dr. Lynn Fuller
ROCHESER INSIUE OF ECHNOLOGY MICROELECRONIC ENGINEERING PMOS esting at Dr. Lynn Fuller webpage: http://www.rit.edu/~lffeee 82 Lomb Memorial Drive Rochester, NY 14623-5604 el (585) 475-2035 Fax (585) 475-5041
More informationPart II: The MOS Transistor Technology. J. SÉE 2004/2005
Part II: The MOS Transistor Technology J. SÉE johann.see@ief.u-psud.fr 2004/2005 Lecture plan Towards the nanotechnologies... data storage The data processing through the ages MOS transistor in logic-gates
More informationINTRODUCTION: Basic operating principle of a MOSFET:
INTRODUCTION: Along with the Junction Field Effect Transistor (JFET), there is another type of Field Effect Transistor available whose Gate input is electrically insulated from the main current carrying
More informationV A ( ) 2 = A. For Vbe = 0.4V: Ic = 7.34 * 10-8 A. For Vbe = 0.5V: Ic = 3.49 * 10-6 A. For Vbe = 0.6V: Ic = 1.
1. A BJT has the structure and parameters below. a. Base Width = 0.5mu b. Electron lifetime in base is 1x10-7 sec c. Base doping is NA=10 17 /cm 3 d. Emitter Doping is ND=2 x10 19 /cm 3. Collector Doping
More informationElectronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor
Electronic Circuits for Mechatronics ELCT 609 Lecture 6: MOS-FET Transistor Assistant Professor Office: C3.315 E-mail: eman.azab@guc.edu.eg 1 Introduction Why we call it Transistor? The name came as an
More informationECSE-6300 IC Fabrication Laboratory Lecture 9 MOSFETs. Lecture Outline
ECSE-6300 IC Fabrication Laboratory Lecture 9 MOSFETs Prof. Rensselaer Polytechnic Institute Troy, NY 12180 Office: CII-6229 Tel.: (518) 276-2909 e-mails: luj@rpi.edu http://www.ecse.rpi.edu/courses/s18/ecse
More informationThe Design and Realization of Basic nmos Digital Devices
Proceedings of The National Conference On Undergraduate Research (NCUR) 2004 Indiana University Purdue University Indianapolis, Indiana April 15-17, 2004 The Design and Realization of Basic nmos Digital
More informationLecture 24 - The Si surface and the Metal-Oxide-Semiconductor Structure (cont.) The Long Metal-Oxide-Semiconductor Field-Effect Transistor
6.720J/3.43J - Integrated Microelectronic Devices - Spring 2007 Lecture 24-1 Lecture 24 - The Si surface and the Metal-Oxide-Semiconductor Structure (cont.) The Long Metal-Oxide-Semiconductor Field-Effect
More informationField Effect Transistors
Chapter 5: Field Effect Transistors Slide 1 FET FET s (Field Effect Transistors) are much like BJT s (Bipolar Junction Transistors). Similarities: Amplifiers Switching devices Impedance matching circuits
More informationEC0306 INTRODUCTION TO VLSI DESIGN
EC0306 INTRODUCTION TO VLSI DESIGN UNIT I INTRODUCTION TO MOS CIRCUITS Why VLSI? Integration improves the design: o lower parasitics = higher speed; o lower power; o physically smaller. Integration reduces
More informationStudent Lecture by: Giangiacomo Groppi Joel Cassell Pierre Berthelot September 28 th 2004
Student Lecture by: Giangiacomo Groppi Joel Cassell Pierre Berthelot September 28 th 2004 Lecture outline Historical introduction Semiconductor devices overview Bipolar Junction Transistor (BJT) Field
More informationAn Analytical model of the Bulk-DTMOS transistor
Journal of Electron Devices, Vol. 8, 2010, pp. 329-338 JED [ISSN: 1682-3427 ] Journal of Electron Devices www.jeldev.org An Analytical model of the Bulk-DTMOS transistor Vandana Niranjan Indira Gandhi
More informationINTERNATIONAL JOURNAL OF APPLIED ENGINEERING RESEARCH, DINDIGUL Volume 1, No 3, 2010
Low Power CMOS Inverter design at different Technologies Vijay Kumar Sharma 1, Surender Soni 2 1 Department of Electronics & Communication, College of Engineering, Teerthanker Mahaveer University, Moradabad
More informationEE301 Electronics I , Fall
EE301 Electronics I 2018-2019, Fall 1. Introduction to Microelectronics (1 Week/3 Hrs.) Introduction, Historical Background, Basic Consepts 2. Rewiev of Semiconductors (1 Week/3 Hrs.) Semiconductor materials
More informationSemiconductor TCAD Tools
Device Design Consideration for Nanoscale MOSFET Using Semiconductor TCAD Tools Teoh Chin Hong and Razali Ismail Department of Microelectronics and Computer Engineering, Universiti Teknologi Malaysia,
More information