LOW-VOLTAGE 16-BIT BUS SWITCH
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1 LOW-VOLTAGE 16-BIT BUS ITCH IDT74CBTLV1645 FEATURES: 5Ω A/B bi-directional switch Isolation Under Power-Off Conditions Over-voltage tolerant Latch-up performance exceeds 100mA =.3V - 3.6V, normal range ESD >00 per MIL-STD-883, Method 3015; >0 using machine model (C = 00pF, R = 0) Available in TSSOP package DESCRIPTION: The CBTLV1645 is a set of 16-bit bus switches. It has standard 1645 pinouts. The device is organized as dual 8-bit low resistance switches with independent Output Enable (xoe) control inputs. The switches can be turned on under the control of the LTL-compatible Output Enable signals (xoe) for bidirectional data flow between port A and port B. When xoe is high, the switch is off and a high impedance exists between Port A and Port B. To ensure the high-impedance state during power up or power down, OE should be tied to through a pullup resistor. APPLICATIONS: 3.3V High Speed Bus Switching and Bus Isolation FUTIONAL BLOCK DIAGRAM SIMPLIFIED SCHEMATIC, EACH ITCH 1A1 47 1B1 1A B8 A B 1OE 48 OE A B1 A8 6 3 B8 OE 5 The IDT logo is a registered trademark of Integrated Device Technology, Inc. DECEMBER c 014 Integrated Device Technology, Inc. DSC-5885/10
2 PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS (1) Symbol Description Max. Unit 1B1 1B 1B3 1B4 1B5 1B6 1B7 1B8 B1 B B3 B4 B5 B6 B7 B OE 1A1 1A 1A3 1A4 1A5 1A6 1A7 1A8 A1 A A3 A4 A5 A6 A7 A8 OE Supply Voltage Range 0.5 to 4.6 V VI Input Voltage Range 0.5 to 4.6 V Continuous Channel Current 18 ma IIK Input Clamp Current, VI/O < 0 50 ma TSTG Storage Temperature Range 65 to +150 C 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. PIN DESCRIPTION Pin Names xoe xax xbx Input OE L Description Output Enable (Active LOW) Port A Inputs or Outputs Port B Inputs or Outputs FUTION TABLE (EACH 8-BIT BUS ITCH) (1) Operation A-Port = B-Port TSSOP TOP VIEW H 1. H = HIGH Voltage Level L = LOW Voltage Level Disconnect OPERATING CHARACTERISTICS (1) Symbol Parameter Test Conditions Min. Max. Unit Supply Voltage V High-Level Control Input Voltage =.3V to.7v 1.7 V =.7V to 3.6V VIL Low-Level Control Input Voltage =.3V to.7v 0.7 V =.7V to 3.6V 0.8 TA Operating Free-Air Temperature C 1. All unused control inputs of the device must be held at or to ensure proper device operation.
3 DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = 40 C to +85 C Symbol Parameter Test Conditions Min. Typ. (1) Max. Unit VIK Control Inputs, Data I/O = 3V, II = 18mA 1. V II Control Inputs = 3.6V, VI = or ±1 μa IOZ Data I/O = 3.6V, VO = or 3.6V switch disabled 5 μa IOFF =, VI or VO = or 3.6V 10 μa ICC = 3.6V, IO = 0, VI = or 10 μa ΔICC () Control Inputs = 3.6V, one input at 3V, other inputs at or 300 μa CI Control Inputs VI = 3V or 0 4 pf CIO(OFF) VO = 3V or 0, OE = 9 pf Max. at =.3V VI = 0 IO = 64mA 5 8 Typ. at =.5V IO = 4mA 5 8 RON (3) VI = 1.7V IO = 15mA 7 40 Ω VI = 0 IO = 64mA 5 7 = 3V IO = 4mA 5 7 VI =.4V IO = 15mA NOTES: 1. Typical values are at 3.3V, +5 C ambient.. The increase in supply current is attributable to each input that is at the specified voltage level rather than or. 3. This is measured by the voltage drop between the A and B terminals at the indicated current through the switch. ITCHING CHARACTERISTICS =.5V ± 0.V = 3.3V ± 0.3V Symbol Parameter Min. Max. Min. Max. Unit tpd (1) Propagation Delay ns A to B or B to A ten Output Enable Time ns OE to A or B tdis Output Disable time ns OE to A or B 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impededance). 3
4 TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS Symbol (1) = 3.3V±0.3V () =.5V±0.V Unit VLOAD 6 x Vcc V 3 Vcc V 1.5 Vcc / V VLZ mv VHZ mv CL pf SAME PHASE INPUT TRANSITION OPPOSITE PHASE INPUT TRANSITION tplh tplh tphl tphl VOH VOL Propagation Delay (1, ) Pulse Generator VIN RT D.U.T. VOUT CL Test Circuits for All Outputs DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. VLOAD Open CONTROL INPUT ITCH NORMALLY CLOSED LOW tpzh NORMALLY HIGH ENABLE tpzl ITCH OPEN VLOAD/ DISABLE tphz Enable and Disable Times tplz VLOAD/ VOL + VLZ VOL VOH VOH -VHZ 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. NOTES: 1. Pulse Generator for All Pulses: Rate 10MHz; tf.5ns; tr.5ns.. Pulse Generator for All Pulses: Rate 10MHz; tf ns; tr ns. ITCH POSITION Test tplz/tpzl tphz/tpzh tpd Switch VLOAD Open 4
5 ORDERING INFORMATION XX CBTLV XXX XX Temp. Range Device Type Package X Blank 8 Tube or Tray Tape and Reel PAG Thin Shrink Small Outline Package - Green 1645 Low-Voltage 16-Bit Bus Switch C to +85 C Datasheet Document History 1/04/014 Pg. 1,,5 Updated the ordering information by removing the "IDT" notation, obsolete package "TVSOP" and non RoHS part and by adding Tape and Reel information. CORPORATE HEADQUARTERS for SALES: for Tech Support: 604 Silver Creek Valley Road or logichelp@idt.com San Jose, CA fax:
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