A 3.3 kw Onboard Battery Charger for PHEVs

Transcription

1 A 3.3 kw Onboard Battery Charger for PHEVs Saeid Haghbin and Torbjörn Thiringer Technical Report 2015:1 Department of Energy and Environment Division of Electric Power Engineering CHALMERS UNIVERSITY OF TECHNOLOGY Göteborg, Sweden 2015

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3 A 3.3 kw Onboard Battery Charger for PHEVs Saeid Haghbin and Torbjörn Thiringer Technical Report 2015:1 Department of Energy and Environment Division of Electric Power Engineering CHALMERS UNIVERSITY OF TECHNOLOGY Göteborg, Sweden 2015

4 A 3.3 kw Onboard Battery Charger for PHEVs Saeid Haghbin and Torbjörn Thiringer Technical Report 2015:1 Department of Energy and Environment Division of Electric Power Engineering CHALMERS UNIVERSITY OF TECHNOLOGY SE Göteborg Sweden Telephone + 46 (0)

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6 Abstract Onboard battery chargers are the favourable option by automotive industry because of ease of usage and security of supply by drivers. It is desirable to have a charger powerful enough to fill the battery in few minutes, but available technology is not mature enough to support this requirement in terms of power density and price. The chargers with an input voltage level of230v ac andaninputcurrent of16acanprovideslightlymorethan3.3kw charging power. These devices are one of the widely used chargers for plug-in vehicles because of the availability of the power source. The aim of this report is to explain and demonstrate the specifications, the design methodology and the performance analysis of a typical 3.3 kw battery charger. The main specifications of a 3.3 kw battery charger is presented and explained including the target efficiency level and power density. Usually there are two power conversion stages in an onboard charger: an AC/DC converter with unity power factor and an isolated DC/DC converter. One of the most popular topologies for each converter is selected and explained in detail including design examples. The interleaved Boost AC/DC rectifier is one of the high efficiency and compact topologies utilized for AC/DC conversion with unity power factor iii

7 operation. However, there is a need for a line filter to meet the standard requirements. The topology is presented and the main design steps are described. The efficiency analysis of the converter shows that an efficiency level of 98% is achievable. Standard regulations and filtering guidelines are provided. For the second stage, a transformer isolated full-bridge converter with the phase-shifted control and zero voltage switching (ZVS) is described. The theory of operation, the design equations, the components selection, the loss analysis in context of a practical example are discussed and presented. The proper ZVS operation needs an accurate design of the resonant tank that adds extra complexity to the converter design. This part is explained in detail including the main equations. As the second example, the design and loss analysis of a 3.3 kw battery charger is provided with an output voltage of 110 Vdc. The aim of this part is to provide design materials for implementation of a practical system as future work. iv

8 Contents Abstract iii 1 Introduction kw Onboard Chargers: Main Specifications Practical example of the onboard battery charger used in Volvo Car V60 PHEV Interleaved Boost AC/DC Converter Basic Boost converter Interleaved Boost converter Design of an interleaved Boost rectifier with an input current of 16 A and a dc output of 450 V Boost inductor selection Output capacitor selection Semiconductor losses of interleaved Boost converter at 230V/16A input supply condition Conduction losses in input bridge rectifier Conduction losses in Mosfet switches v

9 3.4.3 Output diodes conduction losses Total semiconductor losses of the interleaved Boost rectifier with 230V/16A input Regulatory standards and line filters Transformer Isolated Phase-shifted Full-bridge Converter with Zero Voltage Switching Operation Initial condition t < t Start of the right transition t 0 < t < t Completion of the right leg transition t 1 < t < t The left leg transition t 2 < t < t The power transfer interval t 3 < t < t Design of the resonant tank Design and Analysis of a 3.3 kw DC/DC Converter with a dc Output Voltage of 600 V Inductor current Transformer calculations Output diodes calculations Bridge Mosfet switches calculations Total loss calculations Minimum primary current for a proper ZVS operation Design and Analysis of an Air-Cooled 3.3 kw Battery Charger with an Input of 230 V/16 A and a dc Output Voltage of 110 V 47 vi

10 6.1 InterleavedBoostAC/DCrectifierwithaninputof230V/16A and a dc output voltage of 400 V Phase-shifted full-bridge DC/DC converter with ZVS with a dc Output voltage of 110 V Transformer turns ratio selection Output filter design Transformer current calculations Resonance and ZVS operation Output diodes and bridge Mosfet switches calculations 52 7 Conclusions and Some Future Work Suggestions 55 References 59 vii

11 Chapter 1 Introduction Battery chargers have an important impact on the development of plug-in vehicles. The charger is a bridge between the grid and the vehicle; this tie imposes some requirements on the charger specifications towards the utility grid and vehicle. It is expected to have the near unity power factor operation and stay under certain level of harmonics during charge operation. Moreover, the charger should withstand the transients and under or over voltage operation. The auto industry requires a high power density and efficient charger that could tolerate extreme temperatures or vibrating environment and at the same time a low price. Despite the fact that the electrical isolation is not required by related standards, for safety reasons it is strongly recommended or required for a charger with a power level of 3.3 kw that are widely used in vehicle applications [1 3]. Usually there are two converter stages in the charger circuit: a frontend AC/CD converter as the power factor corrector (PFC) and an isolated DC/DC stage. There are different topologies and variations for each stage 1

12 that one can refer to [4] for a full review and comparison. For the first stage, an interleaved Boost AC/DC converter is selected and discussed here. For the second stage, a transformer isolated full-bridge converter with a phaseshifted control and zero voltage switching is described in the sequel. The following headings are explained at the following sections for the interleaved Boost Rectifier and phase-shifted full-bridge converter with ZVS operation as the main power conversion stages of a 3.3 kw onboard charger: Providing a comprehensive list of technical publications and standards as reference materials Short description of the converters basic operation Providing a design summary with practical examples Converters performance analysis in terms of components and losses After this introduction, the main specifications of a 3.3 kw onboard charger is explained in Section II. One example of an available charger is presented to provide a realistic example. Section III is dedicated to the interleaved Boost rectifier. Theory of operation, basic design equations, a practical example and some simulation results are presented in this section. The next section is devoted to the full-bridge DC/DC converter with a phaseshifted control and ZVS operation. As the first practical example, the design and analysis of a phase-shifted full-bridge DC/DC converter with an output voltage of 600 V is described in Section V. The next example is a 3.3 kw battery charger with 230 V/16 A input and 110 Vdc output. The design of 2

13 the both interleaved Boost rectifier and phase-shifted full-bridge converter are explained. The components selection and loss analysis are also provided. 3

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15 Chapter kw Onboard Chargers: Main Specifications The vehicle traction system is energized by a battery that can have a voltage level of V. For passenger cars a voltage level of 300 V is common while for bus and truck applications the higher voltage levels like 700 V can be utilized. For instance, the main specifications of a 3.3 kw charger with a nominal battery voltage of 300 V is presented in Table 2.1. Usually the power level is limited by the available power from the utility grid. For instance the maximum available power from a 230 V/16 A is 3520 W. For a charger with an efficiency level of 94% the output power is 3.3 kw. From the design perspective the input voltage may have a wide range, as is indicated in Table 2.1 for example, but the maximum line current is 16 A. So the charger loads the grid with 16 A implying a variable power for different line voltages. The near unity power factor operation and a low value of total harmonic 5

16 Table 2.1: The main specifications of a 3.3 kw charger for a 300 V battery. Input voltage from the utility grid (single-phase) V Maximum value of the input current from the grid 16 A Ac line frequency range Hz Power factor More than 99% Total harmonics distortion (THD) Less than 5% Output dc voltage V Output dc voltage ripple (peak to peak) Less than 2 V Maximum output dc current 11 A Maximum output power 3.3 kw Charger efficiency Around 94% Cooling Liquid Coolant temperature 40 to +70 C Ambient temperature 40 to +105 C Weight/Volume Around 6kg/5L distortion (THD) is easily achieved by using an active pre-regulator stage including some line filters. The electro magnetic compatibility (EMC) issue is another concern regarding the grid-connected chargers. There are plenty of standards covering EMC and other similar topics like surge transients. For instance one can refer to the IEC series that includes these requirements. However, using a line filter to reduce EMC and transients is the main solution to fulfill these requirements [5 7]. The filter design and its optimality will be shortly discussed in the next section. The nominal battery voltage in a passenger car can be around 300 V or 700 V. The tendency is towards higher values because of a lower current in conductors. However, insulation in devices and equipments makes it difficult to have higher values. For a battery pack with a nominal voltage of 300 V the battery voltage variations are wide. For example for a battery pack with a nominal value of 300 V, the battery voltage can vary between V depending on the 6

17 state of charge (SOC). The charging profile of a battery has three stages. The first stage is the bulk charge that a constant high current is injected to the battery. In this stage the battery will be powered up to approximately 80% of its capacity. The next stage is called absorption stage in which an absorption voltage is applied to the battery to fill the rest of 20%. The current level is usually low in this stage; and finally the float stage that the battery is kept charged by applying a lower voltage and current compared to the absorption stage. The impact of the charging profile on the charger is that the designer shall size the conductors for high current charging (bulk) and adjust the transformer turns ratio in the DC/DC converter to be able to reach the desired output voltage for the absorption stage. Consequently, the maximum current of the charger is not occurring simultaneously with highest output voltage. For instance according to Table I, the charger maximum power can be 11 A 470 V = 5170 W; instead the maximum power is 11 A 300 V = 3300 W. The charger efficiency is an important requirement especially when it directly deals with the customer. The state of art of the available technology for power electronic devices enables an efficiency level of around 94%. The efficiency of the pre-regulator stage, PFC satge, is around 98% and for the isolated DC/DC converter it can be around 96%. However, this performance level is reported around nominal power with the input voltage around 230 V. Deviations from this input voltage level or charging level reduces the charger efficiency. This issue will be discussed further in the sequel. The power density is another requirement that is equivalent to the weight 7

18 and volume. This requirement is extremely important for auto makers because of lack of space in the vehicle. To achieve a higher power density, the current trend is to use liquid cooling, for instance water with glycol, to have a compact package. The power electronics cooling system is usually independent of the vehicle cooling system and it is the subject of research to unite vehicle and power electronics cooling. Table 2.2: Specifications of the 3 kw charger from Eltek utilized in V60 PHEV. Input voltage from the utility grid (single-phase) V Maximum value of input current from the grid 14 A Ac line frequency range Hz Power factor More than 99% Total harmonics distortion (THD) Less than 5% Output dc voltage V Output dc voltage ripple (peak to peak) Less than 2 V Maximum output dc current 10 A Maximum output power 3 kw Charger efficiency 96% at 50% load 95% at 100% load Applicable standards IEC EN EN EN EN EN Cooling Liquid Operating temperature 40 to +60 C Dimensions mm (IP20) mm (IP67) Weight 2.8 kg (IP20) and 4.3 kg (IP67) The vehicle environment is harsh in terms of temperature variations and vibrations. As is indicated in Table 2.1, the ambient temperature can be somewhere between 40 to 105 C. It is desirable to have a vehicle to be able to operate in different climate conditions from north of Sweden to desert 8

19 areas in the middle of Iran, for example. The highly vibrating environment of a vehicle requires special consideration in packaging and installation of the battery charger. For instance, there is a risk of component disconnection or loose connections over time. This affects the device reliability and probability of failure. Usually the charger is enclosed inside a metallic closure and there are some bumpers to reduce the impact of vibration. In addition, the mechanical installation of the components is designed to withstand relative requirements and standards. 2.1 Practical example of the onboard battery charger used in Volvo Car V60 PHEV The Norway-based Eltek Company supplies onboard battery chargers to Volvo Car Corporation used in the V60 PHEV. The charger is a water cooled device installed in an aluminum enclosure. The CAN controller in the charger unit provides the communication protocol. The charger is installed in two different mechanical enclosures: one with ingress protection (IP) 20 and another one with IP 67. The device with IP 20 weights 2.8 kg and the one with IP 67 weights 4.3 kg. The power density inthefirstcaseis1.8kw/liter, whichisvery high. Table2.2provides a summary of the charger specification [8]. 9

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21 Chapter 3 Interleaved Boost AC/DC Converter The ideal PFC pre-regulator emulates the converter as a resistor towards the utility grid and transforms ac power to the charger acting as a resistor [9]. It is more convenient to approach the power balance for the modeling and control of the converter. Fig. 3.1 shows the power in different parts of the system. The parameters P s (t), P c (t) and P L (t) are instantaneous power of the source, converter and load, subsequently. As is shown in this figure, the converter should be able to store/supply a minimum level of power that is the difference between the constant load power and instantaneous input power. Consequently, this puts a limit on the minimum energy storage of the converter that is the dc bus capacitor in this case. The dc bus capacitor has a considerable impact on the converter power density; dc bus capacitor reduction is still a subject of research to improve the converter power density. For instance by increasing the switching frequency or using interleaved 11

22 2P/V gsinωt I dc=p/v dc V gsinωt Power Converter AC/DC with PFC including Line Filter V dc + - L O A D Source Converter Load 2 P S ( t) = 2Psin wt = P C ( t) = -Pcos2wt P L ( t) = P P-Pcos2wt P S(t) P C(t) P L(t) t t t Figure 3.1: The main diagram of the Boost AC/DC converter in PFC applications. L Line Filter + V in - Q C + V o - L O A D Single-Phase AC Source i L Power Process and Current Control Gate Signal Voltage controller - + V ref Figure 3.2: Power rectification with PFC based on Boost topology. schemes one can reduce the capacitor size. 3.1 Basic Boost converter The basic schematic diagram of a Boost converter in a PFC application is shown in Fig The ac line voltage is rectified by a bridge rectifier. Switch Qthat canbeamosfet forinstance, charges the inductor andtransfers power to the output capacitor by using a proper switching operation. The inductor is in series with the line impedance reducing the switching harmonics. 12

23 There are two control loops [10 18]: an output voltage controller and an inner current controller. The voltage loop is slower than the inner current controller. The bandwidth of the voltage control loop is around 2 20 Hz andthebandwidth ofthecurrent controller ismuch faster, canbearound1/6 switching frequency [18]. It is intended to have a constant output voltage, but there is a voltage ripple determined by the switching frequency and components values. The task of the voltage control loop is to program the input current to have a constant power with unity power factor from the ac source. The deviation from reference output voltage indicates extra energy or an energy deficit in the system in which the current level is adjusted by the controller. Different control strategies have been proposed for the Boost converter in PFC application [18]. The voltage loop is usually a PI controller or type II controller [10, 18]. A type II compensator has two poles (one at the origin) andonezero, andthezeroisplacedsomewhere between thepoles. Thetransfer function of this controller can be written as G C (s) = k (s/ωz+1) s(s/ω p+1) where k is a constant, ω z is the angular frequency of zero and ω p is teh angular frequency of pole. The output of the voltage controller is the reference value for the current controller. However, there are some enhancements like feedforwad terms to improve the load and line dynamics. The Boost converter can operate on three modes depending on the inductor current: continuous conduction mode (CCM), discontinuous conduction mode (DCM) and boundary conduction mode (BCM) [19 21]. In CCM the inductor current will not reach to zero when the current is at its peak value, but in discontinuous conduction mode the inductor current is zero for a while during each 13

24 switching period. The BCM is the critical point which CCM turns into to DCM. The design rule for inductor value is different for CCM and DCM. The inductor value for CCM can be determined as [20] L CCM = V o 4f s I (3.1) where V o, f s and I are output voltage, switching frequency and designed current ripple (peak to peak) in the inductor consequently. The inductance value for DCM can be determined as [20] L DCM = V g (1 Vg V o ) f s I P (3.2) where V g is the maximum line voltage and I P is the current ripple when the line current is at its maximum value. The output voltage ripple is V o = P o 2ωC o (3.3) whereω,c o andp o arethelineangularfrequency, theoutputdcbuscapacitor and the output power respectively. Despite the converter operation mode, there are different ways for the current control inside the fast inner loop. The average current mode control, peak current mode control and boundary current mode control are the main current mode control schemes. All of these three schemes are used for different applications and there are commercially available controllers. The average current mode control (ACMC) [18] is the dominant method for high 14

25 power applications because of its robustness to noise and its stable operation; there is no problem with instability for duty cycles higher than 0.5 as is the case for the peak current mode control. 3.2 Interleaved Boost converter There are different circuit topologies that can be utilized as the PFC preregulator. However, the Boost converter is one the most used options for this application. There are different varieties and improvements to the basic Boost converter to achieve a performance closer to the ideal AC/DC converter. The interleaved Boost rectifier is an interesting configuration from the Boost converter family providing some advantages over the basic topology [20 25]. There are two energy storage inductors with two independent switches and diodes that share the same bridge rectifier at the input side andthe same dc bus capacitor, as is shown in Fig The switching functions are interleaved which significantly reduces the input line and output ripples. It simply can reduce the ripple to half when the duty cycle is half. In addition, interleaving provides the benefits for parallel converter operation for higher power applications. The idea of interleaving is that two inductors have opposite ripple directions; they cancel out each other in the line current. 15

26 L 1 Line Filter + V in - L 2 C Q 1 Q V o L O A D Single-Phase AC Source i L1 i L2 S 1,2 Power Process and Current Control Gate Signals Voltage controller - + V ref Figure 3.3: Interleaved Boost rectifier as the front end converter. 3.3 Design of an interleaved Boost rectifier with an input current of 16 A and a dc output of 450 V The design steps of an interleaved Boost rectifier with an input of 16 A and anoutput voltage of 450 V is explained in this section. It is assumed that the rms value of the input voltage can be up to 260 V. The switching frequency is pre-selected to 180 khz in this case. Moreover, it is intended to operate the converter in CCM Boost inductor selection By using (3.1) and selecting L 1 = L 2 = 600 uh, the current ripple is I = 1 A which is around 5% of the peak value of the inductor current. 16

27 3.3.2 Output capacitor selection The output capacitor is usually selected to hold the output voltage for a certain time interval when there is a transient or shortage in the input grid voltage. For instance one can ask for a holding time of half a cycle, which is 10 ms. In addition, it is desirable to limit the voltage ripple in a certain level that is V o defined as the difference between the peak value and nominal value V o. By selecting C = 780 uf and using (3.3), the output voltage ripple is V o = 18 V when the input power is = 4160 W. The stored energy in this capacitor is W C = 1CV 2 = J which can 2 supply the load for slightly more than 24 ms. The maximum value of the storedenergyineachboostinductoris 1 2 Li2 = u (8 2) 2 = 38.4mJ. The stored energy in each inductor is much lower than the stored energy in the output capacitor and it can be neglected. The rms value of the capacitor current can be calculated as [21] I C,rms = I o f(α) where α = Vg V o = = 0.8. The function f has a complicated analytical form which one can see [21] for detailed explanations. However, in this case α = 0.8 and the capacitor rms current is I C,rms = I o f(α) = = 7.36 A. 17

28 3.4 Semiconductor losses of interleaved Boost converter at 230V/16A input supply condition The semiconductor components in an interleaved Boost rectifier are the input bridge rectifier (four diodes), the Boost switches that are of the Mosfet type in this case and output rectifier diodes. The semiconductor losses are usually divided into switching losses and conduction losses. For the input bridge rectifier, the commutation is performed with line frequency, i.e. 50 Hz, so there is no high frequency switching losses. For the Boost switches and output diodes by using SiC devices one can ignore switching losses. Consequently, the semiconductor losses are simplified to conduction losses. For diodes, a simplified equation for conduction losses can be written as P C,Diode = I D,ave V D where I D,ave is the average value of the diode current and V D is the diode voltage drop. For a Mosfet, the conduction loss can be written as P C,Mosfet = R ds IMosfet,rms 2 where R ds is the Mosfet on resistance and I Mosfet,rms is the rms value of the Mosfet current Conduction losses in input bridge rectifier the conduction losses in the input bridge diodes can be written as P C,Diode = 4I D,ave V D. Here it is assumed that V D = 1 V and the average value of the current is I D,ave = 1 π I g sin(θ)dθ (3.4) 2π 0 18

29 where I g is the maximum value of the input current. For this converter with a current level of 16 A (rms), the average value of the current is I D,ave = Ig = π 7.2 A. Consequently, the diodes conduction losses arep C,Diode = = 28.8 W Conduction losses in Mosfet switches for an interleaved Boost rectifier, two parallel switches have ideally the same rms current. The rms value of each Mosfet can be written as [26] I Mosfet,rms = 1 I g π V g V o (3.5) where 1 is expressing two interleaved Mosfet switches. For each Mosfet, the 2 rms current is I Mosfet,rms = = 4.97 A. The conduction loss 2 3π 450 in each Mosfet is P C,Mosfet = = 6.17 W where R ds = 0.25 Ohm. For two switches, the total conduction losses are W Output diodes conduction losses therearetwooutputdiodesthatsharethecurrentwhicheachhaveanaverage of half of the load dc current. The average value of the load current is /450 = 8.17 A. If we assume V D = 1 V, the didoes conduction losses are P C,Fast Diodes = = 8.17 W. 19

30 3.4.4 Total semiconductor losses of the interleaved Boost rectifier with 230V/16A input the total losses can be calculated as P Interleaved,Semiconductors = P C,Diodes +P C,Mosfets +P C,Fast Diodes = = W (3.6) The total semiconductor losses are around 1.3% of the input power ( = 3680 W). 3.5 Regulatory standards and line filters For the grid connected chargers there are two types of regulatory standards: standards addressing harmonics (lower frequency range) and standards dealing with higher frequencies concerning EMC. The main objectives of low frequency standards like IEC [1] are power factor, harmonics and THD. Above mentioned Boost topologies will easily pass the low frequency requirements if they operate properly. However, it is more challenging to cope with EMC issues. There are standards concerning higher frequencies like IEC [2] that is dedicated to onboard battery chargers in vehicle applications. The frequency range of the standards addressing EMC is 150 khz 30 MHz. The high frequency noise is around the switching frequency and its multiples. For instance, one can choose the switching frequency lower than 150 khz to be under the 150 khz limit. However, a line filter shall be utilized to make 20

31 LD. LC CY CX1. CX2 CY LD LC EMI Filter Figure 3.4: Typical EMI filter to fulfill standard requirement regarding high frequency noise. sure that the device can fulfill this requirement. Both the common mode noise and differential mode noise should be considered in the filter design. Fig. 3.4 shows a typical EMI filter where there are differential mode filtering and common mode filtering stages [27]. In addition, there might be some protective devices like voltage suppressors or surge arrestors to cope with transients. The filter has an important impact on the total power density; it is ideal to optimize the filter and PFC pre-regulator to have even better performance in terms of power density. For instance, one can reduce the size of the Boost inductor which would give a higher current ripple. This can be compensated by having a larger filter. So, it is an optimization task to find out a proper compromise between the filter and PFC pre-regulator [16]. 21

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33 Chapter 4 Transformer Isolated Phase-shifted Full-bridge Converter with Zero Voltage Switching Operation Fig. 4.1 shows a schematic diagram of the full-bridge DC/DC converter with a phase-shifted control and zero voltage switching capability [28 34]. The control is performed by a proper turn on/off of four switches (Q A Q D ) in the primary side bridge. Here it is assumed that the switches type is a power Mosfet. Moreover, inside each Mosfet there are an anti-parallel diode and a parasitic output capacitance that are utilized to perform the ZVS operation. However, those two components can also be external devices. The timing diagram of the gate control signals are depicted in Fig There are two legs: A and B that each leg includes the upper and lower 23

34 D A D C i D1 i LF Io + V i - Q A Q B C A A C B D B Q C B Q D C C i p + v p - C D D D L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.1: Full-bridge converter with a phase-shifted control and ZVS operation. ɸ G A G D t 2 t t 0 t G B G C t 3 DT s /2 t t 1 t T s Figure 4.2: Gate signals of a full-bridge converter with a phase-shifted control and ZVS operation. 24

35 + vi + vi - Transformer Bridge - Transformer Bridge a)t<t 0 b)t 0 <t<t 1 + vi + vi - Transformer Bridge - Transformer Bridge c)t 1 <t<t 2 d)t 2 <t<t 3 + vi + vi - Transformer Bridge - Transformer Bridge e)t 3 <t<t 4 f)t 4 <t<t 5 Figure 4.3: A simple presentation of the switching status and timing for the phase-shifted ZVS converter. Mosfet switches. The left leg includes Q A and Q B and the right leg includes Q C and Q D. There are different ways to control the gate signals, but one sophisticated method is to have a fixed duty cycle slightly less than 50% for each leg. The blanking time between the upper and lower switches provides shoot-through protection and is also part of the ZVS operation. This blanking time is determined by the designer to reach ZVS operation over a large range of the load and input voltage. The phase-shift between the two legs determines the power transfer from the input supply to the load. If this phase-shift Φ is zero, the converter operates like a conventional hard-switched one with a duty cycle of 1. For a Phase-shift angle of 180 degree, there is no power transfer and the duty cycle is zero. The gate signals switching 25

36 times are shown in Fig. 4.2 which the important time instants are denoted by t 0 t 4. The definition of switching period T s and the duty cycle D are shown in the figure too. Fig. 4.3 shows the status of switches in different time intervals according to the related gate signals. This figure depicts more intuition of the switching operation. The converter operation is explained at the following [28, 29]. 4.1 Initial condition t < t 0 Suppose that Q A and Q D are conducting. Diodes D 1 and D 4 are conducting and charging the output inductor L F while transferring power to the load. The circuit diagram is shown in Fig The active part of the circuit is in blue color. For instance, parasitic diodes and capacitors of the primary bridge are not conducting. There is no stored energy in capacitor C D while capacitor C C is fully charged with input supply voltage V i. The same holds for C A and C B. These capacitors in interaction with leakage inductance L R performs the ZVS operation. At full load, the transformer primary current is the maximum possible value which is the reflected load current to the primary and the magnetization current. The leakage inductance is usually much lower than the magnetization inductance, hence the voltage drop over the leakage inductance is negligible. 26

37 D A D C i D1 i LF Io + V i - Q A Q B C A C B D B A Q C B Q D C C C D D D + - i p v p L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.4: Operation of the phase-shifted full-bridge converter with ZVS: converter status in initial condition, t < t 0. D A D C i D1 i LF Io + V i - Q A Q B C A C B D B A Q C B Q D C C C D D D + i p v p - L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.5: Operation of the phase-shifted full-bridge converter with ZVS: starting of the right leg transition, t 0 < t < t 1. D A D C i D1 i LF Io + V i - Q A Q B C A C B D B A Q C B Q D C C C D D D + i p v p - L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.6: Operation of the phase-shifted full-bridge converter with ZVS: completion of the right leg transition, t 1 < t < t 2. 27

38 4.2 Start of the right transition t 0 < t < t 1 The right leg transition is starting by turning off Q D as is depicted in Fig. 4.2 and 4.3. Assume that at t = t 0 switch Q D is commanded to the off state. The magnetization current is usually much less than the full load current. After t = t 0 the stored energy in leakage inductance L R forces the current to continue to flow through C C and C D until they change status from fully charged to fully deployed and vice versa. The circuit diagram including current path is shown in Fig The stored energy in the leakage inductance should be higher than the stored energy in the capacitors for a proper ZVS operation. For instance, at light loads in which the leakage inductance can not supply this energy level, the ZVS operation is lost. Usually the ZVS operation range is 50% of full load (decided by the designer). In this time interval the capacitors are charged and de-charged linearly over time; consequently, the transformer primary voltage linearly decreases. The transformer secondary voltage also decreases and in a certain point the voltage value is equal to the output voltage. After this point, the voltage over the output inductor changes its polarity and there is no power transfer from the input supply to the load. Afterwards, the output inductor and the output capacitor supply the load. At the end of this interval the transformer primary voltage reaches zero voltage. 28

39 4.3 Completionof the right leg transitiont 1 < t < t 2 When C D is fully charged it will not take more current from the circuit. The capacitor C C is ideally fully de-charged, so the current flows through diode D C. This is the mechanism of the ZVS operation. If the gate signal of Q C is activated by the controller, Q C is turned on lossless because the antiparallel diode forces the switch s voltage to a value close to zero. However, one needs to make sure that the diode is conducting before the gate activation by a proper component and controller selection. Fig. 4.6 shows the circuit diagram in this case. After activation of Q C the diode is still conducting. The two devices share the current that lowers the conduction loss. By turning on the Mosfet Q C, the right leg transition is finished and the circuit is ready to perform the left leg transition under ZVS condition. The magnetization current is circulating through Q A, Q C and D C. When the right leg transition is finished, the transformer primary and secondary voltages are zero and there is no power transfer to the load from the input supply. The output inductor, L F, supplies the load and forces all diodes at the output bridge, D 1 D 4, to conduct and share the current. 4.4 The left leg transition t 2 < t < t 3 The left leg transition is initiated by the turning off of the Q A gate signal at t = t 2. It is desired to turn off Q A and turn on Q B with a zero voltage. In 29

40 this moment the transformer primary current, i p (t 2 ), is slightly less than the transformer initial current, i p (t 0 ), because of the losses. At t = t 2 the Mosfet channel stops to conduct the current and C A takes over the current flow. Capacitor C B starts to supply the current simultaneously. Consequently, the voltage at point A starts to decrease towards zero which is preparing for the ZVS operation of Q B. Fig. 4.7 shows the circuit configuration in this case. The left leg transition has a different mechanism compared to the right leg transition. All diodes in the secondary are conducting; this provides a short circuit to the transformer. Consequently, unlike the right leg transition, the impact of the load current on the primary side is removed. Consequently C A and C B are de-charging and charging with a resonant mechanism instead of a linear one. These two capacitors and transformer leakage inductance, L R, are part of a resonant circuit. The energy source for this series resonance circuit is provided by the leakage inductance with the initial current of i p (t 2 ). By solving the circuit in this time interval one can calculate the leakage inductance current at t = t 3 by the following equation as [28,29] t 3 t 2 = 1 ω R arcsin( V iz i i p (t 2 ) ) (4.1) where Z R and ω R are the resonant tank circuit impedance and self-oscillating frequency defined as [28, 29] Z R = ω R = LR C R (4.2) 1 LR C R. (4.3) 30

41 D A D C i D1 i LF Io + - Q A Q B C A C B D B A Q C B Q D C C C D D D + i p v p - L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.7: Operation of the phase-shifted full-bridge converter with ZVS: the left leg transition, t 2 < t < t 3. D A D C i D1 i LF Io + V i - Q A Q B C A C B D B A Q C B Q D C C C D D D + i p v p - L R i M i s L M n 1 :n 2.. i s + v s - D 1 D 2 L D F 3 C o D 4 R + V o - Figure 4.8: Operation of the phase-shifted full-bridge converter with ZVS: the power transfer interval, t 3 < t < t 4. 31

42 The equivalent resonant capacitance can be selected as [28, 29] C R = 8 3 C oss +C T (4.4) where C oss is the Mosfet output capacitance and C T is the transformer input capacitance. During each transition, two switches capacitors are involved and these capacitors have not a constant value. So, they are approximated by 8 C 3 oss. The transformer capacitance is not negligible in many high frequency applications that one needs to consider it in the equation. The left leg transition time is longer than the right leg transition since the mechanism is different. In conventional controllers it is possible to adjust the right and left leg transition times independently. 4.5 The power transfer interval t 3 < t < t 4 At t = t 3, Mosfet Q B turns on under ZVS. This completes the right leg transition. The transformer primary voltage changes to V i and the two secondary diodes conduct and supply the load. The circuit configuration is shown in Fig The transformer magnetization current increases in this interval. Note that the polarity of the transformer voltage is changed. As one can see from Fig. 4.2 and 4.3 at t = t 4, Mosfet Q C turns off that is the same as the first interval. From this moment the circuit is operating like before. The converter waveforms are shown in

43 i P (t) I P I2 I1 t 2 -I 1 -I 2 t v P (t) v i -I P t 1 -v i -v i t i M (t) I M2 I M1 t v s (t) V i -I M2 -I M1 t -V i v LF (t) V i -V o V i -V o V i -V o t i LF (t) -V o -V o Io+ DI o i D1 (t) Io-DI o I o t i D3 (t) t t 0 t 3t 4 t Figure 4.9: The waveforms of the full-bridge converter with phase-shifted control and ZVS operation. 33

44 4.6 Design of the resonant tank As is mentioned earlier, the resonant tank condition controls the ZVS operation. Two conditions must be held by the resonance circuit: enough stored inductive energy and allocation of enough time for the transition. The worse condition is under light load or high voltage in the input. The resonant tank components are L R and C R with a resonant frequency of ω R. The maximum transition time should be less than one-fourth of the resonance period that can be expressed as [28,29] t max = 1 2π = π (4.5) 4ω R 2ω R The required energy in the capacitors can be written as W C = 1 2 C RV 2 i = 4 3 C oss C TV 2 i. (4.6) There is a factor of 4/3 in output capacitance of the Mosfet to somehow use an estimated average value of the device capacitance. The stored inductive energy is W L (t) = 1 2 L Ri 2 p (t). (4.7) One can calculate the required leakage inductance by the following equation as L R = 1 π. (4.8) ( 2t max ) 2 C R 34

45 In addition, the minimum load condition can be calculated as i P,min = C R V 2 i L R. (4.9) Below this current, the stored energy in the inductor is less than the stored energy in the capacitors that avoids proper ZVS operation of. The designer can set the value of L R such that the ZVS is achieved up to a certain level of the primary current such as 50% of the nominal load. 35

46 36

47 Chapter 5 Design and Analysis of a 3.3 kw DC/DC Converter with a dc Output Voltage of 600 V The design procedure and analysis of a DC/DC converter with the specifications described in Table 5.1 is presented in this section. Some parameters are specified in Table 5.1 and others will be selected by following the described design procedure. The output current can be calculated as 3300/600 = 5.5 A. The allowed loss of theconverter is = 165W. The loss includes semiconductor losses in the input bridge and output rectifier plus transformer and output inductor losses. By a proper operation of ZVS and utilizing SiC devices, the semiconductor s switching losses are close to zero and are neglected here. The transformer turns ratio is defined as n = n 1 /n 2 which n 1 and n 2 are the number of turns in primary and secondary of the transformer. Here it 37

48 is assumed that n is given and n = 0.5. The input/output relation can be described as V o = D V i n (5.1) where D is the effective duty cycle. For this converter the duty cycle is D = /450 = If the magnetization current is too high, then the converter can not operate under peak current mode control; since the impact of load can not be detected. The magnetization current should be lower than the inductor current ripple reflected to the primary side. Assume that the converter is in the boundary condition mode, then the peak load current should be more than the maximum value of the magnetization current. Then this requirement can be stated as I M < I o /n. The required magnetization inductance can be calculated as L M > ndv i 4 I o f s = ( )/( ) = mh (5.2) It is assumed that the output current ripple is I o = 0.1I o = 0.55 A. A Table 5.1: Specifications of a 3.3 kw DC/DC converter with an output voltage of 600 V. Input dc voltage, V i V Output power 3300 W Output dc voltage, V o 600 Vdc Switching frequency, f s 180 khz Output inductance, L F 600 uh Transformer turns ratio, n 0.5 Efficiency more than 95% 38

49 i LF (t) D T s /2 T s I D o+ Io t 0 t 3 t 4 Io-DI o I o t Figure 5.1: The waveform of the output inductor current. magnetization inductance of 400 uh is selected here. 5.1 Inductor current The inductor voltage can be written as V i /n V o = L F 2 I o DT s /2. (5.3) The inductor current ripple is calculated as I o = 0.46 A for this converter. Fig. 5.1 shows the current waveform. The rms value of the inductor current can be calculated as i LF,rms = I o ( I o ) I 2 (5.4) o which is equivalent to i LF,rms = ( )2 = 5.5 A in this case. 5.2 Transformer calculations The transformer primary current is shown in Fig The peak value of the current, I P, is the maximum load current reflected to the primary plus the 39

50 maximum value of the magnetization current, I M. The value of I M can be calculated as which in this case is I M = mH 180kHz I M = DV i 4L M f s (5.5) = 1.04 A. There are three important current levels in the transformer primary current indicated as I P, I 1 and I 2, as shown in Fig These currents can be calculated as I P = I M + I o + I o n I 1 = I M + I o I o n I 2 = I M + I o I o n (5.6) (5.7) (5.8) where in this case they are equal to I P = 1.04+( )/0.5 = A I 1 = 1.04+( )/0.5 = 9.03 A I 2 = 1.04+( )/0.5 = A. After some mathematical manipulation the rms value of the transformer current on the primary side can be written as I 2 P,rms = 1 3 ( I P +I 2 ) 2 D 1 +( I P +I 2 )I P D 1 +I 2 PD ( I 2 I 1 ) 2 D 2 +( I 2 I 1 )I 2 D 2 +I 2 2D 2 (5.9) ( I P +I 1 ) 2 D +( I P +I 1 )( I 1 )D+I 2 1D 40

51 T s i P (t) I P I 2 I 1 D Ts/2 t 3 t 4 t 0 t 2 t 0 -I 1 -I 2 t T s /2 -I P Figure 5.2: The waveform of the transformer primary current. where parameters D, D 1 and D 2 are calculated as D = t 4 t 3 T s /2 (5.10) D 1 = t 2 T s /2 (5.11) Moreover the following equation holds D 2 = t 3 t 2 T s /2. (5.12) D +D 1 +D 2 = 1. (5.13) The right transition time can be calculated as t 3 t 2 = 1T 4 R = 1 2π 4 ω R = 40 ns. Consequently, the value of D 2 is For this converter the rms current in the transformer primary side is calculated as A. The transformer secondary current is shown in Fig The peak value of the current, I PS, is the maximum load current. There are three important current levels in the transformer secondary current indicated as I PS, I 1S and 41

52 T s i S (t) I PS I 2S I 1S D Ts/2 t 3 t 4 t 0 t 2 t 0 -I 1S -I 2S t -I PS Figure 5.3: The waveform of the transformer secondary current. I 2S in Fig These currents can be calculated as I PS = I o + I o (5.14) I 1S = I o I o (5.15) I 2S = I o I o ni M (5.16) which in this case are I PS = = 5.96 A, I 1S = = 5.04 A and I 2S = = 4.56 A. After some mathematical manipulation the rms value of the transformer current in the secondary side can be written as I 2 S,rms = 1 3 ( I PS +I 2S ) 2 D 1 +( I PS +I 2S )I PS D 1 +I 2 PS D ( I 2S I 1S ) 2 D 2 +( I 2S I 1S )I 2S D 2 +I 2 2S D 2 (5.17) ( I PS +I 1S ) 2 D+( I PS +I 1S )( I 1S )D +I 2 1S D For this converter the rms current in the transformer secondary side is 5.31 A. 42

53 T s i D1 (t) I PS I 2DS D Ts/2 t 0 t 1 t 3 t 4 t 0 t i D2 (t) I 1S I PS I 2DS t 0 t 1 t 3 t 4 t 0 t Figure 5.4: The waveform of the output diodes. T s/2 i D1 (t) I PS I 1S D T s /2 t 0 t 4 t 0 t Figure 5.5: The approximated waveform of output diode D Output diodes calculations The waveforms of the output diodes are shown in Fig During the power transfer interval, the conducting diodes have the same current as the output inductor. The waveforms show the detailed timing, but it is difficult to calculate the exact amount of current. However, one can approximate the waveform such that during the rest of time interval the diode current is half of the inductor current. Fig. 5.5 shows the simplified diagram. The diode D 1 average current can be determined as I D = [ 1 2 (I 1S +I PS )D T s I PS(1 D) T s 2 ]/T s = 2.24 A. (5.18) 43

54 The diode losses can be calculated as 4I D V D = = 8.96 W. The voltage dropof the diode is assumed to be 1 V andthe resistance of the diode is neglected. Moreover, by utilizing SiC diodes one can neglect the diodes switching losses. 5.4 Bridge Mosfet switches calculations By a proper design and operation of the converter, the Mosfet switching losses are close to zero. In addition, the Mosfet body diode conducts for a short period of time during the transition. Hence, it is possible to neglect the losses related to that time interval. Consequently, it is a good approximation to consider each Mosfet conducting during the power transfer interval in which the current is equivalent to the transformer primary. Fig. 5.6 shows the approximate waveform of a Mosfet. The rms value of each Mosfet can be approximated as I Mos,rms = m2 D 3 T 2 s 24 + md2 T s I I2 1D 2 (5.19) where m = I P I 1 DT S. For this converter the Mosfet rms current is 6.38 A. /2 The Mosfet conduction loss can be approximated as R ds I 2 Mos,rms that gives = W for each Mosfet. The total conduction losses of the four Mosfets are W for this converter. 44

55 T s i Q (t) I P I 1 D T s /2 Figure 5.6: The approximated waveform of an input Bridge Mosfet. 5.5 Total loss calculations t The converter total losses are semiconductor losses and magnetic losses in the transformer and output inductor. Moreover, there is the copper loss in these devices (transformer and inductor). If we assume that the magnetic losses and semiconductor losses are equal, then the total loss is 2 ( ) = W. So the converter loss is 99.32/3300 = 3% and the efficiency is 97%. 5.6 Minimum primary current for a proper ZVS operation As mentioned earlier, the stored energy in leakage inductor shall be more than the stored energy in equivalent capacitance of the resonance circuit. The minimum primary current for a proper ZVS operation can be calculated as I P,min = C R Vi pf 450 = 2 L R 2µH = 5.78 A (5.20) For this converter it is assumed that C T = 8/3 120 pf +10 pf = 330 pf and L R = 2 µh. The value of this current in full load condition is calculated as A. Consequently, the ZVS operation is achieved down to 44.6% of 45

56 the full load. 46

57 Chapter 6 Design and Analysis of an Air-Cooled 3.3 kw Battery Charger with an Input of 230 V/16 A and a dc Output Voltage of 110 V In this section the design and component selection of a 3.3 kw battery charger is explained and presented. The charger has two power conversion stages: an interleaved Boost rectifier and a DC/DC converter based on the full-bridge converter with a phase-shifted control and ZVS operation. The main specifications of the charger are presented in Table 6.1. The output voltage is varying between 90 V and 120 V while the nominal output value is 110 V. 47

58 Table 6.1: Specifications of a 3.3 kw battery charger with an input of 230 V/16 A and an output voltage of 110 V dc. Input voltage from the utility grid (single-phase) V Maximum value of the input current from the grid 16 A Ac line frequency range Hz Power factor More than 99% Total harmonics distortion (THD) Less than 5% Output dc voltage V Maximum output dc current 30 A Maximum output power 3.3 kw Charger efficiency Around 94% Cooling Air cooled PFC stage voltage 400 V ±20 V Switching frequency of the Boost stage 70 khz Switching frequency of the DC/DC stage 200 khz 6.1 Interleaved Boost AC/DC rectifier with an input of 230 V/16 A and a dc output voltage of 400 V The design process is started by selection of the Boost inductor. The maximum current in each inductor is calculated as I P = 16 2/2 = A. By selecting L 1 = L 2 = 400 uh one can calculate the current ripple according to (3.1) as I = khz 400 uh = 3.57 A that is around 30% of the peak value of the input current. So the maximum inductor current is I P + I = 16 2/ = A. Consequently one can select an 400 uh/15 A inductor for each branch of the converter. The capacitor value is selected as C PFC = 1 mf which provides a voltage ripple less than ±20 V at the dc bus. A 1 mf/450 V capacitor with a 48