Demonstration. Agenda

Transcription

1 Demonstration Edward Lee 2009 Microchip Technology, Inc. 1 Agenda 1. Buck/Boost Board with Explorer AC/DC Reference Design 3. Pure Sinewave Inverter Reference Design 4. Interleaved PFC Reference Design W DC/DC Converter 2

2 Buck/Buck-Boost + Mindi GUI 3 4

3 General Configuration 5 General Configuration Soft Start - Sequencing Header file: Config_General.h 6

4 Design Options Topology 7 Design Options Advanced 8

5 Design Options Schematic 9 Design Options Schematic 10

6 Design Options Schematic BODE PLOT STEADY STATE ANALYSIS TRANSIENT ANALYSIS 11 Design Options Schematic Bode Plot 12

7 Design Options Design Summary 13 My Design DESIGN NAME DESIGN DESCRIPTION SAVE BUTTON 14

8 Downloads BOM 15 AC-DC Reference Design Ac-dc Reference Design We will use it to investigate the following items: 1. PFC implementation 2. Soft Switching 3. Multiphase Implementation 4. Comparator 16

9 Block Diagram Isolation Barrier Vac 45-65Hz EMI Filter And Bridge Rectifier Rectified Sinusoidal Voltage PFC Boost Converter 400 Vdc Full Bridge Converter DC-DC Converter Sync Rectifier and Filter Multi-phase Buck converter Single-phase Buck converter SMPS Controller Opto- Coupler Feedback Signal 17 AC-DC Reference Design PHASE SHIFT DC-DC MULTIPHASE DC-DC PFC CONTROL BOARD DC-DC EMI FILTER Main Building Blocks: EMI Filter PFC Phase shift dc-c Multiphase dc-dc Single phase dc-dc Control board 18

10 Pure Sinewave Inverter Reference Design CD-ROM with documentation and code Offline UPS Reference Design 3x 12V SLA Batteries Battery Input Cable Power Cord 2x Battery Jumper Cables 19 Offline UPS Offline UPS Switches to battery as it detects power failure Few millisecond switchover time at power failure Filter Transfer Switch DC DC DC AC Battery Charger Battery Boost Converter Inverter 20

11 Specifications Microchip s Offline UPS Reference Design: 1kVA Steady-State Power Battery Input Voltage 36V (3X12V) AC Voltage Pure Sine Wave 60Hz 50Hz Efficiency ~ 84% Transfer time < 10ms (from Mains to Battery Power) 21 Block Diagram 390V DC +12V +5V Auxiliary Power Supply Battery (3 x 12V) Boost Stage DC-Link Filter Full Bridge Inverter +3.3V Battery Charger (Flyback) dspic DSC 220Vac, 50Hz LC Filter Relay Logic Load AC Input 22

12 UPS Board Layout: Push-Pull Converter Push-Pull Primary Side Push-Pull Secondary Side DC Link Filter 23 UPS Board Layout: Full-Bridge Inverter Full-Bridge Current Sensor Filter Relay 24

13 UPS Board Layout: Flyback Battery Charger Flyback Battery Charger 25 UPS Board Layout: dspic & Other Circuitry USB Controller Auxiliary Power Supply LCD Controller dspic 26

14 Inverter Operation with Rectifier Loads Inverter Voltage Inverter Current Inverter becomes zero Large Inrush Current causes Driver Fault 27 Inverter Operation with Rectifier Loads Inverter Voltage Inverter Current Driver Fault Recovery Routine increments PWM duty cycle in small steps and charges load capacitor 28

15 Inverter Operation with Rectifier Loads Inverter Control Loop resumes when output voltage matches sine reference Inverter Voltage Inverter Current Edward Lee September Watt Interleaved PFC Edward Lee September

16 Interleaved PFC Operation PWM1 I IN I L1 I D1 I Load PWM1 I C PWM V AC PWM2 I L2 I s1 I s2 I D2 PFC output IL1 IL2 (IL1 + IL2) t When duty cycle is = 50% 31 Interleaved PFC Operation PWM1 I IN I L1 I D1 I Load PWM1 I C PWM2 I s V AC PWM2 I L2 I s2 I D2 PFC output IL1 IL2 (IL1 + IL2) When duty cycle is > 50% t 32

17 Advantages Interleaved PFC Less ripple current on the output capacitor Less ripple current in the input as inductor ripples cancel Total Inductor volume can be reduced (approx. ½ the size of single converter) by tolerating higher ripple current % (ripple cancelling) in individual converters compared to a single stage PFC 33 Basic Block Diagram D1 ~ L2 D2 + ~ PWM1 Q1 Q2 PWM2 DC Bus Voltage - V AC I AC IQ 1 IQ 2 A to D Converter V DC Digital Control System PWM Module PWM1 PWM2 Digital Signal Controller (dspic) 34

18 Control Methodology ACMC (Average Current Mode Control): Contains two PI loops: an inner current loop and an outer voltage loop The inner current loops run much faster than the outer voltage loop (50 khz versus 2 khz) and ensures that the average input current is in phase with the input voltage. The reference current for inductors is closely followed, as in a current controlled source CCM (Continuous Conduction Mode): Current in the inductor never goes to zero except at the input voltage zero crossing points (depending on the inductor values and the amount of load connected to the system) Operating in the continuous conduction region reduces the harmonic content on the input current I L 35 Electrical Specifications Line Input Voltage: 85 to 265 Volts (RMS) Line Frequency: 45 to 66 Hz Power: 350 watts Efficiency: 350 Watts Voltage: 400 Volts PF: 0.99 Regulation: +/- 1.5% output ripple 36

19 Simulink Block Diagrams PFC System Model 37 Simulation Results Rectified Input Voltage ( V AC ) Inductor Current (I AC ) 38

20 200W DC/DC Converter 39 Block Diagram Q1 Q3 Tx 1 Q6 Gate Drive Q1- Q6 Q2 Q4 CT1 Q5 L 0 V o GND CMP4 High speed PWM +/- PHASE δphase dspic33fj16gs502 PI Control Phase + δi P Control δi L + I Ave δv PI Control - I Share ADC2 ADC0 + ADC1 - Targeted Voltage V * o 40

21 MATLAB simulations 41 Control System Simulation Voltage variation Settling time 500uSec Load Transient 0A - 9A 42