Single-Stage Three-Phase AC-to-DC Front-End Converters for Distributed Power Systems

Transcription

1 Single-Stage Three-Phase AC-to-DC Front-End Converters for Distributed Power Systems Peter Barbosa, Francisco Canales, Leonardo Serpa and Fred C. Lee The Bradley Department of Electrical and Computer Engineering Center For Power Electronics Systems Virginia Tech Blacksburg, VA Abstract This paper presents a comparison of different approaches for single-stage three-phase AC/DC power conversion. The proposed topologies are operated under zerovoltage switching and provide automatic shaping of the input current. Different aspects are compared throughout the paper, such as intermediate bus voltage stress, harmonic distortion, efficiency and interleaved operation. Comparisons demonstrate that interleaving reduces drastically the size of differentialmode (DM) filter for single-stage discontinuous conduction mode (DCM) rectifiers. This paper also presents an interleaving technique that eliminates total duplication of power stage. I. INTRODUCTION Today s existing practice to obtain high-power distributed power systems (DPS) is based on two-stage front-end converters. For power levels in the range of 6kW, the most popular approach is to connect three single-phase rectifiers to the three-phase AC system. In this case, each single-phase module consists of a single-phase power factor correction (PFC) circuit followed by an isolated DC/DC converter [1] [2]. Although this type of system presents high performance, it is relatively expensive because of the large number of components used to realize the front-end converter for DPS applications. A possible solution to reduce the cost of medium-power-level rectifiers has been presented in [3]. This configuration consists of an interleaved three-phase PFC circuit followed by a DC/DC converter, which makes the system simpler and less expensive than that discussed in [1] [2]. As an alternative solution, the PFC stage and DC/DC converter can be integrated to reduce the front-end converter cost, as described in previous work [4], where a phase-shift full-bridge topology was used to implement the single-stage converter. Despite the need for an auxiliary transformer winding that operates as a magnetic switch to control the PFC function for three-phase application, the overall system presented by [4] is simpler than those discussed by [1]-[3]. However, the structure discussed in [4] requires the power This work was supported in part by CNPq (The Brazilian Council for Scientific Development under Grant Number /97-6, by the Federal University of Paraná, Curitiba-Brazil, by the Conacyt (The Mexican Council for Science and Technology), and by the ERC Program of the National Science Foundation under Award Number EEC switches to withstand the total intermediate bus voltage stress. This problem turns out to be critical, since the intermediate bus voltage fluctuates according to input voltage and load variations. Therefore, power switches with high voltage rating are required if the converter is intended to operate in power utilities where the nominal line-toneutral voltage is 220V. To overcome this problem, this work proposes novel three-phase single-stage three-level-based AC/DC converters to achieve low harmonic distortion and reduced parts count, as well as reduced cost. The proposed threelevel converters reduce the voltage stress across the power switches, achieve zero-voltage switching without auxiliary circuits and require only four switches to perform the featured functions. This paper also compares the intermediate bus voltage stress, harmonic distortion and efficiency between two different single-stage topologies for three-phase applications. The interleaving technique is explored for each topology in order to cancel out input current ripple, which leads to input filter size reduction. In order to verify the effectiveness of the interleaving technique in providing filter size reduction, the two interleaved topologies under consideration are compared against the benchmark approach discussed by [1] [2]. In general, the application of the interleaving technique requires the duplication of the power stage, which leads to an increased number of parts count. To surmount this problem, this paper also discusses the implementation of interleaving technique without the need to totally duplicate the power stages, while still retaining the simplicity of the single-stage approach for interleaved operation. II. RATIONALE FOR USING SINGLE-STAGE APPROACH In the two-stage approach for DPS front-end converter applications, the rectifier and DC/DC converter operate independently, as illustrated in Fig. 1 using three-level-based topologies [5] [6]. The PFC controller regulates the bus voltage to 800V, which is determined according to threephase input voltages and step-up characteristics of the boost rectifier. The advantage of the two-stage approach is that a regulated bus voltage assures easy efficiency design optimization for the DC/DC converter.

2 Two-Switch Three-Level Boost Rectifier Three-Level DC/DC Converter PFC Controller DC/DC Controller Fig. 1. Two-stage front-end converters using three-level topologies for PFC and DC/DC conversion. In general, the performance of two-stage front-end converters is relatively good, since the design can be optimized for each stage. However, the cost for this type of approach is high because one has to account for a relatively large number of components and controllers to accomplish the required functions of the front-end converters. Single-stage approach, however, uses a reduced number of switches and controllers to shape the input current and to regulate the Dutput voltage. Although the cost of singlestage front-end converters is lower than that of two-stage approach, the intermediate bus voltage is no longer regulated because the controller in the circuit is used to regulate the Dutput voltage only. Consequently, the variation of the intermediate bus voltage creates detrimental effects on the optimization of the power conversion efficiency in singlestage converters. Despite the tradeoff between cost and performance, the single-stage approach is still suitable for distributed power systems and high-end server applications. The latter has steadily increased power requirements during the last five to ten years. With increased levels of power requirements for server applications, lower cost solutions will become more demanding in the future. Trying to address the everincreasing requirement for low cost applications, it is possible to combine functions of the two-stage front-end converter into a single-stage module. For instance, one can eliminate the need of using the switches of the boost rectifier shown in Fig. 1 and modify the connections of the input bridge diode to obtain a single-stage converter as illustrated in Fig. 2. That topology represents a simplification of the two-stage approach, in which the three-level DC/DC converter modulation strategy is preserved, but the same stage aggregates the power factor correction function as well. Taking into account this approach, many other topological variations can be obtained, as explored hereafter. III. TOPOLOGIES FOR COMPARISON The topology of the three-level phase-shift (TL-PS) AC/DC converter shown in Fig. 2 has already been presented in previous work [7]. Issues such as operating principle, design and experimentation were addressed in that work. The main features encountered in this type of threelevel converter are zero-voltage turn-on for all switches, low harmonic distortion in the input currents, discontinuous conduction mode (DCM) operation for the boost inductors and 50% voltage stress reduction applied across the power switches. Fig. 2 shows one of the drawbacks presented by the converter under discussion. As can be seen, the efficiency is shown for two different designs: 100kHz and 50kHz. At 100kHz, the overall efficiency, including the EMI filter, is rather low. One of the reasons for such a low efficiency is the high switching turn-off loss. The switches in the circuit are turned off every switching cycle at the peak of the DCM input current, which results in high switching loss because the turn off occurs under hard switching conditions. This assumption can be proved true because the same circuit, when designed at 50kHz, can already improve the efficiency to above 87%, which is a significant departure from the efficiency measured at 100kHz. Another reason for limited efficiency is caused by the circuit conduction loss. To transfer power to the output and store energy in the boost inductors, either the upper switches and or the lower ones and must be on [7]. Consequently, the input current after being rectified flows through either upper or lower devices, which ends up increasing the conduction loss in the circuit because of the number of semiconductor junctions in the path of the current flow. To reduce the conduction loss in the AC/DC power conversion, one can use the topology variation shown in Fig.

3 3. This variation is obtained from Fig. 1 by eliminating the DC/DC converter, adding two switches to the PFC stage and connecting the transformer according to Fig. 3. In this approach, the PFC modulation strategy is preserved, while the DC/DC function is combined and performed by the same stage. This circuit variation can reduce the conduction loss because the input currents, after being rectified, circulate through only one switch at a time, as opposed to the circuit discussed above. The current source in parallel with the primary of the transformer represents the Dias of the magnetizing current caused by the asymmetrical duty cycle operation of the topology variation. The inner switches are used to regulate the Dutput voltage and to store energy in the boost inductors, while the outer switches must operate complementary. The operating stages of the three-level asymmetrical (TL-AS) AC/DC converter are illustrated in Fig. 3. First stage, Fig. 3- the Dlocking capacitor is used to provide voltage balance across the transformer. When and are turned on, energy is stored in the input inductors and the blocking capacitor is discharged across the output filter. Secondstage,Fig.3(c)-Inthis stage, the switches and are turned off. The rectified boost inductor currents and the current in are diverted into the intrinsic diodes of the switches and, providing conditions for zero voltage turn on. During this stage, the primary current reverses its polarity and builds up towards the opposite side. Since and operate longer than and, the magnetizing DC bias current is built up according to the polarity shown in Fig. 3(c). Therefore, this stage ends when the current through inverters its polarity and becomes equal to the difference between the reflected output inductor current and the DC magnetizing current of the transformer. Third stage, Fig. 3(d)- During this stage, power is transferred from the bus capacitors and to the output, while the input inductors are reset. Fourth stage, Fig. 3(e)- This stage takes place when the boost inductors have been fully reset. As can be seen, energy continues to be transferred to the output during this stage. Fourth stage, Fig. 3(f)- When the switches and are turned off, the primary current will circulate through the intrinsic diodes of and, which is the condition for zero voltage turn on. During this stage, the primary current will reverse its polarity until it reaches the sum between the reflected output current and the DC magnetizing current. Once this condition has been reached, the converter will reinitiate another operating cycle. IV. COMPARISON OF FRONT-END AC/DC CONVERTERS This section presents the comparison for both single-stage converters discussed up to this point. They are designed to deliver 3kW of power at 48V Dutput voltage. The input voltage variation is from 170V to 265V, measured from lineto-neutral, and the switching frequency is 50kHz. Input Filter Efficiency (%) Ca Cb Cc La Lb Lc S1 S2 S3 S4 Dc1 Dc2 Cb1 Cb Input RMS line-to-neutral voltage (V) f s =100kHz nt:1 Dr1 Dr2 f s =50kHz Fig. 2. Three-level phase-shift AC/DC converter: topology and efficiency curves [7]. Table 1 summarizes various components used in the implementation of both converters. The major difference between them is the number of turns in the transformer. The TL-AS single-stage converter requires more turns to account for the DC magnetizing current that results from the asymmetrical operation. The transformer core size, however, was the same for both single-stage converters. A. Intermediate bus voltage stress The first comparison between the two approaches is shown in Fig. 4. The intermediate bus voltage is plotted as a function of output power, taking the input voltage as the running parameter. For both cases, the intermediate bus voltage increases as the output power decreases. Explanation for this behavior is based on the power balance and operating mode of the output filter inductor. For instance, suppose that the output inductor is operating in continuous conduction mode (CCM) and that the resonant inductor for soft switching is relatively small, which means that the voltage drop across the resonant inductor can be neglected. Under these assumptions, the Dutput voltage is simply a function of the duty cycle and intermediate bus voltage. If the load decreases, the duty cycle must also decrease to store less energy in the DCM boost inductors. Since the DC output voltage is fixed and a function of the duty cycle and intermediate bus voltage, one can conclude that decreasing duty cycle has to be compensated by increasing the Lo Co Ro

4 intermediate bus voltage in order to maintain the Dutput voltage regulated. This mechanism explains why the intermediate bus voltage increases as the output power decreases. Fig. 4 also shows a region where the intermediate bus voltage does not increase anymore at light load. In that region, the output inductor starts operating in DCM. The intermediate bus voltages achieve about the same level at light load for both cases. Although the bus voltage is large, the three-level topologies alleviate the stress applied across the switches. As a result, 800V devices can still be used, despite more than 1000V of bus voltage stress. B. Harmonic distortion and efficiency Fig. 5 shows the harmonic distortion of the input current as a function of the line-to-neutral input voltage for both converters. The TL-PS AC/DC converter presents much lower harmonic distortion because the boost inductors are partially reset with the total intermediate bus voltage, as opposed to the TL-AS AC/DC converter that always uses only half of the total intermediate bus voltage to reset the DCM boost inductors. Since these inductors operate in DCM, the general rule is that the faster the reset, the lower the harmonic distortion of the input currents. Input Filter C f C 1 L a L a L a (c) (d) L a L a (e) (f) Fig. 3. Three-level AC/DC converter: topology, and - (f) operating stages.

5 Table 1. Components used in the implementation. Component Three-Level Phase-Shift Three-Level Asymmetrical Boost inductance 110µH 72µH Resonant inductance 11µH 15µH Output inductance 5.7µH 7.7µH Number of turns 12/4/4 20/5/5 Blocking capacitor - 5u/1000V Input rectifiers RUR30120 RUR30120 Output rectifiers HFA 120MD40D HFA 120MD40D Power switches IXFN 44N80 IXFN 44N80 Clamping diodes RUR Intermediate bus voltage (V) Vi = 180Vrms Vi = 220Vrms Vi = 260Vrms Output power (W) Bus voltage (V) Vin = 180V Vin = 220V Vin = 260V Output power (W) Fig. 4. Intermediate bus voltage stress: three-level phase-shift and three-level asymmetrical. THD (%) Three-level Asymmetrical Three-level Phase-Shift Input line-to-neutral voltage (V) Efficiency (%) Three-level Asymmetrical Three-level Phase-Shift Input line-to-neutral voltage (V) Fig. 5. Comparison between the two front-end converters: THD at full load and overall efficiency (including EMI filter) at full load and 50kHz switching frequency. Fig. 5 illustrates the efficiency measured from both cases, including the EMI input filter connected across the AC side. As predicted before, the TL-AS AC/DC converter presents better efficiency because the number of switches in series with the rectified input current is reduced to one, as opposed to two switches used in the TL-PS AC/DC converter. The efficiency of each of these two topologies corresponds roughly to an equivalent two-stage front-end converter having 94% efficiency per stage. V. INTERLEAVED SINGLE-STAGE AC/DC CONVERTERS Both single-stage three-level AC/DC converters operate under DCM. As a result, the input current ripple is significantly higher, as compared to boost-type CCM converters, which ends up increasing size and volume of EMI filter for differential-mode (DM) noise. A common solution to address this problem is to interleave the operation of two or more converters to provide input current ripple cancellation [3]. To achieve input current ripple cancellation, the interleaved converters must be synchronized and phaseshifted from each other by T s /n, where T s is the switching period and n is the number of interleaved converters (number of channels). Fig. 6 shows both interleaved three-level single-stage converters used to provide input current ripple cancellation. The power stage is duplicated and the input filter is designed

6 at the system level. When two converters are interleaved, the odd harmonics of the switching frequency are cancelled out, which means that the first high-frequency harmonic occurs at the side-band frequencies of 2f s, more specifically at 2f s ±f r,wheref s is the switching frequency and f r is the line frequency. The amplitude of the relevant high frequency harmonics are shown in Fig. 7 for both single-stage interleaved systems, using the components given in Table 1. These plots were obtained through simulation by adding the boost inductor currents connected to the same phase and performing FFT on the interleaved current to extract the information shown in Fig. 7. Only three relevant harmonics are plotted for the two-channel interleaved systems. The plots can be used to determine the worst-case ripple to design the input filter for required attenuation. Input filter L L D c1 D c2 D c D r1 D r2 D r1 R o Another advantage of interleaving single-stage converters is that the output side can also achieve current ripple cancellation. Cancellation of the output current ripple is extremely beneficial to reducing the amount of output filter capacitor required to keep the output voltage ripple below certain specified limits. However, one must be careful when interleaving the outputs of single-stage converters. For instance, the TL-PS AC/DC converter will cancel out output current ripple only and if only an odd number of converters are interleaved together. This affirmation has to do with the fact that the voltage impressed across the primary side of the transformer is totally symmetrical in the TL-PS AC/DC converter. The primary voltage is rectified, but for an even number of interleaved converters, these voltages will be in phase after rectification, despite phase-shifting the primary side accordingly to provide input current ripple cancellation. Therefore, for an even number of interleaved converters, the possibility to cancel out the output current ripple is inexistent. For an odd number of interleaved converters, however, the TL-PS AC/DC interleaved system will provide output current ripple cancellation. As a result, the minimum number of interleaved TL-PS channels to achieve ripple cancellation is three. This requirement does not apply to the TL-AS interleaved system because the voltage applied across the primary of the transformer is asymmetrical. Therefore, only two channels are required to provide output ripple cancellation for this type of approach. N' C D c2 2 D r2 Harmonics of switching freq. (A) xfs 4xfs 6xfs Input Filter Duty cycle C f Harmonics of switching freq. (A) xfs 4xfs 6xfs Duty Cycle Fig. 6. Interleaved single-stage converters: TL-PS and TL-AS. Fig. 7. Harmonics of switching frequency: TL-PS and TL-AS.

7 VI. MEASURING EFFECTIVENESS OF INTERLEAVING This section discusses the effectiveness of interleaving single-stage AC/DC converters to reduce size of EMI DM filter. The objective is to calculate the filter parameters needed to attenuate DM noise generated by both noninterleaved and interleaved approaches, and compare the results. It is assumed that the common-mode noise is neglected in the calculation of the DM filter parameters. This assumption allows one to use EMI standards to entirely limit DM noise. A line impedance stabilization network (LISN), as shown in Fig. 8, is connected in front of each converter to determine the noise to be attenuated. The 1µF capacitor connected in parallel with the noise source is required to avoid voltage distortion across the internal 0.1µF LISN capacitor. This extra capacitance added to the LISN is incorporated by the capacitor C 4 of the DM input filter, as illustrated in Fig. 8. As can be seen, the filter is a fourth order network, including damping resistor R d and lowfrequency bypass inductor L d. The LISN is incorporated into the circuits under consideration and simulations are performed to determine the DM noise generated by the circuits. Following this procedure, the noise generated by each single-stage converter can be used to determined the DM input filter parameters. Table 2 shows the results of the DM filter design for two different standards: CISPR 22 and VDE 0871, both Class B. CISPR 22 limits conducted noise in the frequency range from 150kHz to 30MHz, while VDE 0871 limits noise from 10kHz to 30MHz. Table 2 shows the filter parameters designed for non interleaved converters delivering 6kW of total output power, which explains why the boost inductances are only half of the value shown in Table 1. Looking at the structure of the filter shown in Fig. 8, one can conclude that the inductors L d,l 1,andL 3, and capacitors and C 4 dictate the size of the input filter. The inductor L 2 is not in the path of high current, and for that reason does not contribute to the filter size. The results shown in Table 2 are given per phase and they show that non-interleaved singlestage converters require large DM input filters to attenuate noise, especially filters designed under VDE 0871, since they have to attenuate the entire spectrum of the input current noise. From the results shown in Table 2, it is clear that reducing size of the input filter is rather demanding for high power applications. Therefore, interleaved converters constitute an alternative solution for that purpose. Similarly to what was followed to design the DM filter for non-interleaved converters, it is now investigated how the interleaving of converters impacts DM input filter size designed under CISPR 22 and VDE0871 standards. The worst-case ripple generated by the two-channel interleaved systems can be determined from Fig. 7. Since the switching frequency is 50kHz, the dominant harmonic of the switching frequency to be attenuated by the VDE-designed DM filter occurs at 2f s (100kHz), while for CISPR it occurs at 4f s (200kHz), since the odd harmonics of the switching frequency are cancelled out when two converters are interleaved. The total power taken into account for calculation is still 6kW, resulting in 3kW per three-phase converter of the interleaved system. The results are also evaluated against the CCM boost rectifier [1] [2], included in this comparison to benchmark results. Since the total power for comparison is 6kW, each single-phase CCM boost rectifier has to handle 2kW. 1µF 5Ω R d 50µH LISN 50Ω 0.1µF 1µF L d L 1 L 2 L 3 Noise Source C 4 Fig. 8. Equivalent LISN and filter per phase: LISN and filter. Table 2. Filter parameters for 6kW non-interleaved single-stage AC/DC converters operated at 50kHz. CISPR 22 Class B System Lboost Rd Ld L 1 L 2 L 3 C 4 (µh) (Ω) (µh) (µh) (µh) (µf) (µf) (µf) TL-PS TL-A VDE 0871 Class B System Lboost Rd Ld L 1 L 2 L 3 C 4 (µh) (Ω) (µh) (µh) (µh) (µf) (µf) (µf) TL-PS TL-A Table 3. Parametric comparison for 6kW interleaved converters. CISPR 22 Class B System Lboost Rd Ld L 1 L 2 L 3 C 4 (µh) (Ω) (µh) (µh) (µh) (µf) (µf) (µf) TL-P TL-AS CCM boost VDE 0871 Class B System Lboost Rd Ld L 1 L 2 L 3 C 4 (µh) (Ω) (µh) (µh) (µh) (µf) (µf) (µf) TL-P TL-AS CCM boost

8 L 1 L 2 L 3 L 4 L 5 L 6 2N p 2N p T 1 N 1 N 2 N 2 T 2 N p 180V 220V 260V Fig. 9. Interleaving without duplicating power stage: circuit and interleaved current (5A/div and 3kW output power). Table 3 shows the results obtained from the calculation. The boost inductances represent the design values shown previously in Table 1. For the single-phase CCM boost rectifier, the boost inductance was designed to limit the peak-to-peak input current ripple to below 25% of the fundamental line frequency current. The total filter capacitance used per phase is the same because identical displacement factor was used in all designs. The major conclusions drawn from Table 3 are: For both CISPR and VDE standards, the two-channel interleaved converters reduced the filter inductance requirements (L d L 1 L 3 ) by 10 times, as compared to the non-interleaved cases; For VDE 0871, the filter parameters required for the interleaved systems operated at 50kHz are lesser than those needed for CCM single-phase boost rectifier; For CISPR 22, no inductances are required to attenuate DM noise generated by the CCM boost rectifier, while it is observed a significant reduction in filter inductance for interleaved systems; Although at 50kHz CCM boost rectifiers require no filter inductances to attenuate DM noise for CISPR, one has to observe that the boost inductor is larger than the equivalent inductor per phase used in the interleaved system; The results are extremely dependent upon switching frequency and standards used to design the EMI input filter. VII. INTERLEAVED SYSTEM WITHOUT DUPLICATING POWER STAGES Although interleaving of single-stage converters demonstrated significant filter size reduction, it requires the duplication of the power stage to cancel out input current ripple. To overcome this problem, this section presents an alternative solution to interleaved system that requires no duplication of the power stage. Fig. 9 shows the modification of the TL-PS singlestage AC/DC converter to provide ripple cancellation. This technique avoids total duplication of the power stage, while still requiring the duplication of the input diode bridge and the addition of transformer T 2 plus two auxiliary windings to work as magnetic switches in order to control three of six boost inductor currents. Although the input bridge is duplicated, only half of the current rating is required for the same power level, as compared to Fig. 2. The VA capability of the auxiliary transformer is about 90% of the main transformer. At 50kHz, the main transformer used was implemented using an E65/27 ferrite core, while the auxiliary transformer used an E55/21. The boost inductors L 4,L 5 and L 6 operate as described in previous work [7]. The auxiliary windings of T 2 provide means of phase-shifting the currents in L 1,L 2 and L 3 by 180 o with respect to currents in L 4,L 5 and L 6, resulting in input current ripple cancellation. Fig. 9 shows the interleaved current i L1 i L4 measured at different input voltages and full output load (3kW). As can be observed, effective ripple cancellation is achieved by interleaving the input currents. VIII. CONCLUSION This paper presented approaches to achieve single-stage AC/DC power conversion. The proposed topologies are operated under zero-voltage switching and provide automatic input current shaping. A comparison between two topologies demonstrated that both presented similar intermediate bus voltage stresses. In both cases, the threelevel structure helped reduce the voltage applied across the power switches. The harmonic distortion measured from the TL-PS converter was well below 10%, despite the simplicity of the approach. However, its efficiency was 1-2% lower than that of the TL-AS converter, since the conduction loss in the latter is reduced as previously discussed. The interleaving of two single-stage converters demonstrated significant reduction of DM input filter size. Particularly, the calculation results demonstrated 10 times reduction in filter inductance requirement, as compared to the non-interleaved case. This paper also presented an alternative approach to simplify interleaving of single-stage converters without totally duplicating the power stage. REFERENCES [1] D.Chapman,D.James,andC.J.Tuck, Ahighdensity48V200A rectifier with power factor correction, in INTELE993, pp

9 [2] M.L. Heldwein, A.F. Souza and I. Barbi, A Simple Control Strategy Applied to Three-Phase Rectifier Units for Telecommunications Applications Using Single-Phase Rectifier Modules, in PES999, pp [3] P. Barbosa, F. Canales and F.C. Lee, A Distributed Power Systems for Medium Power Applications, in IA000. [4] J. Contreras and I. Barbi, A Three-Phase High Power Factor PWM ZVS Power Supply with a Single Power Stage, in PES994, pp [5] P. Barbosa, F. Canales and F.C. Lee, Analysis and Evaluation of the Two-Switch Three-Level Boost Rectifier, in PES001. [6] F. Canales, P. Barbosa and F.C. Lee, A Zero-Voltage, Zero-Current Three-Level DC/DC Converter, in APE000. [7] P. Barbosa, F. Canales and F.C. Lee, A Three-Level Isolated Power Factor Correction Circuit With Zero Voltage Switching, in PESC 2000.