"Low Cost Electroless Bumping for Ultra Fine Pitch Applications in 8" and 12" Wafers"

Transcription

1 1 "Low Cost Electroless Bumping for Ultra Fine Pitch Applications in 8" and 12" Wafers" Elke Zakel, Thomas Oppert, Ghassem Azdasht, Thorsten Teutsch * Pac Tech Packaging Technologies GmbH Am Schlangenhorst 15-17, Germany Phone:+ 49 (0) 33 21/ Fax: + 49 (0) 33 21/ zakel@pactech-usa.com URL: *Pac Tech Packaging Technologies USA, Inc. 328 Martin Avenue, Santa Clara, CA 95050, USA Phone: Fax: teutsch@pactech-usa.com URL: Abstract This Paper gives an overview on the history and development of electroless NiAu as low cost bumping technology in industry. The applications in the first phase of production implementation of electroless Ni/Au were focused on wafers with Al-Pads and Ni/Au as UBM or bump material. The second phase of implementation is focusing on low k wafers with copper pad metallization, and the needs of a low cost final pad finish for thermosonic wire bonding. This opens new dimensions for this technology: as alternative to the sputtered Al- layer, electroless Ni/Au can be used. Moreover it shows a new application of this technology as a pad metallization, suited for TS-wire bonding. We have developed a process and implemented this in a 300 mm automatic production line. The process steps and its implementation in a pilot production line will be presented in this paper. I. Introduction Short history of Electroless NiAu for Wafer Level Bumping and Wire Bond Pad Metallization Starting with scientific publications on basic feasibilities and parameter studies back in 1985, electroless NiAu was first shown on active wafers in The first implementation of the electroless Ni/Au bumping technology into a pilot production line was in 1995 /1-3/. From this start point of implementation in production processes, the technology has spread over mainly to subcontractor wafer foundries, but also to semiconductor manufacturers. Today this technology is a mature technology in use for: a) products which are under extreme price pressure, like smart cards, smart labels, RFID applications, b) ASICS, LCD drivers, automotive power MOS, c) discrete diodes and transistor circuits, but also for d) memories and memory modules. The status of production implementation can be summarized with worldwide at least 15 production sites located at subcontractors and in wafer fabs.

2 2 The main application in production today is on wafers with standard Al pad metallization. The application of the electroless Ni is ranging from UBM with subsequent solder ball application using different methods, such as solder ball attach and printing or bump technology as low cost replacement to the electroplated Au. Main applications in Flip Chip here are ACF and NCP attach for RFID cards and LCD drivers. Table 1 shows an overview of the worldwide implementation of electroless NiAu for Al pad bumping today. USA: - 2 subcontractor bumping facilities - 3 wafer foundries Europe: - 1 subcontractor facility - 3 wafer foundries Asia: - 3 subcontractor facilities - 4 wafer foundries Table 1: Worldwide Implementation of Electroless Ni Au for Al Pad II Technologies for Bumping on Al_Pad Figure 1 shows the comparison of electroless plating with the other bumping technologies which are state of the art today. Comparison of Bumping Technologies Evaporated Bump Sputtered UBM + Plating Sputtered UBM + Print (FCT) Electroless UBM (+) Print or Ball Attach PACTECH In comparison of technologies we have to distinguish between two types of bumps: a. bumps for solder attach b. Hard core bumps for adhesive attach. From the technologies presented in Figure 1 only electroplating and electroless plating can cover both areas of solder bump and hard core bump applications. The evaporation technology based on the C4 process as well as the combined sputtered UBM and printed solder bump can only produce solder bumps for the flip chip solder attach /1-4/. The main advantage of the electroless process is with regard to cost and throughput /4-9/ Disadvantages of the technology are mainly related to pitch limitations. These apply especially for the solder attach technology /10-11/ Figure 3 shows the combination options of the technologies for the manufacturing of solder bumps. The stencil printing process allows a minimal pitch in production of 200 µm.the pitch limitation can be overcome by using microball placement technology. Minimal pitch for this technology is 100 µm. With the technology available to manufacture solder ball diameters of 30 µm, this technology has not yet met effective physical limitations, allowing roadmaps of 60 and 50 µm pitch in a 1 to 2 years timeframe /11/ Options in Wafer Bumping Process C4 Au Ni/Au Figure 1: Comparison Electroless Plating with other Bumping Technologies source: Nippon Steel Figure 2: Overview of UBM and bump deposition technologies

3 3 Figure 3 shows a typical application for solder bump on electroless UBM for mobile phone high frequency application. Many applications are using pad designs, which allow wafer level CSP-layouts built in the ICdesign, without requiring an additional redistribution layer. The minimal pitch of electroless Ni/Au technology for use in bumping is not limited by physical or chemical deposition process. Electroless NI/Au can be used on wafer level for submicron Via filling. Today state of the art is a pitch 50 µm migrating to 40 µm as shown in Figure 4. Application I Mobile Phone Figure 3: Bump on electroless UBM with built in wafer level CSP design Ultra Fine Pitch Bumping III MetallizationTechnologies for TS-wire bonding on copper pads of low k wafers The implementation of electroless Ni/Au plating to wafer level technology is associated with technological developments for the thin wafer metallizations ( µm) and for small pad geometries (5-100 µm). For this a suited chemistry for Al and Copper pad has been developed. Figure 5 shows the process flow for both pad metallizations. The main focus is on a suited adapted pretreatment, which provides for both metallizations following functions: a) chemical removal of the pad specific metal oxides and passivation residues b) microetching of the pad surface for enhanced adhesion of the Ni/Au layer c) deposition of a catalytic metal as preparation for the electroless nickel plating. In order to achieve this, the pretreatment of Al and Cu is differing in the specific adapted chemistry. For Aluminum pads, a pretreatment based on an alkaline or acid Zinkate pretreatment has been developed (Figure 5). For Copper pads a pretreatment based on a catalytic Palladium pretreatment is best suited (Figure 6). Electroless Ni/Au on Alumium Pad Backside Coating Aluminum Cleaning Zincate Pretreatment Electroless Nickel Immersion Gold Pitch: µm Coating Removal Figure 4: Ultra Fine Pitch bumping using electroless Ni/Au process. Figure 5: Process flow for electroless Ni/Au deposition on Aluminium Pad

4 4 Electroless Ni/Au on Copper Pad Electroless Bumping Process for 300 mm wafers Backside Coating Copper Cleaning Palladium Pretreatment Electroless Nickel Immersion Gold Coating Removal 300 mm Capability! 300 mm Capability! Figure 6: Process flow for electroless Ni/Au deposition on Copper Pad Besides the adapted pretreatment, special developments and qualifications were performed for a Ni/Au metallization suited for TS-wire bonding. The control of P- content in the Nickel deposit, the control for the electroless Au-plating thickness and porosity and last: the elimination of the contaminations on the Ni/Au surface by adapted rinsing techniques are the key parameters for reproducible process. Costwise, electroless plating is competing with the process of Al- remetallization on Cu-Pads, which is in use today. Cost models for the electroless pad metallization show process costs below 10 US$ per wafer in mass production. This is due to the low investment cost and the extremely high throughput of this technology. An additional factor is the lower cleanroom cost, since the process can be installed in a cleanroom class 1000 to depending on minimal pitch and pad geometries. IV Electroless Microplating on 300 mm Wafers The plating line developed for 300 mm wafer electroless Ni/A is compatible for Al and Cu Pad. It has a capacity of 25 wafers -300 mm per batch (50 wafers- 200 mm per batch) and a throughput of 75 wafers- 300 mm (150 wafers 200 mm) per hour. Figure 7: Electroless Plating line for 300 mm wafers (Cu and Al-Pad) For this high throughput, the automatic wafer handling and automatic bath analysis and replenishments are of essential importance. Additionally an optimized micro-convection for the chemical steps and for the rinsing steps is required for homogeneous and uniform deposits. Figure 8: Example of automatic Nickel control and replenishment for 300 mm line V Summary After accumulating production experience for nearly 10 years, the process of wafer level deposition of electroless Ni/Au is now ready to move to the next step of 300 mm and Copper pad metallization. This technology can fulfill a dual function as UBM and pad finish for TS wire bonding on Copper pad. This is widening the application area and moving this process

5 5 from a backend process towards a front end low cost technology. After electroplating for the damascene Copper pad process, electroless Ni/Au will be the next wet chemical technology to be implemented in the back-end area of wafer fabs before testing. Since it is closely related to the testing, an implementation at the wafer fab and not in the subcon- backend area is technical necessary. We have to find a new terminology for this hybrid area in the fab. One major advantage by using electroless Ni/Au as final pad metallization, is the option, to provide the end customer one uniform final metallization for bumping and for wire bonding. This allows a significant simplification and a new standardization in the process flows for flip chip and wire bonding. Coatings Technology (1999) /7/ Pac Tech Webpage: /8/ T. Teutsch, T. Oppert, E. Zakel, E. Klusmann, H. Meyer, R. Schulz, J. Schulze, Wafer Level CSP using Low Cost Electroless Redistribution Layer Proceedings of IEMT/ IMC Symposium, Omya, Japan, April 19-21, 2000 /9/ E. Zakel, T. Teutsch, R. Blankenhorn, Cost Effective 300 mm Electroless Wafer Bumping, Chip Scale Review, /10/ T. Oppert, L. Titerle, E. Zakel, G. Azdasht, T. Teutsch, Placement and reflow of solder balls for FC, BGA, Wafer-Level-CSP, Optoelectronic Components and MEMS by using a new solder jetting method, to be published in the Proceedings of the International Microelectronic And Packaging Society (Denver, Colorado), Sept , 2002 /11/E. Zakel, T. Teutsch, G. Frieb, G. Azdasht, J. Kurz Jetting in Advanced Packaging, EMAPS 2003, Friedrichshafen, June 2003 References /1/ K. Puttlitz, P. Totta, Area Interconnection Handbook, Chapter 2: Wafer Bumping, Kluwer Academic Publishers, 2001 /2/ De Haven, Dietz, Controlled Collapse Chip Carrier (C4) an Enabling Technology, Proceedings of the 1994 Electronic Components and Technology Conference (44 th ECTC), Washington D.C., pp /3/ L. F. Miller, Controlled Collapse After Reflow Chip Joining, IBM J. Res. Develop., Vol. 13, pp , May, /4/ T. Oppert, T. Teutsch, E. Zakel, D. Tovar A Bumping Process for 12 mm Wafers, Proceedings of the IEMT Symposium, (24 th IEMT), Austin TX, 1999, pp /5/ T. Oppert, E. Zakel, T. Teutsch A Roadmap to Low Cost Flip Chip and CSP using Electroless NiAu Proceedings of the International Electronics Manufacturing Technology Symposium, Omya, Japan, 1998 /6/ T. Oppert, T. Teutsch, E. Zakel, D. Tovar A Bumping Process for 300 mm Wafers, Proceedings of the HDI Conference, Phoenix AZ, September 25-27, 2000 /7/ R. Heinz, E. Klusmann, H. Meyer, R. Schulz, PECVD of transition metals for the production of high-density circuits, Surface and Coatings Technology (1999)