MICRO BALL BUMPING PACKAGING FOR WAFER LEVEL & 3-D SOLDER SPHERE TRANSFER AND SOLDER JETTING

Transcription

1 MICRO BALL BUMPING PACKAGING FOR WAFER LEVEL & 3-D SOLDER SPHERE TRANSFER AND SOLDER JETTING Thomas Oppert 1, Thorsten Teutsch 2, Ghassem Azdasht 1, Elke Zakel 3 1 Pac Tech Packaging Technologies GmbH Nauen, Germany, oppert@pactech.de 2 Pac Tech Asia Sdn. Bhd. Penang, Malaysia, teutsch@pactech.com 3 Pac Tech USA Inc. Santa Clara, California, USA, zakel@pactech.com ABSTRACT The miniaturization in electronics is driven by size reduction and cost, however by increasing the technical performance of the device. In regard to wafer level applications flip chip technology is still one of the interconnection methods with the potential of highest integration and cost savings. For applications other than on wafer level, 3- dimensional packages like e.g. camera modules, read-write heads for hard disk drives and various other applications a solder jetting method using solder ball diameters down to 30µm is used. To explore this potential, cost-efficient solder bumping technologies for the processing of flip chips on wafer level as well as for 3-dimensional devices have been developed and qualified. The research has shown that the underfill process is one of the most crucial factors when it comes to Flip Chip miniaturization for high reliability applications. Therefore, high performance underfill material was qualified initially [1]. Wafer level solder application has been done using wafer level solder sphere transfer process against what solder sphere jetting technology was used for other applications than wafer level. Wafer level solder sphere transfer technology uses a patterned vacuum tooling fixture to simultaneously pick up preformed spheres and transfer them all over the wafer at once. The latter is a technique that drops a preformed solder sphere onto the bond pad while simultaneously reflowing the ball in-place using a laser. This tool has been used for many years in the industry, it is commonly known in the industry as a solder ball bumping tool. For the described work the process was scaled down for processing solder spheres with a diameter down to 30 µm. INTRODUCTION The miniaturization of electronic packages is driven by a large variety of applications with high requirements on the level of integration and the form factor. This will be conducive to higher I/Ocounts and a reduction of the pitch, which has an effect on the production systems as well. Due to size reduction and cost saving potential, Flip Chip technology has gained importance in the field of highly miniaturized electronic devices. The primary aim of the experimental study presented in this paper was the bumping of Flip Chips with 100µm pitch and solder spheres down to 30µm in diameter and the assembly of the dies using standard production equipment. This makes the process chain from wafer bumping to Flip Chip assembly and underfill very cost efficient and flexible even for small quantities. The secondary aim was to transfer and to use the processes resulted out of the experimental studies for applications other than wafer level like e.g. 3- dimensional packages. Specific bumping processes have been established in recent years. Common methods for applying solder onto the semiconductor wafer are for example stencil printing [2], electroplating [3][4], and C4NP [5]. The most important requirements for bumping are a high yielded, fast and cost efficient process as well as, in many cases, low tooling costs. Stencil printing is a very productive process. However, this process is limited in regard to pitch and bump sizes considered in this paper and is therefore not suited. Commonly used for high bump counts per wafer and ultra fine pitches is the electroplating process. Due to the complex processes and mask manufacturing, the electroplating bumping technology is very expensive, especially for small wafer quantities.

2 Specific bumping processes have been established in recent years. Common methods for applying solder onto the semiconductor wafer are for example stencil printing [2], electroplating [3][4], and C4NP [5]. The most important requirements for bumping are a high yielded, fast and cost efficient process as well as, in many cases, low tooling costs. Stencil printing is a very productive process. However, this process is limited in regard to pitch and bump sizes considered in this paper and is therefore not suited. Commonly used for high bump counts per wafer and ultra fine pitches is the electroplating process. Due to the complex processes and mask manufacturing, the electroplating bumping technology is very expensive, especially for small wafer quantities. The most critical cost factor of the C4NP process is the use of molds, since these impact directly the per wafer bumping costs. Therefore is the C4NP process too expensive for small wafer quantities as well. Due to those reasons, different solder bumping techniques have been refined for the usage of micro solder balls, the Wafer Level Solder Sphere Transfer Process (WLSST) [6][7][8] and the Solder Sphere Jetting Process (SB 2 ) [9][10][11][12]. a. b. c. d. Vacuum WAFER LEVEL SOLDER SPHERE TRANSFER (WLSST) The WLSST technology uses a patterned vacuum tooling fixture to simultaneously pick up preformed spheres and transfer them all over to the wafer at once. Figure 1 outlines the basic steps in the transfer process. First, a tooling plate (vacuum stencil) is lowered into the sphere reservoir. Vacuum is applied to the tooling plate to selectively pick up the spheres. This fixture is then inspected for missing or extra spheres. The tooling is then aligned to the wafer and lowered to bring the solder spheres into contact with the wafer pads. Finally, the vacuum is turned off; the tooling plate is raised, and the solder spheres are reflowed. The tooling plate is patterned with openings that correspond directly with the UBM so the location of the I/O pads on the wafer. This tooling is created using similar methods to that of making a nickelplated surface-mount stencil. Because this tooling plate can be made with such accuracy and because the WLSST equipment has a placement accuracy of better than ±10µm, the process can be used for both WLCSP and Flip Chip applications. e. Figure 1. Wafer Level Solder Sphere Transfer (WLSST) Process Flow. a. Pick Up Spheres: Lower vacuum tooling head into sphere reservoir and apply vacuum to tooling, b. Inspect and Align: Inspect for missing and extra spheres in the stencil and align to wafer (a pre-fluxed wafer is automatically placed onto the wafer chuck just prior to each solder sphere transfer operation), c. Mate Spheres to Wafer: Lower tooling head and bring spheres into contact with the fluxed wafer pads, d. Raise Tooling Head: Turn off vacuum and raise vacuum tooling,

3 e. Remove Wafer and Reflow: Automatically transfer wafer to reflow station. When choosing one of the various bumping technologies (process flow and equipment) for creating solder bumps for either Flip Chip or for WLCSP applications, there are several operations in addition to the solder deposition process that should be considered. These include under-bump- rework, metallurgy (UBM), fluxing, reflow, cleaning, and inspection. For most of the traditional bumping technologies, these are discrete operations and therefore require distinct and separate tools for each process step. The Wafer Level Solder Sphere Transfer tool combines several of these operations into a single tool and that can lead to higher throughput, higher yields, and lower costs. Within the study, solder balls with a diameter of 40µm were successfully processed using the WLSST technology, by placing them on pads with an electroless UBM [13], in a pitch of 100µm. Figure 2. 10x10mm Flip Chip with 40µm solder balls. Magnification left picture: 20x, right picture: 100x Experiments in regard to place solder balls with a diameter smaller than 40µm have shown that the WLSST process is not suitable so far. The major reason for this is that for e.g. 30µm solder balls a stencil with homogeneous openings of about 15µm in diameter is needed. Various methods of manufacturing a stencil with such small openings were investigated, but as of today no stencil manufacturer was able to deliver a stencil which fulfills the needed specifications. In conclusion, the bottleneck in continuing experiments is the lack of the availability of a suitable stencil with the needed quality. Therefore, the Solder Sphere Jetting (SB 2 ) Process has been used for solder ball diameters smaller than 40µm, for this study explicitly 30µm. SOLDER SPHERE JETTING (SB 2 ) The solder sphere jetting technique uses a laser based process which drops a single solder sphere onto the bond pad and a laser beam reflows the solder just as it reaches the pad. This process has no mechanical contact with the wafer and is fluxless, thus eliminating any chemical interactions with the device [15][16] or need for protective resists. Solder bumps are deposited at a rate of 6-8 spheres per second. All major solder alloys including gold-tin can be deposited by adjusting the parameters of the machine. Singulation Unit Optical Sensors Reflowed Solder Ball N 2Gas Nd +3 YAG Laser BGA Package SB 2 Bondhead Optical Sensor Vacuum N 2 Capillary BGA Pad Figure 3. Schematic diagram of the solder jet bumping process and the actual machine jetting solder spheres on a wafer Within this study Sn96.5Ag3Cu0.5 solder balls with a diameter of 30µm have been used and the capability of the solder jetting process has been proven successfully. Other alloys like e.g. Pb95Sn5, Au80Sn20 and various low temperature alloys of SnBi and InSn were investigated as well. However, such tiny balls made out of those non-standard alloys are difficult to get. Most of the solder ball manufacturers are not very keen in doing this for low quantities. Therefore evaluations on those special solder alloys were done for ball sizes > 60µm so far. Figure 4. 10x10mm Flip Chip with 30µm solder balls. Magnification left picture: 100x, right picture: 1000x Beside the solder jetting on wafer level other applications were investigated and are shown in figures 5-7 and Especially 3- dimensional packages like e.g. camera modules for mobile phones, microoptics and others.

4 method and a finished solder connection of camera module terminals. Figure 5. Stacked die - Connection of two wires with solder jetting Figure 8. Schematic on camera module corner ball bonding by using the solder jetting process Figure 6. Memory die - Connection of wire to substrate with solder jetting Figure 7. Solder jetting on microoptics and Hard Disk Drives Figure 9. Camera module terminal Solder Jetting on Terminals in camera modules are requiring three- Until now dimensional solder joint interconnection. this was done by manual soldering. However the further miniaturizations of the technology together with tight tolerances in geometrical accuracy require a new process. Therefore a 3D laser assisted solder jetting technology was developed which was adapted to specific needs of camera modules. By use of laser assisted in situ soldering, the solder spheres provide a mechanical and electrical 3D interconnection. The developed equipment is applying lead free solders balls interconnection between camera module terminals and cubes. Camera modules have a two set of terminals for solder joints located on a bottom side that provide electrical and data transaction between the camera module and circuit. The two terminals unit modules have an open soldering area of overall <1mm,Nickel silver or gold coated pad on base and two sidewalls for lead free soldering interconnections. Flux less laser solder jet bumping process was designed for prototype application with controled solder volume and desired bump hight. The technology was confirmed to be effective for 3D prototype Micro soldering of camera cubes and being enable for all types of chip scale camera modules (CSCM) imaging data transmission circuit devices. Figure 8, 9 and 10 are showing drawings of the solder jetting Figure 10. Finished connection after solder jetting RELIABILITY After the assembly of the test vehicles with 40µm and 30µm solder balls onto thin film ceramic substrates reliability tests according MIL- STD883G, method and MIL ST883G, method , condition B were performed. Figure 11 to figure 13 show assemblies after dry heat storage at 125 o C and after 6000 temperature cycles between -55 o C and 125 o C, respectively, for Flip Chips with 40µm and 30µm solder balls.

5 Figure 11. Cross section of a Flip Chip with 40µm solder balls on thin film ceramic after 1000h dry heat Figure 12. Cross section of a Flip Chip with 40µm solder balls on thin film ceramic after 8000 temperature cycles -55 o C/+125 o C. No cracks could be found, IMCs are clearly visible Figure 13. Cross section of a Flip Chip with 30µm solder balls on thin film ceramic after 1000 temperature cycles -55 o C/+125 o C. No cracks could be found, IMCs are clearly visible CONCLUSIONS In this work two different solder ball bumping methods were refined and improved for being able to reliable and reproducible handle such micro solder balls. Package reliability tests for Flip Chips with emphasis on tests according to MIL STD883G, Method , condition B have been successfully passed. Temperature cycles tests up to 8000 temperature cycles between -55 o C and +125 o C showed excellent results and are still ongoing. Results of the EDX analysis of solder joints after 6000 temperature cycles between -55 o C and +125 o C revealed that there is still ductile solder in the center of the solder connection. This is one of the reasons for the excellent long-term reliability, especially during temperature cycling. With the achieved results and innovations, future demands in regard to next generation Flip Chip products for the medical [14], optoelectronics [15][[16], microwave [17], and mobile [18] applications can be met. The technology is well suited for silicon die stacking and for 3-D packaging [4][19]. References 1. Dohle, R., Schu ßler, F., Friedrich, T., Goßler, J., Oppert, T., Franke, J., Adapted Assembly Processes for Flip Chip Technology With Solder Bumps of 50 µm or 40 µm Diameter, Proceedings 3 rd Electronic System-Integration Technology Conference (ESTC), Berlin, September Manessis, D., Patzelt, R., Ostmann, A., Aschenbrenner, R., Reichl, H., Technological advancements in Lead-free Wafer Bumping using Stencil Printing Technology, European Microelectronics and Packaging Conference 2005, Brugge, pp Yu, A. et al., "Study of 15µm Pitch Solder Microbumps for 3D IC Integration," 2009 Electronic Components and Technology Conference, San Diego, California, 2009, pp Hong, S.J., Jun, J.H., Jung, J.P., Mayer, M., Zhou, Y.N., Sn Bumping Without Photoresist Mould and Si Dice Stacking for 3- D Packaging, IEEE Transactions on Advanced Packaging, Vol. 33, No. 4, November Dang, B., Shih, D. Y., Buchwalter, S., Tsang, C., Patel, C., Knickerbocker, J, Gruber, P., Knickerbocker, S., Garant, J., Semkow, K., Ruhmer, K., Hughlett, E., 50 µm Pitch Pb- Free Microbumps by C4NP Technology," 2008 Electronic Components and Technology

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