Inspection of Flip Chip and Chip Scale Package Interconnects Using Laser Ultrasound and Interferometric Techniques

Transcription

1 Inspection of Flip Chip and Chip Scale Package Interconnects Using Laser Ultrasound and Interferometric Techniques Turner Howard, Dathan Erdahl, I. Charles Ume Georgia Institute of Technology Atlanta, GA Phone: Juergen Gamalski, Siemens AG, Berlin Achyuta Achari, Visteon Corp Abstract Inspection of solder bump interconnections is more difficult than conventional lead-frame solder connections because the solder joints are hidden from view. Current inspection methods, such as automated optical inspection (AOI), automated x-ray inspection (AXI) and acoustic micro imaging (AMI) have limited capabilities for inspecting the mechanical integrity of solder joints. A new noncontact, nondestructive inspection technique developed at Georgia Tech can evaluate the chip-to-substrate mechanical integrity by detecting missing solder balls; nonwetted (open), disbonded or cracked solder joints; and misaligned or cracked packages. In addition, this new technique may provide a nondestructive means to detect residual stress in the chip-substrate bond due to warpage or coefficient of thermal expansion mismatch. Pulsed laser energy excites a microelectronic component into vibration, and an interferometer measures its out-of-plane surface displacement. Defects in the solder joints or silicon chip itself cause measurable changes in the vibration response. Signal processing techniques are used to identify defects by comparing vibration signatures of tested devices to a reference, defect-free device. The long-term goal of this research is to develop a low-cost, high-sensitivity, accurate, fast, highly automated prototype system to demonstrate the use of this technique for online inspection, process development and failure analysis. This paper discusses the design and performance of the current inspection system, presenting specific results for a wafer-level chip scale package (CSP) and a flip chip. These results aid the discussion of system performance and limitations. Novel applications of this inspection technique and the expected impacts in microelectronics manufacturing and development are also discussed. The International Journal of Microcircuits and Electronic Packaging, Volume 25, Number 1, First Quarter, 2002 (ISSN ) 1

2 Key words Flip Chip, Chip Scale Package, Inspection, Solder Joint Reliability, Laser Ultrasound, And Interferometry 1. Background Flip chip and other wafer-level packages are becoming commonplace in the microelectronics industry and continue to gain broad acceptance with the introduction of lowcost package designs, a proliferation of solder bumping services and growth of manufacturing infrastructure for chip attachment. The use of flip chip and wafer-level chip scale packages (CSPs) is expected to increase significantly as many new products take advantage of their reduced size, increased performance and low cost. However, as these packages continue to shrink, reliable chip-to-substrate attachment is more difficult to attain. Smaller packages typically reduce the solder joint area by the square of the package reduction, which means the mechanical integrity of the attachment suffers [1]. In addition, increasing numbers of transistors per unit area in high performance devices increase the stress due to thermal loading. Both of these factors affect the reliability of devices in the field. Smaller packages with hidden solder joints are also more difficult to assemble and inspect. Many common manufacturing defects and field failures for devices using wafer-level packages are related to the bond between the chip and substrate, which serves as a crucial mechanical and electrical connection. Therefore, it is extremely important to monitor the quality of solder joints during the manufacturing process. Printed wiring board assembly (PWBA) manufacturers demand reliable inspection tools that not only find faults early in the manufacturing process to allow for cost-effective rework, but also identify reliability problems to prevent field failures. Current technologies, such as automated optical inspection (AOI), automated x-ray inspection (AXI) and acoustic micro imaging (AMI) fall short of meeting all of the solder joint inspection needs. AOI is limited to applications with a direct line of sight, rarely the case for wafer-level packages that have solder joints between the chip and substrate. AXI has progressed dramatically in recent years through advances in x-ray laminography and improvements in image resolution, enabling detection of smaller defects. However, inline units are very expensive and have much lower resolution than the x-ray equipment commonly found in failure analysis laboratories. The lower resolution results from the short cycle times demanded by online inspection [2]. In addition, AXI may not be capable of detecting some common defects like nonwetted (open) or disbonded joints, or fine cracks in the solder joints that may affect reliability. For example, small bond pad sizes on the substrate cause the solder joints to have a bumped appearance that is almost indistinguishable from a nonwetted bump, making AXI ineffective [2]. Since small air gaps are not detectable with AXI, disbonded solder joints or fine cracks may escape notice as well. AMI has only recently become available for high throughput manufacturing applications. These production inspection systems are claimed to have the same resolution as laboratory models without the need to immerse samples in a fluid couplant [3]. Instead the transducer is coupled through a continuous stream of fluid that pours over the parts as they are fed through the machine in trays. These new systems represent a significant advance in AMI technology to meet production inspection needs. However, AMI has a limited ability to identify defects that affect chip-to- 2

3 substrate bond integrity. Residual stress in the chip-substrate assembly due to warpage or mismatch in the coefficients of thermal expansion (CTE) weakens the chip-substrate bond and is thought be a major cause of unexpected cracking or delamination [1]. Currently, only destructive techniques like shear tests can measure the strength of the chip-substrate bond to quantify the effects of residual stress. Although AMI is able to detect physical contact between layers in multilayered devices, it cannot measure the strength of the bonds, and fluid contact with parts may be undesirable in some applications. 2. Laser-Induced Vibration Technique A new noncontact, nondestructive inspection technique developed at Georgia Tech can evaluate the chip-to-substrate mechanical integrity by detecting missing solder balls; nonwetted (open), disbonded or cracked solder joints; and misaligned or cracked packages. The technique uses pulsed laser energy to excite a microelectronic component into small-scale structural vibration and an interferometer to measure its out-of-plane surface displacement. Defects in the solder joints between the package and substrate, and in the silicon chip itself cause measurable changes in the vibration response. Signal processing techniques are used to identify defects by comparing vibration signatures of tested devices to a reference, defect-free device. In addition, this new technique may provide a nondestructive means to detect residual stress in the chip-substrate assembly. Residual stress due to warpage or CTE mismatch after reflow causes internal forces between the chip and substrate. These forces may be detectable as measurable changes in the vibration response, making this technique a candidate for nondestructive reliability testing. 3. Experimental Procedure A sketch of the experimental inspection system is shown in Figure 1. Short Nd:YAG laser pulses of approximately 6 ns with a wavelength of 1064 nm are delivered to a device through one or more fused-silica glass fibers with a 1.0 mm core diameter. Typical pulse energies range from mj. Because the energy emerging from the fiber end diverges, the fiber is positioned very close to the device at a 45 angle to allow vibration measurement access from above. The elliptical excitation spot striking the surface of the test device has an approximate energy density of J/ cm 2. A heterodyne interferometer with a bandwidth from 25 khz to 20 MHz measures the out-ofplane surface displacement at selected points on the device with a fiber-coupled probe capable of focusing the interferometer beam to a minimum 3 mm spot size [4]. The resolution of the highly sensitive interferometer is only limited by signal noise, which is diminished through optimal probe focus, and signal averaging triggered on repetitive Nd:YAG pulses. The analog interferometer signal is sampled with a 12-bit data acquisition card at 10 or 25 MHz. Data is typically acquired for ms. An X-Y scanning stage is used to position the test device under the interferometer probe for measurement at selected points. Vacuum fixtures hold the device in place and allow rapid manual alignment of the excitation fiber to the test device. To improve the alignment of the measurement probe to device features, a vision system is used to locate fiducials on the device. Control of many system functions including detection point scanning, and data acquisition and analysis is coordinated with a PC. In a typical experiment, the excitation laser is warmed up for at least 30 minutes to ensure 3

4 Interferometer Vision Sensor Nd:YAG Laser Fiber PC: Control and Analysis Vacuum Fixtures X- Y Scanning Stages Test Device Figure 1. A schematic of the laser-induced vibration inspection system maximum pulse-to-pulse energy stability. A device is loaded on the scanning stage, and a fiducial on the device is located using the vision system. The excitation fiber is aligned manually to the center of the device, and the pulsed laser is then operated continuously with a 10 Hz repetition rate. Multiple measurements of the vibration response at each detection point are averaged to obtain clean, highresolution waveforms. These waveforms are compared to waveforms from a defect-free device using frequency spectral analysis or time-domain error calculations (error ratio) to identify the presence of defects. The results presented in the following sections focus on an error ratio calculation, although frequency domain analysis has been discussed previously [5]. 4. Inspection Results for a CSP and Flip Chip The following sections give a brief overview of the results from practical application of this new inspection technique to two wafer-level packages: a CSP on an organic substrate and a flip chip without underfill on a ceramic substrate. The results presented here focus on specific defects that were detected from measurements of several of each type of device. 5. CSP Tests The wafer-level CSP studied is approximately 7 mm square and 0.7 mm thick. The device has 98 I/O connections in a 10 by 10 array with a 0.5 mm pitch and 0.3 mm diameter solder bumps. A top view of this CSP is shown 4

5 in Figure 2, highlighting the location of the solder balls, excitation spot and detection points. The pattern of detection points was selected to measure the vibration response centered above a cluster of four solder joints, creating an array of 5 by 5 detection points. Two points labeled A and B in Figure 2 were not measurable due to interference by the fiber used to deliver pulsed laser energy. A fine detection point mesh was used in the upper right corner on some devices to aid in the detection of a missing solder ball in that location. A total of seven CSPs mounted on the same organic substrate were tested. Four of these CSPs were assembled under optimal conditions to provide defect-free specimens, two CSPs were intentionally misplaced by one row or column, and one CSP was assembled with one missing solder bump in the upper right corner of the array. Two defect-free CSPs are compared in Figure 3 to establish a baseline. The plot shows the error ratio between the measured waveforms from the two CSPs at each detection point. The error ratio is a fast and simple way to compare two waveforms by calculating the total squared error between the waveforms and then normalizing by one waveform chosen to be the reference as shown in Equation (1). 2 [ f ( t ) r( t )] dt Error ratio = 2, (1) [ r( t) ] dt where f(t) = measured waveform r(t) = reference waveform Low values of error ratio mean that two waveforms are very similar. The scale of the error ratio depends on the device being tested and should only be used for relative comparisons between similar product types. This simple calculation and its application are discussed further in [6], however, previous results were reported using a slightly different calculation that does not use squared terms. Squaring the terms in Equation (1) helps accentuate the differences between waveforms leading to higher defect sensitivity. The error ratios for the baseline comparison in Figure 3 are relatively low and uniform with an average value of approximately Figure 4 shows a comparison of a chip misaligned by one column to the right (positive x-axis) and a defect-free chip. The effect of this misalignment can clearly be seen in Figure 4 where error ratios are as large as 0.10 (15 times larger than the baseline). The maximum error ratios between the reference and misaligned chips occur along the right and left edges where the constraints between the chip and substrate have changed most dramatically. This saddle shape of the error ratio data gives a strong indication of the type of defect present. The data for a chip shifted along the y-axis (not shown) form a similar saddle shape along the x-axis, indicating that this inspection technique can not only determine if a chip is misaligned but also in which direction the misalignment occurs. Figures 5 and 6 show comparisons of a reference CSP and a CSP with a missing solder ball in the upper right corner. The effect on the vibration response is evident in Figure 5 where the error ratio in the region of the defect is approximately in comparison to the baseline error ratio of (nearly four times larger). Figure 6 shows a fine-mesh detection pattern in the region of the defect and reveals an even more dramatic difference in the waveforms. The results presented for this 98 I/O waferlevel CSP indicate that this inspection technique is capable of detecting misaligned chips and missing or disconnected solder balls. 5

6 Solder Ball Excitation Spot Detection Point Y Axis A B Ø 0.3 mm 0.5 mm X Axis Figure 2. The 98 I/O CSP was excited at its center and vibration measurements were taken as shown Error Limit y (mm) x (mm) Figure 3. The comparison of two defect-free CSPs reveals relatively low error ratio values 6

7 y (mm) x (mm) Figure 4. The comparison of a misaligned CSP to a defect-free chip gives high error ratio values Error Limit Error Limit y (mm) x (mm) Figure 5. The effect of a missing solder ball is evident by the higher error ratio near the defect 7

8 Error Ratio Y (mm) X (mm) Figure 6 The fine-mesh inspection around the missing solder ball reveals a noticeable trend With improvements to overall system sensitivity, this technique may be refined to detect smaller defects or defects in components with higher I/O counts. The following section describes results for a flip chip and one method that shows promise for increasing the sensitivity to certain defects the use of fiber arrays to increase energy absorption. 6. Flip Chip Tests Previous work with a 14-ball flip chip showed that this inspection technique could readily detect a number of defects including one missing solder ball [6]. However, greater sensitivity is desirable to find defects in higher I/O count devices. One way to increase the defect sensitivity is to use a fiber array to excite the device into vibration. An array allows more energy to be absorbed by the device without exceeding the ablative threshold at a single point. Figure 7 shows the location of the two fibers used to create an array. The fiber cores were positioned as close together as possible and centered over the flip chip. Surface vibrations were measured at four points labeled A, B, C and D. The flip chip measures 3.02 mm by 2.28 mm and is 0.55 mm thick. The 330 mm diameter solder bumps are labeled 1-14 in Figure 7. Three chips are shown in the composite of x- ray and microscope images in Figure 8. Chip 1 is designated the reference chip, Chip 2 serves as a control and Chip 3 has one missing solder ball near inspection point A. These chips were first tested with a single excitation fiber centered on the chip, using the same procedure described in previous work 8

9 Excitation Spots 1 D A C 14 B Solder Ball Detection Point Figure 7. The flip chip was excited at its center, and vibration measurements were taken at the center of each quadrant Chip 1 Chip 2 Chip 3 Chip 1 Chip 2 Chip 3 Missing Solder Ball Missing Solder Ball Figure 8 X-ray and microscope images show one missing solder ball beneath Chip 3 9

10 [6]. The waveforms from Chip 2 and Chip 3 were compared with the reference chip using the following error ratio calculation: f ( t ) r( t ) dt error ratio = r( t) dt, (2) where f(t) is the measured waveform, and r(t) is the reference. Equation (2) is used instead of Equation (1) for consistency with previous experiments on this 14-ball flip chip [6]. The error ratio values are plotted in Figure 9. For Chip 2, the lowest value is at point D, and the highest value is 0.17 at point C. These relatively low and uniform values indicate a good match between the two defectfree chips (Chips 1 and 2). The largest error ratio value for Chip 3 is 0.77 at inspection point A. The other values for Chip 3 lie in a range of 0.30 to The error ratios for Chip 3 are considerably higher than the values calculated for Chip 2 almost 7 times higher at point A indicating the presence of the defect near detection point A. These results show the same trends seen in earlier tests using a single excitation fiber [6]. 7. Flip Chip Two-Fiber Array An extra fiber was added to the system, as shown in Figure 7, and the chips were tested using the same procedure. The addition of an extra fiber increased the amplitude of vibration and changed the shape of the waveforms. Figure 10 shows the waveforms recorded for Chip 1 at detection points A and D. The amplitude at each detection point was increased from 0.05 V at the first minima to 0.09 V, showing that the array effectively transmitted greater excitation energy to the samples. Secondary peaks deviating from the fundamental vibration signal show additional vibration modes excited with the array. This effect indicates a change in the power distribution of the system s vibration modes, providing greater opportunity for defects to change the vibration pattern since more modes are excited. The error ratio values calculated for Chips 1 and 2 using a two-fiber array are plotted in Figure 11. Points A and B are at 0.21 and 0.21 respectively, and points C and D are at 0.17 and Again, relatively low and uniform values indicate consistent measurement and a good match between the vibration signals. These values are slightly higher than with the single-fiber configuration, which may indicate more subtle differences between Chips 1 and 2. The error ratio values calculated for Chips 1 and 3 using a two-fiber array are also presented in Figure 11. All the values are higher than the single-fiber calculations. Point A has the highest value, 0.97, and the other values are in the range of 0.57 to The error ratio in the vicinity of the defective solder joint is much larger with the two-fiber excitation. The difference between the values for Chips 2 and 3 at detection point A is 0.76, which is almost as large as the total value calculated for detection point A using a single fiber. This greater difference indicates increased sensitivity to a missing solder ball when using a fiber array. 8. Discussion The long-term goal of this research is to develop a low-cost, high-sensitivity, accurate, fast, highly automated prototype system to demonstrate the use of this technique for online inspection, process development and failure analysis. This new technique is particularly 10

11 Figure 9. Error ratio calculations are used to compare Chips 2 and 3 with the reference chip Figure 10. Vibration responses are shown for Chip 1 using a single fiber and a two-fiber array 11

12 Figure 11. Error ratio calculations for a two-fiber array are used to compare signals from Chips 2 and 3 with the reference chip suited to high throughput applications because the vibration frequencies are high and attenuate quickly, and the laser delivery and vibration measurement systems are fast. Therefore, many measurements of the surface can be taken in a short time. Current research has shown that defects can be found using only a few measurement points on the surface of the chip, which makes the system faster than other techniques that require imaging the entire component [6]. In addition, pattern recognition techniques can be used to automatically identify defects making the system suitable for online, automated inspection [7]. This technique is noncontact, nondestructive and may provide a means to evaluate overall long-term chip-to-substrate bond reliability which is not possible with other automated inspection systems. 9. Limitations and Defect Sensitivity A key to understanding the defect sensitivity and limitations of this technology is to view the test procedure as vibration analysis of miniature mechanical systems. The presence of defects is determined indirectly by analyzing the effect of those defects on the structural vibration of the system. To achieve the highest possible sensitivity to various defects, the excitation source must be extremely consistent and highly repeatable measurements must be taken. System parameters, such as the number and location of measurement points, and the intensity and location of excitation energy must also be optimized to improve overall sensitivity. Assuming that an optimal system with negligible measurement errors is developed, the practical limits of resolution or defect sensitivity can be explored 12

13 experimentally. In addition to experimental studies, theoretical vibration models of microelectronic components based on finite element methods can be used to predict the vibration response of defective and defect-free chips [5]. These models will aid in optimizing the system performance and will help determine the practical limits of the inspection system. This inspection technique will also be limited to some extent by dimensional or material property variations in the components. These allowable manufacturing variations will affect the vibration response and may mask the effect of minute defects. Despite these limitations, this technology has significant potential for reliability testing, especially for low to medium I/O devices, such as the flip chip, wafer-level CSP, ball grid array (BGA), multi-chip module (MCM), chip capacitors and resistors, and conventional lead-frame packages. in this paper, the technique also has potential for inspecting chip resistors and capacitors, conventional lead frame packages [8], and many other components that are bonded to a printed wiring board. 11. Acknowledgements The authors and the Laser Ultrasonics Research Lab (LURL) would like to thank Mr. Jay Baker, Visteon, and the Siemens Corporation for their continued support of this research effort. This work was also supported by the Engineering Research Program of the Office of Basic Energy Sciences at the Department of Energy and the National Science Foundation. 10. Expected Impacts of This Research This research is expected to have direct impacts in microelectronics manufacturing and development. Use of this new laser ultrasound and interferometric inspection technique for online manufacturing inspection will bring tremendous cost savings by catching defects early in the process. With access to rapid, accurate inspection systems, cost savings will also be realized in process development by reducing the time to market for new products and allowing better process optimization before manufacturing ramp-up. Inspection systems based on this technique are expected to work with many types of surface-mount devices, making them versatile and costeffective automated manufacturing tools. Besides the wafer-level packages discussed 13

14 References [1] Timothy W. Ellis, Bond Integrity: Trade-Offs Between Electrical, Thermal and Mechanical Performance, Chip Scale Review, August- September, [2] Stuart Wright, X-Ray Inspection of IC Packages and PWBs, Chip Scale Review, August-September, [3] Tom Adams, Online Inspection for Hidden Internal Defects, Sensors, pp , April, [8] John H. Lau, Catherine A. Keely, Dynamic Characterization of Surface-Mount Component Leads for Solder Joint Inspection, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. 12, No. 4, pp , December, [9] Sheng Liu, Dathan Erdahl, I. Charles Ume, A Novel Approach for Flip Chip Solder Joint Quality Inspection: Laser Ultrasound and Interferometric System, IEEE Transactions on Components and Packaging Technologies, Vol. 24, No. 4, pp , December, [4] J. P. Monchalin, Measurement of In-Plane and Out-of-Plane Ultrasonic Displacements by Optical Heterodyne Interferometry, Journal of Nondestructive Evaluation, Vol. 8, No. 2, [5] Sheng Liu, Dathan Erdahl, I. Charles Ume, Vibration Analysis Based Modeling and Defects Recognition for Flip Chip Solder Joint Inspection, Proceedings of the ASME International Mechanical Engineering Congress & Exposition (IMECE), Orlando, Florida, November 5-10, [6] Sheng Liu, Dathan Erdahl, I. Charles Ume, A Novel Method and Device for Solder Joint Quality Inspection by Using Laser Ultrasound. Proceedings of the 50th Electronic Components & Technology Conference (ECTC), Las Vegas, Nevada, May 24-26, pp , [7] Sheng Liu, Defects Pattern Recognition for Flip Chip Solder Joint Quality Inspection, Proceedings of the 52nd Electronic Components and Technology Conference (ECTC), San Diego, California, May 28-31,