SIwave DC Inductance Solver Computing Low Frequency Inductance from Current Density

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1 Application Brief SIwave DC Inductance Solver Computing Low Frequency Inductance from Current Density ANSYS SIwave introduces a feature in the DC solver that computes the low frequency inductance from the current density distribution extracted from the design. When activated by the user the feature calculates both self and mutual partial inductances for the paths defined by the excitations in the design. Because the calculation includes only the effect of the magnetic vector potential generated by one current path on another, it is important to note that the inductances calculated by the solver do not include any inductance of discrete components in the design. Introduction ANSYS SIwave introduces a new feature to its DC solver that computes the partial inductances between net terminals. A switch controls the production of the new result, which is based on the current density output of the solver. Similar to ANSYS Q3D Extractor, net terminals are one of two types, sources or sinks, and there is a set of naming rules that the solver uses to determine the terminal type. This application note summarizes the theory, usage and available outputs of the DC inductance solver. Figure 1 Problem Description The measurement points for both nets are at the same (x, y) coordinates as the ends of the traces. In this note we will refer to the trace net as NET1 and the plane net as NET2; the terminals will be numbered 0-3. The name of a terminal will follow the convention NET1_TERM0 for the 0th terminal on NET1. Figure 2 shows the nets with terminals labeled. In order to define the available current paths in the nets, we must define each terminal as a source or a sink. A source terminal is a terminal in which a defined current is flowing, or one in which a defined potential exists; a sink terminal is a terminal where the potential is zero and out of which a current flows that equals the sum of the currents flowing into the sources on the net. Exactly one sink may exist for a net. One or more sources must also be present on each net where there is a sink. The RL matrix for NET1, taking NET1_TERM3 as the sink, is shown in Figure 3. Figure 2 Each current path from a source terminal to the sink terminal can interact with the other two current paths, and so we have a 3x3 matrix of resistance and inductance values. In general, we will have an NxN matrix where N is the total number of source terminals across all nets. As this is a low frequency solution, the mutual resistance between sources on different nets will be exactly zero. 1

2 SIwave DC Inductance Solver Theory From the continuum form of Ohm s law and the electrostatic relationship between electric field and electric potential, the current density in a conductor with conductivity σ is: Figure 3 where the potential φ is a constant on the net terminals defined in the problem. The solver considers each source terminal in turn by setting its potential to 1 V and allowing the potential at the other terminals to float. The potential at the sink terminals is fixed at 0 V. Using the finite element method, the solver calculates the current density everywhere in the net as well as the total current flowing in the net. After completing this process for all the sources 1 N we then have a total current flowing into the n th source of I n and the current density everywhere in the source s net of J n. The mutual inductance between sources i and j is then calculable as: Where Vi is the volume of the net attached to source i and A(Jj) is the magnetic vector potential due to the current flowing into source j and given by: The solver calculates these two integrals over the same discretization that it used to calculate resistance to generate the inductance matrix. It is important to note that the inductances calculated by the solver do not include any inductance of discrete components in the design. This is because the inductance calculation includes only the effect of the magnetic vector potential generated by the current in one current path to another. Solution Setup Enabling the DC Inductance Solver To enable the calculation of DC inductance values, turn on the Compute DC Inductance check box on the DC tab of the SIwave Simulation Options dialog, as shown in Figure 4. This setting activates the DC inductance solver when you run DC IR simulations. Figure 4 2

3 Terminal Naming and Typing The user interface does not provide an explicit setting for the type of each terminal. Instead the solver will choose a terminal on each net to be the sink based on a lexicographical ordering. This is the order in which SIwave arranges the source names when sorting by name, and is mostly equivalent to an alphanumeric ordering with digits zero through nine having precedence over letters and some special rules for word continuation marks like underscores. The basic rule for source/sink assignment is that the solver will arrange the terminals on each net in lexicographic order and choose the last terminal in this list as the sink terminal. The remaining terminals on the net will be source terminals. For example, the solver will assign the following types to the NET1 terminals in the earlier example: NET1_TERM0: source NET1_TERM1: source NET1_TERM2: source NET1_TERM3: sink A supplemental rule is that if any terminal name matches the pattern _SINK_ then it will be combined in a list with all other terminals matching the pattern and the last of these in lexicographic order will become the sink terminal. This means that there will be terminals whose name matches _SINK_ that are sources if there are multiple terminals whose names match the pattern. If current and voltage sources, rather than terminals, exist on the nets in a design, then each source will become two terminals with names equal to the source name plus a suffix _pos for the positive terminal of the component and a suffix _neg for the negative or reference terminal of the component. The solver will choose the last in lexicographic order of these terminals as the sink and the remaining terminals on the net will become sources. The _SINK_ name pattern rule does not apply to terminals created from voltage and current sources. Running the DC Inductance Solver The DC inductance solution runs at the end of the main simulation process for DC IR. The results are then available as described in the following section. 3

4 Viewing DC Inductance Results Tabular Results We may view the results of the DC inductance solution by right-clicking on a DC IR solution in the Results window and selecting RL Table, as shown in Figure 5. Alternatively, this same menu is available via the DC IR Drop button on the Results ribbon. The DC RL Table dialog appears when the menu item is clicked. An example of the results for the full two net case described earlier is shown in Figure 6. In each row the columns from left to right are the names of the i th and j th nets for which the row s values apply, the resistance matrix entry R ij, and the inductance matrix entry L ij. Note that in this case the terminals NET1_ TERM3 and NET2_TERM3 are missing from the matrix because they are the sinks for NET1 and NET2. Figure 5 At the top of the dialog are several pull-down menus for adjusting the display: Show: Terminal Name or Net Name R: resistance units L: inductance units Precision: number of digits after the decimal point in values The Show mode pull-down is useful if you have a large number of nets with only two terminals per net, as there will only be one current path per net and a simpler display still provides all the information in the result. At the bottom of the dialog is a display self-terms only check box that reduces the display to only the diagonal terms in the results matrix. Clicking the Export Matrix button raises a dialog where we can save the output to a comma separated values file. SPICE Netlist The SPICE netlist output of the DC solver will include the inductance matrix if enabled. To export the matrix, right-click on a DC IR solution in the Results window and select Export SPICE Netlist, as shown in Figure 7. This menu is also available by clicking the DC IR Drop button on the Results ribbon. Figure 6 4

5 The Export DC SPICE Subcircuit dialog appears when the menu item is clicked. We may supply a filename to export the subcircuit to and specify a format for the exported subcircuit. Click OK to save the subcircuit to the file. The above result produces the following netlist in ANSYS Nexxim format: Figure 7 * BEGIN ANSOFT HEADER * node 1 NET1:NET1_TERM0 * node 2 NET1:NET1_TERM1 * node 3 NET1:NET1_TERM2 * node 4 NET2:NET2_TERM0 * node 5 NET2:NET2_TERM1 * node 6 NET2:NET2_TERM2 * node 7 NET1:NET1_TERM3 * node 8 NET2:NET2_TERM3 * Project: SIwave_project1 * Format: HSPICE * Topckt: SIwave_project1 * Left: * Right: 7 8 * Creator: SIwave * Date: Tue Dec 20 09:43: * Notes: Synopsys HSPICE subcircuit * END ANSOFT HEADER.subckt SIwave_project L e-08 L e-09 L e-08 L e-09 L e-10 L e-09 K1_2 L1 L K1_3 L1 L K1_4 L1 L K1_5 L1 L K1_6 L1 L K2_3 L2 L K2_4 L2 L K2_5 L2 L K2_6 L2 L K3_4 L3 L K3_5 L3 L K3_6 L3 L K4_5 L4 L K4_6 L4 L K5_6 L5 L R R

6 R R R R R1_ R1_ R2_ R4_ R4_ R5_ ends SIwave_project1 Summary The inductance solver in ANSYS SIwave-DC computes the low frequency inductance from the current density distribution extracted from the design. The ability to calculate partial inductances for the paths defined by the excitations in the design provides engineering insight to ensure proper device performance. ANSYS, Inc. Southpointe 2600 ANSYS Drive Canonsburg, PA U.S.A ansysinfo@ansys.com 2017 ANSYS, Inc. All Rights Reserved. If you ve ever seen a rocket launch, flown on an airplane, driven a car, used a computer, touched a mobile device, crossed a bridge or put on wearable technology, chances are you ve used a product where ANSYS software played a critical role in its creation. ANSYS is the global leader in engineering simulation. We help the world s most innovative companies deliver radically better products to their customers. By offering the best and broadest portfolio of engineering simulation software, we help them solve the most complex design challenges and engineer products limited only by imagination. Visit for more information. Any and all ANSYS, Inc. brand, product, service and feature names, logos and slogans are registered trademarks or trademarks of ANSYS, Inc. or its subsidiaries in the United States or other countries. All other brand, product, service and feature names or trademarks are the property of their respective owners.