Automatic Bedtime Audio Volume Adjuster

Transcription

1 Automatic Bedtime Audio Volume Adjuster Final Project Report Chris Au May 10, 2016 Page 1

2 Abstract The project uses analog circuits to create a gentle audio experience for listening to music before bedtime by decreasing sudden loud noises and also gradually decreasing the overall volume over time as it gets closer to bedtime. The first module of this is accomplished using an automatic gain controller (ACG) that uses the audio s amplitude as a control signal to decrease loud songs. The second module includes all the timing circuitry required to decrease the volume over time. This timer circuitry involves a 555 timer astable oscillator and counter integrated circuit to create a second control signal. This control signal is input into another voltage controlled amplifier to facilitate the gradual volume decrease over time. The result of the project was successful completion of both modules. Additional features were also implemented such as programmable timing for gradual sound decrease and also an alternative mode in which audio stays at the same volume for a time period before gradually decreasing. The entire circuit board fits on a desk that can be placed on bedside with a laptop audio headphone jack as the input audio. The circuit also drives a speaker that allows the user to listen to the music. Page 2

3 Table of Contents 0.0 List of Figures, Introduction, Motivation for Project, Project Goals and Scope, Project Timeline, Technical Content Overview, High Level System Description, Circuit Level Descriptions, Performance and Testing, Challenges and Detailed Process, Implementation Insights and Future Reworkings, Lessons Learned and Advice for Future Projects, Possible Improvements and Extensions, Conclusion, Accomplishments and Summary of Major Results, Brief Summary of Project s Future, Acknowledgements, Figure Credits, Works Cited, 24 Page 3

4 0.0 List of Figures Figure 1: Overall Audio Circuitry Block Diagram Figure 2: Datasheet Output Characteristics for an Example VCR4N Figure 3. VCA Illustrative Op Amp Amplifier Configuration Figure 4: Voltage Controlled Resistor in Resistor Divider Figure 5: Automatic Gain Controller Circuit Schematic Figure 6. Control Voltage for Module 2 Figure 7: Decrease in Volume over Time and Final Signals Page 4

5 1.1 Motivation for Project There is growing evidence that people in modern societies are increasingly consuming media from computers before bedtime and that audio from that media can have a negative impact on sleep. Sleep Medicine, the official journal of the World Association of Sleep Medicine, published an article in 2010 finding that people aged between 14 and 18 are increasingly consuming electronic media before bedtime including audio from computers [1]. A 2005 National Institute of Environmental Health Sciences journal peer reviewed article found that unwanted sounds before people expect to sleep can delay sleep and result in lighter sleep stages [ 2]. The motivation of this project was to create a gentle audio experience for listening to music before bedtime by decreasing sudden loud noises and also gradually decreasing the overall volume over time as it gets closer to bedtime. Introductory analog circuit techniques lend themselves to these types of audio filtering, where there are techniques for controlling volume based on factors such as time. 1.2 Project Goals and Scope To decrease negative effects of audio on sleep, the system needs to decrease sudden loud sounds and also decrease the overall volume over time. The first goal to decrease sudden loud sounds was accomplished using an automatic gain controller. The next goal of having the audio volume decrease over approximately 30 minutes was accomplished using an astable oscillator and a counter circuit to generate a time dependent control signal. After all audio processing, the resulting signal would be split into two signals: one signal to drive a speaker and another signal to be reduced to line level, which could be used for future extensions to the project. A further goal was to include a mode in which the audio processing circuitry could keep the volume constant for a period of time and then gradually decrease the volume. This audio related circuit would be made to drive a speaker to listen to the final audio. These goals were accomplished, and possible future extensions to the project are discussed in Section 2.7 Possible Improvements and Extensions. Page 5

6 1.3 Project Timeline April 15 Theory and circuit design for automatic gain control Theory and circuit design for clock to count elapsed time April 22 Procurement of specialty parts Voltage Controlled Resistor CMOS 555 Timer CD bit Ripple Carry Counter Circuit schematic draft of automatic gain control and timing circuitry Testing and refinements of circuit schematic drafts April 29 Final schematics of automatic gain control and timing circuitry Successful completion of automatic gain control and gradual sound decrease over time Successful completion of stretch goal of mode to keep audio volume at constant level before decreasing volume gradually Construction of circuitry to drive speaker and return audio to line level May 10 Final report written Page 6

7 2.0 Technical Content Overview 2.1 High Level System Description Figure 1: Overall Audio Circuitry Block Diagram. The automatic gain control decreases sudden loud sounds by using the audio s own amplitude as a control signal. In addition, a signal with decreasing voltage over time is used as a separate control signal to facilitate the decreasing the overall audio volume over time. High Level Description: The audio circuitry involves taking in a line level audio input from a laptop and ultimately produces two waveforms: a final line level audio signal that can be passed onto further circuitry and also a higher amplitude version of this signal to drive a speaker. In order to achieve the goals of decreasing sudden loud sounds and also decreasing the overall volume over time, the two variables of interest are the audio s signals own amplitude and the time elapsed since powering on the circuit. Both of these variables must be converted into voltages that can be used in voltage controlled amplifiers (VCA) to implement the effects of the variables on the actual audio signal. Module 1, the automatic gain controller, uses a voltage controlled amplifier (VCA) with the audio signal s own amplitude as a control signal. When the audio amplitude becomes very Page 7

8 large, the gain of Module 1 decreases in order to automatically adjust the volume. This allows sudden loud sounds to be decreased. The output of the automatic gain controller block was inputted into Module 2 of the audio circuitry. Module 2 is the timing circuitry that uses a second VCA, but instead uses a signal with decreasing voltage over time as a control signal. In order to produce this control signal, it was necessary to count time. This was done by using the CD bit ripple carry counter to count the discrete numbers of square wave periods produced by a CMOS 555 timer astable oscillator. The bits outputted from the counter integrated circuit were inputted into a digital to analog converter that produced the desired control signal with decreasing voltage over time. This signal was used as the control signal to the second VCA to facilitate the gradual decrease of the actual audio volume over time. There are two outputs of Module 2. The difference between the two outputs of Module 2 is that one version is returned to line level for possible extensions to the project and the second version is amplified to drive a speaker. 2.2 Circuit Level Description 2.2 i ) Overview of Required Background The theory required to understand the circuit level descriptions of both Module 1 and Module 2 in Figure 1 is explained in subsections 2.2 ii ) through 2.2 iv ). Module 1 and Module 2 each contain a single voltage controlled amplifier (VCA). A basic component in each voltage controlled amplifier is the voltage controlled resistor (VCR) to be discussed in the next subsection. By using a voltage controlled resistor in configurations such as resistor divider configuration, a control signal can be used to influence gain. 2.2 ii ) Voltage Controlled Resistor Theory A voltage controlled resistor must be able to change its resistance based on an inputted control signal. The linear region of the I V characteristic of an NJFET resembles the linear I V characteristic of a resistor. By designing the drain to source voltage of the NJFET to be close to 0 volts and inputting a control signal into the gate of the NJFET, an NJFET can behave as a voltage controlled resistor. This project uses a special type of NJFET called the Voltage Controlled Resistor 4N (VCR4N) manufactured by InterFET as the voltage controlled resistor. This specialty device allows for more linear behavior than typical NJFETs. Figure 2 below outlines an example I V characteristic for a VCR4N s linear region with a V GS(off) = 4.2 Volts. Page 8

9 Figure 2: Datasheet Output Characteristics for an Example VCR4N : The datasheet for the VCR4N provides an example I V characteristic for the component. Actual V GS(off) values vary between different VCR4N s and must be measured experimentally. In Figure 2 above, different V GS values result in different slopes of the I V characteristic, which in turn lead to different resistor values for the VCR4N. The control signal is applied across V GS to obtain these different resistor values. The VCR4N datasheet lists a maximum possible R DS(on) of 600 Ohms, but the actual range of resistances of each individual VCR4N must also be measured experimentally. By placing the VCR4N in a resistor divider or simple op amp amplifier configuration, it is possible to create a voltage controlled amplifier. 2.2 iii ) Voltage Controlled Amplifier Theory The section examines the theory behind two different configurations of voltage controlled amplifiers. Figures 3 and 4 on subsequent pages are not the actual built circuit schematics, but illustrative diagrams to demonstrate the mathematics behind building a VCA. The VCR4N is used in all configurations as a variable resistor. Page 9

10 Figure 3. VCA Illustrative Op Amp Amplifier Configuration. The VCR4N is an NJFET as shown on the left, but can be modeled as a resistor. The diagram on the right depicts the system s behavior as an op amp amplifier. The design of Figure 3 is a modified version of an automatic gain controller circuit found in Isaac Martinez s thesis Automatic Gain Control (AGC) Circuits: Theory and Design [3]. Figure 3 demonstrates a possible way to create a voltage controlled amplifier, a key component of automatic gain control systems. In the rightmost circuit in Figure 3, the gain can be found from nodal analysis to be (1+R1/R2). The VCR4N can be modeled as the R2 resistor shown in the right part of the picture. The resistance value of R2 depends on the control voltage applied across the gate to source voltage. As R2 changes value, so does the final gain of the system. A simpler voltage controlled amplifier is demonstrated by Figure 4, in which the output signal is R2/(R2+R1) times the original input signal. In both Figure 3 and Figure 4, variables such as time and the amplitude of the audio signal can be used as control signals to influence the gain each voltage controlled amplifier. Figure 4 does not show the control signal, but it is implied that R2 in the image below is an NJFET with a control signal applied across the gate to source voltage. Figure 4: Voltage Controlled Resistor in Resistor Divider. R2 is replaced with the VCR4N. The output signal is an attenuated version of the input signal with a gain dependent on the resistance of the voltage controlled resistor. Page 10

11 2.2 iv) CD Bit Ripple Carry Counter Theory The CD bit ripple carry counter is an integrated circuit manufactured by Intersel which takes in a square wave as an input and counts clock cycles in binary through its output bit pins. The clock cycle required can be produced from a CMOS 555 Timer astable oscillator square wave output. The outputted bits can be inputted into a digital to analog converter in order to convert the elapsed time into a gradually decreasing voltage signal required for Module 2. The specific implementation for the timing circuitry and digital to analog converter are discussed at length in the subsection 2.2 vi) Module 2 Circuit Level Description. 2.3 v) Module 1 Circuit Level Description: Automatic Gain Control Figure 5: Automatic Gain Controller Circuit Schematic. This figure depicts the entire schematic for Module 1 where node B is the node to be used in rest of circuit while node A is unused. Conceptually, node A represents the result of the voltage controlled attenuation, but subsequent sections of the circuit are designed to work with node B s higher amplitude levels. Module 1 Description: Module 1 takes in the line level audio from the headphone jack of a laptop. The maximum peak to peak voltage of the line level audio is volts, and the resistors in the circuit are designed to work with these levels. Capacitor C2 is used to block DC voltage and then the signal is split into two paths. The top path inputs the line level signal into a buffer to be used as the noninverting input to the voltage controlled amplifier to the rightmost LF353 Op Amp, which is configured as the same voltage controlled amplifier as in Figure 3. The bottom path amplifies to approximately 3 volts peak to peak and then buffers the audio signal. The bottom path then obtains the amplitude of the signal using a peak detector composed of diode D1, capacitor C3, and resistor R4. The amplitude from the peak detector is then amplified again through a LM6134 Rail to Rail Op Amp to use as the control signal to the voltage controlled amplifier to match the levels required for gate of the VCR4N. Page 11

12 The threshold voltage of the NJFET was measured to be 5.5 Volts using the laboratory s transistor analyzer, and the LM6134 Rail to Rail Op Amp was able to produce the negative voltages as low as 5.5 volts. This allowed for larger gain ranges for the voltage controlled amplifier than using non rail to rail op amps such as the LF353. As the amplitude of the original audio signal increases, the gain decreases. The signal at node B is the result of the automatic gain control module. Node B is intentionally left within the range of 0 to 3 volts peak to peak because subsequent parts of the circuit are designed to take in that range. Mathematical calculations and error analysis for this module are described in depth in Section 2.3 Performance and Testing. 2.3 vi ) Module 2 Circuit Level Description: Timing Circuitry Module 2 decreases the overall volume of the audio over time. To generate the required signal to decrease the volume over time, astable oscillator and counter configurations were needed to generate a voltage signal that changes over time. That control voltage signal was inputted into the gate to source voltage of a second VCR4N to give the desired decrease of volume over time. Mathematical calculations and error analysis for this module are described in depth in Section 2.3 Performance and Testing. The next page shows the circuit schematic for the generation of the control signal for Module 2. Page 12

13 Figure 6. Control Voltage for Module 2. This circuitry uses an astable oscillator, a counter integrated circuit, and a digital to analog converter to create the control signal. A 2N700 NMOSFET in bottom left of the diagram was connected to the reset pin of the 555 timer to end the counting and maintain the final low audio volume once bits 4 through 7 have become high. Page 13

14 Summary of Module 2 Control Voltage Circuitry : The LMC 555 CMOS timer, created by Texas Instruments, was used to generate the square wave clock cycle. A CMOS 555 timer generates less noise compared to other 555 timers and was ideal for generating the square wave clock signal. The potentiometers Pot 1 and Pot 2 in the astable oscillator in in Figure 6 can be adjusted to tune the clock period between 4.7 and 6.8 seconds. The square wave clock cycle is input into pin 10 of CD4020BE ripple carry counter which counts up to 2 8 1=255 periods before activating the 4 AND gate shown with diodes D1 through D4 with bits 4 through 7. The product of the clock period and the number of periods gives the desired required time of 20 to 30 minutes total time of audio processing before the audio finally reaches and stays at an inaudible volume. The choice of using bits 4 through 7 allows the a period of no volume change in the time when bits 0 through 3 are counting upwards. This is what achieves the period of constant overall volume before the gradual decrease in sound. R1 through R4 and the LF353 Op Amp configuration in Figure 6 comprise the digital to analog converter that converts elapsed time into a voltage. The VCR4N in Module 2 requires the final control voltage to become less negative over time and have a control voltage input range from 0 volts to as low as 5.5 Volts. To obtain voltages that low, an LM6134 rail to rail op amp shown in the bottom right of Figure 6 was used to to amplify and invert the output of the digital to analog converter. The control voltage at the end node of Figure 6 was still centered at 0 Volts, so the voltage needed to be dropped later in order to ensure the final control voltage is within the range required for a VCR4N. Figure 7 accomplishes this last modification voltage drop using two light emitting diodes D1 and D2. Figure 7: Decrease in Volume over Time and Final Signals. This circuit takes in the results of Figure 6 s control signal and the audio signal node B from the automatic gain control to produce the final audio signals. A push pull amplifier is used in the bottom right to drive a 1 ohm speaker. Page 14

15 Summary of Module 2 VCA and Final Audio Signals : Diode voltage drops from D1 and D2 in Figure 7 are used to ensure that the control signal operates in the desired range for VCR4N. R1 and VCR4N in Figure 7 are arranged in the Figure 4 resistor divider attenuator configuration of the voltage controlled amplifier. The resulting output from the VCR4N is then processed to create the line level version of itself and also an amplified version into a push pull amplifier to drive a 1 ohm speaker. 2.3 Performance and Testing 2.4 i ) Measurements and Calculations Device Characteristics Measurements: The two VCR4N threshold voltages were measured to be 5.50 Volts and 5.47 Volts. Module 1 VCR4N Measurements Range of the resistances able to be achieved: 383 Ohms to 1120 Ohms The threshold voltage: 5.5 Volts Module 2 VCR4N Measurements Range of the resistances able to be achieved: 343 Ohms to 1050 Ohms. The threshold voltage: 5.47 Volts Module 1 Calculations: Node B gain factor over line level input uses the Figure 3 op amp amplifier configuration with gain of and the R1 was chosen to be 3 kilohms based on derivative of maximum to minimum gains to to give maximal range. Gain formula from Figure 3 = (1+R1/R2) Predicted Module 1 Voltage Controlled Minimum Gain = ( ohms /1120 ohms) = 3.7 Predicted Module 1 Voltage Controlled Maximum Gain = ( ohms /383 ohms) = 8.9 Divide maximal and minimal gains to find range of gains = 1 to 2.4 Module 2 Calculations: Page 15

16 Module 2 VCA uses a simple resistor divider configuration shown in Figure 3. R1 was chosen to be 4700 Ohms to give additional range. Gain formula from Figure 4 = R2/(R2+R1). The range of gains for the final inaudible level audio after 30 minutes was used as a benchmark. Predicted Module 2 Voltage Controlled Minimum Final Gain = 343/( ) = 0.06 Predicted Module 2 Voltage Controlled Maximum Final Gain = 1050 /( ) = 0.18 Divide maximal and minimal gains to find range of gains = 1 to iii ) Error Analysis and Performance Testing The benchmark used is the range of gains achievable with each voltage amplifier. Error analysis is computed to find the difference between predicted and actual range of gains. Module 1 Error Analysis Actual experimentally measured range measured: 1 to 2.2 Error = ( )/2.4= 8% Experimentally measured range was found by inputting different DC voltages within the VCR4N s operating range at the gate to source voltage and recording maximal and minimal gain. Additional range could have obtained by cascading multiple automatic gain control systems, but successful perceivable volume decrease was already achieved with only one stage of automatic gain control. Laptop audio volumes from 70% to 100% of the laptop s maximum volume were noticeably quieter than would anticipated from nonfiltered audio. Some possible sources of error include noise on the peak detector output and the fact that the VCR4N I V characteristic is less linear for higher drain to source voltages. Module 2 Error Analysis Actual experimentally measured range measured: 1 to 2.62 Error = ( )/3.0= 12.6% Experimentally measured range was found by inputting different DC voltages within the VCR4N s operating range at the gate to source voltage and recording maximal and minimal gain. The final amplitudes of the audio are very small because the circuit is designed to decrease the volume to inaudible levels with very low amplitude after the 30 minutes time has elapsed. One possible source of error is that when the audio signal is attenuated to very low amplitudes, noise contributes a larger percentage error. Page 16

17 2.4 Challenges and Detailed Process This section discusses where time was spent and what steps specifically were taken to ensure that the audio modules worked. In addition, this section describes the major difficulties and challenges associated with each module. Overall, the largest challenge was designing the resistors and control signals to fit within the range required for the VCR4N. In the first module, the automatic gain controller was designed to decrease sudden loud sounds. Much of the time spent was spent on measurements and calculations to determine the appropriate resistor values used in all amplification and resistor divider steps. The datasheet for the Voltage Controlled Resistor 4N (VCR4N) gives a maximum V GS(off) = 7 Volts maximum and a maximum R DS(on) resistance of 600 Ohms. However, these values are only guidelines and actual measurements are required for the following three characteristics: V GS(off), the range of resistances, and the range of voltages that the VCR4N will operate effectively in. The actual V GS(off) was measured to be 5.5 Volts and the range of V GS(off) voltages was from 0 Volts to 5.5 Volts. The actual resistances that could be obtained in practice were from 383 Ohms to 1120 Ohms. The implementation task of fine tuning the resistor values and control signals to match the actual properties of the VCR4N was the most difficult and tedious part of this module. Approximately 80% of the first week was spent on determining the appropriate resistor values to use in the circuit based on the above measurements, and 50% of the last week of design was spent fine tuning values to give the best performance in practice. These implementation tasks could be made less tedious by choosing an integrated circuit to implement the voltage controlled amplifier with more precise specifications. Another option would have been to carefully measure the characteristics of the devices very early in the project and keep those characteristics in an organized table for easier lookup. Module 2 uses the VCR4N as well, and similar difficulties to the ones mentioned above arose in designing the timing circuitry. In Module 2, the timing circuitry, the main implementation task was generation of a time dependent staircase ramp to use as a control signal for a second voltage controlled amplifier. Using this control signal with the second voltage controlled amplifier in this module creates the effect of volume decreasing over time. The most tedious task of this module was wiring the individual output bits of the counter chip to both a digital to analog converter and also to a 4 AND gate. This task was made less tedious by using different wire colors for each bit choice and keeping the positioning of the bits into the digital to analog converter consistent. This step Page 17

18 of connecting the digital logic accounted for about 30% of the actual circuit building and wiring time for this module. However, the largest challenge in Module 2 was calculating appropriate values for resistors and fine tuning them to operate within the range required for the second voltage controlled amplifier. The staircase ramp generated from the digital to analog converter output needed to be amplified appropriately to give the desired volume decrease over time. A strategy that made the task of determining the exact range of required V GS voltages easier was using a DC input voltage from a function generator applied to V GS in order to study the VCR4N s characteristics. An interesting signal to measure was the output of the voltage controlled amplifier when inputting a sine wave into the drain of the VCR4N and using a DC voltage from a second function generator for the control voltage. The output of the VCA was used to verify the expected gain from the VCR4N range of resistances from 383 Ohms to 1120 Ohms. Understanding of the ranges required for each component and careful measurements were vital for success in both modules of the audio circuitry. 2.5 Implementation Insights and Future Reworkings This section discusses the implementation insights in addition to those discussed in the challenges section. This section also covers how such insights would affect decisions if the project were to be redone. One insight was that using a VCR4N could greatly improve the linearity of the I V characteristics for the voltage controlled resistor when compared to other NJFET s not designed as VCRs. In the early stages of the project while testing other NJFETs already available in the laboratory, it was difficult to keep the NJFETs in the linear region for all audio inputs. If the project were to be redone, it would be important to consider specialty components more thoroughly in the early stages of the project to build better performing VCAs. Another implementation insight and a possible reworking is that the staircase ramp to control the timing circuitry could have been made smoother by using more counter output bits and speeding up the clock cycle so that there were more steps in the staircase ramp. If the project were to be redone, unused bits such as bits 8 through 12 could have been used in conjunction with a much faster square wave output from the astable oscillator to achieve a smoother linear staircase ramp. Page 18

19 2.6 Lessons Learned and Advice for Future Projects This section discusses the lessons learned based on experiences detailed in past sections 2.4 and 2.5. The first major lesson learned is that effective testing techniques on new components can be very useful in planning a circuit. In the case of the audio circuitry, the VCR4N could be studied in a test configuration to understand how the device responds to different control voltages. A DC input from a function generator was used as a test control voltage and a sinusoid was input at the resistor before the drain of the VCR4N to study how the gain of the system would vary with different DC inputs. This experimental information was valuable for designing the project before committing to building the entire control signal circuitry. Testing the VCR4N in this preliminary setup eventually led to the choosing of correct resistor values and the use of the rail to rail op amp to improve range. Methodical testing of new components leads to greater understanding and accurate use of those components, and future projects should consider these types of isolated tests to study new specialty components ordered. Another major lesson learned was how to organize the circuit board layout and wiring. For example, in the timing circuitry of the audio component, the output pins of the CD4020 counter circuit are not arranged in increasing bit order, but individual bits still needed to be wired to the correct resistors in the digital to analog converter. Use of different colors to distinguish nodes and consistently arranging the wires from the bits to reflect the circuit schematic can decrease the debugging time. Furthermore, organizing the circuit board intelligently can also help in testing different units. The circuit components were arranged such that the 555 timer astable oscillator, the counter circuitry, the 4 AND gate, and the amplifier to drive the speaker all had clear and different section on the circuit board. This allowed for easier testing and isolation of problems. Future projects should think about visually organizing their circuit intelligently to speed up troubleshooting. A final lesson learned was the importance of setting aside time not only for building individual components, but also for combining them. For example, the original circuit layout involved creating a virtual ground using a resistor divider. This had several problems where the virtual ground rail would change voltage when certain modules were combined. Because of these problems, the final schematic uses 6 V, 0 V and +6 V rails as opposed to virtual ground created with a 9 volt battery. Moreover, in the very early stages of the project, there were problems that arose from simply combining the astable oscillator to the second voltage controlled amplifier in Module 2. Choosing a large capacitor value for the astable oscillator alone was not enough to generate the 30 minutes gradual volume decrease without the counter circuitry. Because of this, the counter circuitry and 4 AND gate needed to be built to handle many square wave periods to give the 30 minutes required. It is important to realize that the final circuit in a project may be more complex than initially conceived. Future projects should Page 19

20 allocate time in early stages to deal with possible additional complexity and problems with combining modules. 2.7 Possible Improvements and Extensions There are several clear directions for the project that can be implemented with more breadboard circuitry. One possible improvement to the project would be to build a third module that allows the user s heart rate to impact the volume of the music. As the heart rate decreases as the user falls asleep, the volume could be designed to decrease accordingly. Circuitry involved could include electrocardiogram circuitry that measures heart rate from the pulse oximetry methods discussed earlier in the introductory analog circuits course. The signal from the heart rate could be modified and then used as a control voltage for a voltage controlled amplifier to achieve the volume adjustment based on heart rate. Another possible extension to the project would be to use a programmable capacitor using an integrated circuit to further increase the adjustability of the timing circuitry. The current project circuitry allows for adjustable time from 20 minutes to 30 minutes using potentiometers at resistor positions in the astable oscillator, but a programmable capacitor would be able to allow the user to have additional ways to modify the square wave period. Other features related to improving the user experience could include use of wireless buttons or a remote control to adjust the device at further distances. Finally, another extension could involve changing the timing circuitry to decrease the volume more smoothly. Currently, the sound signal voltage amplitude decreases linearly over time whereas human hearing perceives sound at a pattern closer to a log scale of the voltage. One possible way is to use the I V transfer characteristics of a diode as a control signal for a voltage controlled amplifier. Improving the user experience is important for the bedtime audio adjuster, and the above mentioned possibilities allow for greater customizability and features. Page 20

21 3.0 Conclusion 3.1 Accomplishments and Summary of Major Results The overall goal of creating a bedtime audio adjuster on a circuit board was completed. The entire device fits on a desk that can be placed on bedside with a laptop audio headphone jack as the input. The device allows the user to listen to the music from a speaker. The project solves the problems of sudden loud sounds in the audio disrupting sleep and also allows for gradual decrease of volume over time. The desired sudden loud sound decrease and gradual volume decrease were both accomplished using configurations of the voltage controlled amplifier. The final audio signal after processing can be returned to line level and also amplified to drive a speaker to listen to audio. Finally, the stretch goal of having the audio be able to stay at the same volume for a period of time and then decrease gradually was accomplished. 3.2 Brief Summary of the Project s Future Using analog circuitry to filter audio can be approached from other angles than just adjusting the volume. For example, the device can be made more portable and user friendly. One possible direction aside from improved customizability mentioned is including more analog circuitry to handle other instances where audio content may be disruptive to sleep. For example, audio content may be disruptive to sleep for reasons other than loud volume such abrupt silences in audio from content. Moreover, if it is the case that certain frequencies of sound are more disruptive to sleep before bedtime, then there could be circuitry to remove those frequencies. Another possible direction for the project s future would be to make the device more portable and versatile. For example, instead of using the +6 volts and 6 volts on a large breadboard, a small printed circuit board could be used with double A batteries as a power source. The bedtime automatic audio adjuster s purpose is to make audio content more user friendly before sleep, and the strategies mentioned above are just some of the ways to improve the user experience. Page 21

22 3.3 Acknowledgements The project author would like to acknowledge instructor Gim Hom for guidance and knowledge of components in areas including automatic gain control systems and counter circuitry. The project author would also like to acknowledge teaching assistant Elliott Williams for guidance in many areas such as project planning, debugging strategies, and voltage controlled amplifier mathematical theory. Lastly, the project author would like to acknowledge Linear Technology engineer Joe Sousa for his expertise and advice for the audio circuitry constructed. Page 22

23 4.0 Figure Credits Figure 1: Overall Audio Circuitry Block Diagram Figure 2: Datasheet Output Characteristics for an Example VCR4N Source: Figure 3. VCA Illustrative Op Amp Amplifier Configuration Redrawn by Chris Au Original Source: Figure 4: Voltage Controlled Resistor in Resistor Divider Redrawn by Chris Au Original Source: Figure 5: Automatic Gain Controller Circuit Schematic Figure 6. Control Voltage for Module 2 Figure 7: Decrease in Volume over Time and Final Signals Page 23

24 5.0 Works Cited [1] C.Neralie, M. Gradisar "Electronic media use and sleep in school aged children and adolescents: a review, Sleep Medicine, Vol 11, pp , Feb, [2] R. Chepesiuk, Decibel Hell: The Effects of Living in a Noisy World, Environmental Health Perspectives, Vol 113.1, pp 34 41, Dec, [3] I. Martinez, Automatic Gain Control (AGC) Circuits Theory and Design M.S. thesis, ECE. University of Toronto. Toronto, Page 24