Not Recommended for New Designs

Transcription

1 Not Recommended for New Designs The MAX9 was manufactured for Maxim by an outside wafer foundry using a process that is no longer available. It is not recommended for new designs. A Maxim replacement or an industry second-source may be available. The data sheet remains available for existing users. The other parts on the following data sheet are not affected. For further information, please see the QuickView data sheet for this part or contact technical support for assistance.

2 9-887; Rev. 5; /5 High-Speed, Low-Power Voltage Comparators General Description The high-speed, low-power, single/ dual/quad voltage comparators feature differential analog inputs and TTL-logic outputs with active internal pullups. Fast propagation delay (8ns typ at 5mV overdrive) makes the ideal for fast A/D converters and sampling circuits, line receivers, V/F converters, and many other data-discrimination applications. All comparators can be powered from separate analog and digital power supplies or from a single combined supply voltage. The analog input common-mode range includes the negative rail, allowing ground sensing when powered from a single supply. The consume 8mW per comparator when powered from +5V. The are equipped with independent TTL-compatible latch inputs. The comparator output states are held when the latch inputs are driven low. The MAX9 provides the same performance as the MAX9/MAX9/MAX93 with the exception of the latches. For newer, pin-for-pin compatible parts with the same speed and only half the power dissipation, see the MAX9/MAX9/MAX93 data sheet. High-Speed A/D Converters High-Speed V/F Converters Line Receivers Threshold Detectors TOP VIEW Applications Input Trigger Circuitry High-Speed Data Sampling PWM Circuits Features 8ns (typ) Propagation Delay 8mW/Comparator Power Consumption (+5V, typ) Separate Analog and Digital Supplies Flexible Analog Supply: +5V to +V or ±5V Input Range Includes Negative Supply Rail TTL-Compatible Outputs TTL-Compatible Latch Inputs (Except MAX9) Ordering Information PART TEMP RANGE PIN-PACKAGE MAX9ACPP C to +7 C Plastic DIP MAX9BCPP C to +7 C Plastic DIP MAX9ACWP C to +7 C Wide SO MAX9BCWP C to +7 C Wide SO MAX9AEPP -4 C to +85 C Plastic DIP MAX9BEPP -4 C to +85 C Plastic DIP MAX9AEWP -4 C to +85 C Wide SO MAX9BEWP -4 C to +85 C Wide SO MAX9ACPE C to +7 C 6 Plastic DIP MAX9BCPE C to +7 C 6 Plastic DIP Ordering Information continued at end of data sheet. Pin Configurations MAX9 MAX9 MAX93 IN- (A) 6 IN- (D) IN- (A) 4 V CC ** V CC ** 8 V DD *** IN+ (A) OUT (A) OUT (B) V EE * IN+ (B) A B D C IN+ (D) V CC ** OUT (D) OUT (C) V DD ** IN+ (C) IN+ (A) LATCH (A) OUT (A) N.C. V EE * A B N.C. OUT (B) LATCH (B) V DD *** IN+ (B) IN- (B) IN+ IN- V EE * 3 4 DIP/SO OUT LATCH IN- (B) 8 DIP/SO 9 IN- (C) DIP/SO *ANALOG V- AND SUBSTRATE **ANALOG V+ ***DIGITAL V+ Pin Configurations continued at end of data sheet. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

3 ABSOLUTE MAXIMUM RATINGS Analog Supply Voltage (V CC to V EE )...+V Digital Supply Voltage (V DD to )...+7V Differential Input Voltage...(V EE -.V) to (V CC +.V) Common-Mode Input Voltage...(V EE -.V) to (V CC +.V) Latch-Input Voltage (MAX9/MAX9/ MAX93 only)...-.v to (V DD +.V) Output Short-Circuit Duration To...Indefinite To V DD...min Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = +5 C, unless otherwise noted.) Internal Power Dissipation...5mW Derate above + C...mW/ C Operating Temperature Ranges: _C... C to +7 C _E...-4 C to +85 C Junction Temperature C to +6 C Storage Temperature Range C to +5 C Lead Temperature (soldering, s)...+3 C PARAMETER SYMBOL CONDITIONS MAX9A/MAX9A MAX9B/MAX9B/ MAX9/MAX93 MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage V OS V CM = V O =.4V mv Input Bias Current I B I IN + or I IN µa Input Offset Current I OS V CM = ; V O =.4V na Input Voltage Range V CM (Note ) V EE -. V CC -.5 V EE -. V CC -.5 V Common-Mode Rejection Ratio CMRR -5V < V CM < +.75V, V O =.4V (Note ) µv/v Power-Supply Rejection Ratio PSRR (Note ) µv/v Output High Voltage V OH V IN > 5mV, I SRC = ma Output Low Voltage V OL V IN > 5mV, I SINK = 8mA V V Latch-Input Voltage High V LH (Note 3) V Latch-Input Voltage Low V LL (Note 3) V Latch-Input Current High I LH V LH = 3.V (Note 3) Latch-Input Current Low I LL V LL =.3V (Note 3) µa µa

4 ELECTRICAL CHARACTERISTICS (continued) (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = +5 C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS Positive Analog Supply Current Negative Analog Supply Current Digital Supply Current Power Dissipation M AX9A/M AX9A MAX9 MAX93 M AX9B/M AX9B MIN TYP MAX MIN TYP MAX MIN TYP MAX I CC (Note 7) ma I EE (Note 7) ma I DD (Note 7) ma PD V CC = V DD = +5V, V EE = UNITS mw TIMING CHARACTERISTICS (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = +5 C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MAX9A/MAX9A MAX9 MAX93 MAX9B/MAX9B MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS Input-to-Output High Response Time t pd+ V OD = 5mV, C L = 5pF, I O = ma (Note 4) ns Input-to-Output Low Response Time t pd - V OD = 5mV, C L = 5pF, I O = ma (Note 4) ns Difference in Response Time Between Outputs t pd (Notes 4, 5) ns Latch Disable to Output High Delay t pd+ (D) (Notes 3, 6) ns Latch Disable to Output Low Delay t pd- (D) (Notes 3, 6) ns Minimum Setup Time t s (Notes 3, 6) ns Minimum Hold Time t h (Notes 3, 6) ns Minimum Latch Disable Pulse Width t pw (D) (Notes 3, 6) ns 3

5 ELECTRICAL CHARACTERISTICS (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = full operating temperature, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS Input Offset Voltage V OS V CM =, V O =.4V MAX9B/MAX9B/ MAX9A/MAX9A MAX9/MAX93 MIN TYP MAX MIN TYP MAX UNITS 3 6 mv Input Bias Current I B I IN+ or I IN µa Input Offset Current I OS V CM =, V O =.4V Input Voltage Range V CM (Note ) Common-Mode Rejection Ratio CMRR -5V < V CM < +.75V, V O =.4V (Note ) V EE na V CC -.5 V EE -. V CC µv/v V Power-Supply Rejection Ratio PSRR (Note ) µv/v Output High Voltage V OH V IN > 5mV, I SRC = ma Output Low Voltage V OL V IN > 5mV, I SINK = 8mA V V Latch Input Voltage High Latch Input Voltage Low V LH (Note 7) V V LL (Note 7) V Latch Input Current High Latch Input Current Low I LH V LH = 3.V (Note 7) I LL V LL =.3V (Note 7) µa µa 4

6 ELECTRICAL CHARACTERISTICS (continued) (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = full operating temperature, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS Positive Analog Supply Current Negative Analog Supply Current Digital Supply Current Power Dissipation MAX9A/MAX9A/ MAX9B/MAX9B MAX9 MAX93 MIN TYP MAX MIN TYP MAX MIN TYP MAX I CC (Note 7) ma I EE (Note 7) ma I DD (Note 7) ma P D V CC = V DD = +5V, V EE = UNITS mw TIMING CHARACTERISTICS (V CC = +5V, V EE = -5V, V DD = +5V, LE LE4 = logic high, T A = full operating temperature, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MAX9B/MAX9B/ MAX9A/MAX9A MAX9/MAX93 MIN TYP MAX MIN TYP MAX UNITS Input-to-Output High Response Time t pd+ V OD = 5mV, C L = 5pF, I O = ma (Note 4) 5 5 ns Input-to-Output Low Response Time t pd- V OD = 5mV, C L = 5pF, I O = ma (Note 4) 5 5 ns Difference in Response Time Between Outputs t pd (Notes 4, 5) 3 3 ns Note : The input common-mode voltage and input signal voltages should not be allowed to go negative by more than.v below V EE. The upper-end of the common-mode voltage range is typically V CC - V, but either or both inputs can go to a maximum of V CC +.V without damage. Note : Tested for +4.75V < V CC < +5.5V, and -5.5V < V EE < -4.75V with V DD = +5V, although permissible analog power-supply range is +4.75V < V CC < +.5V for single-supply operation with V EE grounded. Note 3: Specification does not apply to MAX9. Note 4: Guaranteed by design. Times are for mv step inputs (see Propagation Delay Characteristics in Figures and 3). Note 5: Maximum difference in propagation delay between any of the four comparators in the. Note 6: See Timing Diagram (Figure ). Owing to the difficult and critical nature of switching measurements involving the latch, these parameters cannot be tested in a production environment. Typical specifications listed are taken from measurements using a high-speed test-jig. Note 7: I CC tested for +4.75V < V CC < +.5V with V EE grounded. I EE tested for -5.5V < V EE < -4.75V with V CC = +5V. I DD tested for +4.75V < V DD < +5.5V with the worst-case condition of all four comparator outputs at logic low. 5

7 (T A = +5 C, unless otherwise noted.) INPUT OFFSET VOLTAGE (mv) - - INPUT OFFSET VOLTAGE vs. TEMPERATURE MAX9-3 toc INPUT BIAS VOLTAGE (µv) INPUT BIAS CURRENT vs. TEMPERATURE Typical Operating Characteristics MAX9-3 toc OUTPUT LOW VOLTAGE (V) OUTPUT LOW VOLTAGE (V OL ) vs. LOAD CURRENT T A = -55 C T A = +5 C T A = +5 C MAX9-3 toc TEMPERATURE ( C) TEMPERATURE ( C) LOAD CURRENT (ma) I CC SUPPLY CURRENT (PER COMPARATOR) vs. V CC SUPPLY VOLTAGE IINPUT OVERDRIVE vs. t pd+ RESPONSE TIME INPUT OVERDRIVE vs. t pd- RESPONSE TIME ICC SUPPLY CURRENT (ma) V DD = +5V T A = +5 C T A = +5 C T A = -55 C MAX9-3 toc4 INPUT VOLTAGE OUTPUT VOLTAGE 4 3-5mV mv 5mV INPUT OVERDRIVE (V OD ) MAX9-3 toc5 INPUT VOLTAGE OUTPUT VOLTAGE mv 5mV 5mV INPUT OVERDRIVE (V OD ) MAX9-3 toc V CC SUPPLY VOLTAGE (V) tpd+ RESPONSE TIME (ns) tpd- RESPONSE TIME (ns) 4 3 RESPONSE TIME vs. TEMPERATURE (5mV OVERDRIVE) MAX9-3 toc7 4 3 RESPONSE TIME vs. LOAD CAPACITANCE (5mV OVERDRIVE) R L =.4kΩ MAX9-3 toc8 RESPONSE TIME (ns) 9 8 t pd+ 9 t pdt pd+ 7 t pd TEMPERATURE ( C) LOAD CAPACITANCE (pf) 6

8 MAX9 PIN NAME FUNCTION,,, IN- (A, B, C, D), 9,, 9 IN+ (A, B, C, D) Negative Input (Channels A, B, C, D) Positive Input (Channels A, B, C, D) 3 Ground Terminal 4, 7, 4, 7 LATCH (A, B, C, D) Latch Input (Channels A, B, C, D) Output (Channels A, B, 5, 6, 5, 6 OUT (A, B, C, D) C, D) Negative Analog 8 V EE Supply and Substrate 3 V DD Positive Digital Supply 8 V CC Positive Analog Supply MAX9 PIN NAME FUNCTION, 8, 9, 6 IN- (A, B, C, D), 7,, 5 IN+ (A, B, C, D) Negative Input (Channels A, B, C, D) Positive Input (Channels A, B, C, D) 3 Ground Terminal 4, 5,, 3 OUT (A, B, C, D) Pin Descriptions Output (Channels A, B, C, D) 6 V EE Negative Analog Supply and Substrate V DD Positive Digital Supply 4 V CC Positive Analog Supply MAX9 PIN NAME FUNCTION, 8 IN- (A, B), 9 IN+ (A, B) Negative Input (Channels A, B) Positive Input (Channels A, B) 3 Ground Terminal 4, LATCH (A, B) Latch Input (Channels A, B) 5, OUT (A, B) Output (Channels A, B) 6, 3 N.C. No Connection. Not internally connected. 7 V EE Negative Analog Supply and Substrate V DD Positive Digital Supply 4 V CC Positive Analog Supply MAX93 PIN NAME FUNCTION V CC Positive Analog Supply IN+ Positive Input 3 IN- Negative Input 4 V EE Negative Analog Supply and Substrate 5 LATCH Latch Input 6 Ground Terminal 7 OUT Output 8 V DD Positive Digital Supply 7

9 Applications Information Circuit Layout Because of the large gain-bandwidth transfer function of the, special precautions must be taken to realize their full high-speed capability. A printed circuit board with a good, low-inductance ground plane is mandatory. All decoupling capacitors (the small nf ceramic type is a good choice) should be mounted as close as possible to the power-supply pins. Separate decoupling capacitors for analog V CC and for digital V DD are also recommended. Close attention should be paid to the bandwidth of the decoupling and terminating components. Short lead lengths on the inputs and outputs are essential to avoid unwanted parasitic feedback around the comparators. Solder the device directly to the printed circuit board instead of using a socket. Input Slew-Rate Requirements As with all high-speed comparators, the high gain-bandwidth product of the can create oscillation problems when the input traverses the linear region. For clean output switching without oscillation or steps in the output waveform, the input must meet minimum slew-rate requirements. Oscillation is largely a function of board layout and of coupled source impedance and stray input capacitance. Both poor layout and large-source impedance will cause the part to oscillate and increase the minimum slew-rate requirement. In some applications, it may be helpful to apply some positive feedback between the output and + input. This pushes the output through the transition region cleanly, but applies a hysteresis in threshold seen at the input terminals. TTL Output and Latch Inputs The comparator TTL-output stages are optimized for driving low-power Schottky TTL with a fan-out of four. When the latch is connected to a logic high level, the comparator is transparent and immediately responds to changes at the input terminals. When the latch is connected to a TTL low level, the comparator output latches in the same state as at the instant that the latch command is applied, and will not respond to subsequent changes at the input. No latch is provided on the MAX9. Power Supplies The can be powered from separate analog and digital supplies or from a single +5V supply. The analog supply can range from +5V to +V with V EE grounded for single-supply operation (Figures A and B) or from a split ±5V supply (Figure C). The V DD digital supply always requires +5V. In high-speed, mixed-signal applications where a common ground is shared, a noisy digital environment can adversely affect the analog input signal. When set up with separate supplies (Figure C), the isolate analog and digital signals by providing a separate A (V EE ) and D. Typical Power-Supply Alternatives +V +5V +5V +5V +5V V CC V CC V CC V EE V DD OUT V EE V DD OUT V EE V DD OUT -5V Figure A. Separate Analog Supply, Common Ground Figure B. Single +5V Supply, Common Ground Figure C. Split ±5V Supply, Separate Ground 8

10 V OS V IN V OD Input Offset Voltage: Voltage applied between the two input terminals to obtain TTL-logic threshold (+.4V) at the output. Input Voltage Pulse Amplitude: Usually set to mv for comparator specifications. Input Voltage Overdrive: Usually set to 5mV and in opposite polarity to V IN for comparator specifications. t pd+ (D) t pd- (D) ts Definitions of Terms Latch Disable-to-Output High Delay: The propagation delay measured from the latch-signal crossing the TTL threshold in a low-to-high transition to the point of the output crossing TTL threshold in a low-to-high transition. Latch Disable-to-Output Low Delay: The propagation delay measured from the latch-signal crossing the TTL threshold in a low-to-high transition to the point of the output crossing TTL threshold in a high-to-low transition. Minimum Setup Time: The minimum time before the negative transition of the latch signal that an input signal change must be present in order to be acquired and held at the outputs. t pd+ Input-to-Output High Delay: The propagation delay measured from the time the input signal crosses the input offset voltage to the TTL-logic threshold of an output low-to-high transition th Minimum Hold Time: The minimum time after the negative transition of the latch signal that an input signal must remain unchanged in order to be acquired and held at the output. t pd- Input-to-Output Low Delay: The propagation delay measured from the time the input signal crosses the input offset voltage to the TTL-logic threshold of an output high-to-low transition. tpw (D) Minimum Latch-Disable Pulse Width: The minimum time that the latch signal must remain high in order to acquire and hold an input-signal change. 9

11 LATCH ENABLE INPUT COMPARE COMPARE LATCH LATCH LATCH DIFFERENTAL INPUT VOLTAGE V IN t s V DD t pd- t h tpw(d) t pd+ (D).4V V OS OUTPUT INPUT 5ns/div Figure 3. t pd+ Response Time to 5mV Overdrive +5V V OS +5mV mv COMPARATOR OUTPUT.4V Figure. MAX9/MAX9/MAX93 Timing Diagram OUTPUT INPUT +5V mv V OS +5mV PRECISION STEP GENERATOR V DC OFFSET ADJUST INPUT TO X SCOPE PROBE (MΩ, 4pF) kω nf kω nf V CC +5V nf Ω D.U.T. Ω V EE -5V V DD +5V OUTPUT TO X SCOPE PROBE (MΩ, 4pF) nf R L.43kΩ 5ns/div Figure 4. t pd- Response Time to 5mV Overdrive Figure 5. Response-Time Setup

12 OUTPUT V/div INPUT mv/div 5ns/div Figure 6. Response to 5MHz Sine Wave OUTPUT V/div INPUT mv/div 5ns/div Figure 7. Response to MHz Sine Wave Photo +.5V MX78 OCTAL 8-BIT DAC VREF VDAC IN V OUT IN IN3 IN4 UNDER OVER UNDER UNDER Typical Application Programmed, Variable-Alarm Limits By combining two quad analog comparators with an octal 8-bit D/A converter (the MX78), several alarm and limit-defect functions can be performed simultaneously without external adjustments The MX78 s internal latches allow the system processor to set the limit points for each comparator independently and update them at any time. Set the upper and lower thresholds for a single transducer by pairing the D/A converter and comparator sections. MSB D7 MAX9 8-BIT DATA INPUT 8 x 8 DATA LATCH IN5 UNDER LSB D IN6 UNDER IN7 OVER A A A CONTROL LOGIC VDAC8 V OUT8 IN8 OVER MAX9 Figure 8. Alarm Circuit Level Monitors Eight Separate Inputs

13 Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX9ACSE C to +7 C 6 Narrow SO MAX9BCSE C to +7 C 6 Narrow SO MAX9AEPE -4 C to +85 C 6 Plastic DIP MAX9BEPE -4 C to +85 C 6 Plastic DIP MAX9AESE -4 C to +85 C 6 Narrow SO MAX9BESE -4 C to +85 C 6 Narrow SO MAX9CPD C to +7 C 4 Plastic DIP MAX9CSD C to +7 C 4 Narrow SO MAX9EPD -4 C to +85 C 4 Plastic DIP MAX9ESD -4 C to +85 C 4 Narrow SO MAX93CPA C to +7 C 8 Plastic DIP MAX93CSA C to +7 C 8 SO TOP VIEW Pin Configurations (continued) IN- (A) IN+ (A) LATCH (A) OUT (A) OUT (B) LATCH (B) V EE * IN+ (B) IN- (B) A B MAX9 DIP/SO IN- (D) 9 IN+ (D) 8 V CC ** D 7 LATCH (D) C OUT (D) OUT (C) LATCH (C) V DD *** IN+ (C) IN- (C) *ANALOG V- AND SUBSTRATE **ANALOG V+ ***DIGITAL V+ MAX93EPA -4 C to +85 C 8 Plastic DIP MAX93ESA -4 C to +85 C 8 SO Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.