Application Note of RingCore210 Family. (Optimized Vibration Driver) V1.3 May, 2011
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1 RingCore Family Application Note #54 (AN54-V1.3) Application Note of RingCore210 Family (Optimized Vibration Driver) V1.3 May, 2011 CORERIVER Semiconductor reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. The CORERIVER Semiconductor products listed in this document are intended for usage in general electronics applications. These CORERIVER Semiconductor products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury. Semiconductor Co., Ltd. ( tech@coreriver.com) [1]
2 1. What is RingCore Family? 2. Product Overview 3. Features 4. Pin Configuration 5. Pin Descriptions 6. Typical Application 7. Reference Table for R G 8. Strong Point 9. Motor Driving Frequency Tuning 10. Absolute Maximum Ratings 11. DC Characteristics 12. Package Dimension 13. Roadmap of RingCore Family Semiconductor Co., Ltd. RingCore210 Family [2]
3 Semiconductor Co., Ltd. RingCore210 Family [3]
4 RingCore Family Product FLASH [Byte] EEPROM [Byte] RAM [Byte] RingCore100-ML16IP 1k (256) 128 RingCore210-QF16IP Volt [V] 2.7 ~ (Max.) Freq [MHz] T/C [16 bits] COM I/O WDT Auto Tuning I 2 C 1 Support 16-MLF 4X4 Package Size Others Status IAP ISP JTAG LVR POR RING Support 16-QFN 3X3 - Now Now RingCore200-QF8IP (Max.) QFN 2X2 - Now Semiconductor Co., Ltd. RingCore210 Family [4]
5 Motor Driving Frequency Tuning (Maximum Vibration Frequency Search) Support two actuator types (ERM / LRA) Support low-impedance actuator down to 7.5 Ohms Wide output frequency capability ( 80 Hz < Resonant Frequency < 390 Hz) Almost Rail-to-Rail (Output swing from V SS + 100mV to V DD + 100mV) Over-current limitation Fast wake-up time (Output available 1ms after EN) Single-PWM input for all actuator types (10 khz < PWM < 50 khz) Built-in weak pull down on all inputs Standby Current : Max. 1uA Settable filter in GAIN using external capacitor DC gain settable in GAIN using an external resistor 50mV maximum offset on output 3.0mm X 3.0mm QFN package with exposed pad Semiconductor Co., Ltd. RingCore210 Family [5]
6 N/C N/C N/C N/C N/C CMP_EN CMP_OUT N/C Ordering Information : RingCore210-QF16IP EN 1 12 VDP PWM 2 11 GND MODE 3 RingCore210-QF16IP 10 VDD GAIN 4 VSS (Bottom PAD) 9 VDN [ 16-pin QFN : 3mm X 3mm, 0.5mm Pin Pitch ] Semiconductor Co., Ltd. RingCore210 Family [6]
7 Pin Descriptions Pin No. Pin Name Direction Description Share Pins 1 EN I Turns the Circuit ON 2 PWM I 3 MODE I 4 GAIN I PWM input sets desired vibration magnitude (1% to 99%) with Pull-down. - 1% : Full Braking - 50% : No Vibration - 99% : Full Vibration High : LRA Mode Low : ERM Mode Resistor to VDN sets DC Gain, Capacitor to VDN sets Output Filter Frequency 9 VDN O Negative Actuator Connector 10 VDD Power Power Supply 11 VSS Power Power Ground with Bottom PAD 12 VDP O Positive Actuator Connector 14 CMP_OUT O Comparator Output 15 CMP_EN I Comparator Enable Semiconductor Co., Ltd. RingCore210 Family [7]
8 Reference Component Comparator Control Enable(High) / Disable(Low) CMP_EN CMP_OUT Comparator Output Motor Driver Control Enable(High) / Disable(Low) Control Input Motor Type LRA (High) / ERM (Low) EN PWM MODE GAIN RingCore210-QF16IP VSS (Bottom PAD) VDP GND VDD VDN Actuator GND VDD C B (Bypass Capacitor) R G (Gain Resistor : Optional) C F (Filter Capacitor) Semiconductor Co., Ltd. RingCore210 Family [8]
9 V DD power of RingCore210 should be supplied by regulated power EN pint of RingCore210 should be controlled by GPIO of main cpu to disable RingCore210 The R G (Gain Resistor) is used to set the output(vdp, VDN) voltage gain. The output gain by the R G optionally. (default output gain is 1 without R G ) If R G is 60 kω, output gain is half of default value (0.5). If VDD is higher than required, adjusting the value of R G to reduce output voltage. The value of R G is based on VDD and motor s operating ratings. Output voltage only can be reduced by R G. The C F (Filter Capacitor) is used to regulate output high frequency harmonics. Increasing the value of C F Removing high frequency harmonics of the PWM on the outputs. In LRA mode, PWM frequency is same to 128 times of the LRA s resonant frequency. Don t need any protection component on VDP, VDN Semiconductor Co., Ltd. RingCore210 Family [9]
10 How to use reference table Define input V DD voltage and Search actuator s operating ratings (V rms ) Tracking down output voltage(vdp, VDN) of RingCore210 as you want to use Find the R G on left side For example : V DD is 3.7V, LRA s operating raitngs (Input V rms ) is 2.0V rms R G value is 91 kω Note : This table s R G value is estimated value, so should adjust by developer s experiment. If V DD don t exceed actuator s ratings, R G can be removed. R G V DD 2.0V 2.1V 2.2V 2.3V 2.4V 2.5V 2.6V 2.7V 2.8V 2.9V 3.0V 3.1V 3.2V 3.3V 3.4V 3.5V 3.6V 3.7V 68K K K K K K K K K K K K K K K K K K K K K K Semiconductor Co., Ltd. RingCore210 Family [10]
11 Frequency-Tuning Concept with RingCore210 The Frequency-Tuning for the resonant frequency of LRA (Linear Resonant Actuator) motors by the application software in system. LRA motor can be tuned at its best frequency against the characteristics shift or degradation by aging. 170Hz (Real Freq.) 175Hz (Ideal Freq.) 175Hz (Real Freq. & Ideal Freq.) 175Hz (Ideal Freq.) 180Hz (Real Freq.) 170Hz 175Hz 175Hz 175Hz 180Hz Semiconductor Co., Ltd. RingCore210 Family [11]
12 Frequency tuning can implement various and exact haptic effet Conventional Initial Set Breaks feeling (X) Smooth feeling (O) Breaks feeling (O) Smooth feeling (O) RingCore210 Breaks feeling (O) Smooth feeling (O) Semiconductor Co., Ltd. RingCore210 Family [12]
13 Conventional Fixed driving frequency Motor1 Motor2 Motor3 RingCore210 Driving frequency adapted to a motor for maximum vibration power and haptic effect. Motor1 Motor2 Motor3 170Hz 175Hz 180Hz 170Hz 175Hz 180Hz Diversification of Motor Suppliers Maximum Vibration Regardless of Motor Aging Yield Enhancement Cost Reduction Semiconductor Co., Ltd. RingCore210 Family [13]
14 No. How to tune the frequency Main CPU Motor Driving Frequency RingCore210 Pin EN PWM CMP_EN CMP_OUT Description 1 1 ON Should be kept for at least 100ms -. Drive RC210 pin (EN, PWM, CMP_EN) ex. 175-Hz 2 0 OFF 1 Pulse Out 3 -. Analyze out pulse from CMP_OUT port Pulse Out -. Out pulse is rail-to-rail square wave form 4 -. Renewal motor driving frequency ex. 178-Hz Driving off Driving Out (VDP VDN) CMP_EN CMP_OUT Semiconductor Co., Ltd. RingCore210 Family [14]
15 Items Conditions Ranges Voltage on Any Pin Relative to Ground Voltage in V DD Relative to Ground to (V DD + 0.5V) V to 3.7V Output Voltage V to (V DD + 0.5V) Output Current High One I/O Pin Active All I/O Pins Active -25mA -100mA Output Current Low One I/O Pin Active All I/O Pins Active +30mA +150mA Storage Temperature to +150 Soldering Temperature for 10 seconds Semiconductor Co., Ltd. RingCore210 Family [15]
16 TA = -40 to 85, V DD = +2.7V to +3.7V unless Otherwise Specified. Parameter Symbol Pin Conditions Value Min. Typ. Max. Unit Input Low Voltage V IL EN, PWM V DD = +2.7 to +3.7V V Input High Voltage V IH EN, PWM V DD = +2.7 to +3.7V V Output Low Voltage V OL CMP_OUT I OL = DD = +3V V DD V Output High Voltage V OH CMP_OUT I OH = DD = +3V 0.7V DD - - V Quiescent Power Supply Current I DDQ VDP, VDN Output Offset Voltage V OS VDP, VDN V PWM = 50% Duty, R L = 30Ω V PWM = 50% Duty, R L = 30Ω ma mv Output Current I OUT VDP, VDN V OH, V OL 200mV ma Input Leakage Current I IL All Pins V IN = V IH or V IL (V EN = 0) - - ±1 μa Pin Capacitance C IO All Pins V DD = +3.7V pf Semiconductor Co., Ltd. RingCore210 Family [16]
17 [16-QFN] 12 D 8 16 TOP VIEW E Exposed PAD Note 2 E2 D C BOTTOM VIEW 8 L 12 e b Dimensions [mm] Symbol Min. Nom. Max. A A A REF D 3.00 BSC E 3.00 BSC D E b e 0.50 BSC L Notes: 1. All Dimension are in mm. Angles in Degrees. 2. Pin 1 visual index feature may vary, but must be located within the hatched area. 3. Package is saw singulated. 4. Refer JEDEC MO BSC : Basic Dimension. Theoretically exact value shown without tolerances. REF : Reference Dimension, Usually without tolerance, for information purpose only. DETAIL A A Seating Plane A 3 SIDE VIEW A 1 Semiconductor Co., Ltd. RingCore210 Family [17]
18 Design FPGA Silicon Design FPGA Silicon Design FPGA Silicon Design FPGA Silicon Design FPGA Silicon Semiconductor Co., Ltd. RingCore210 Family [18]
19 Semiconductor Co., Ltd. RingCore210 Family [19]
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FEATURES AND BENEFITS PHASE/ENABLE/SLEEPn control logic Overcurrent indication Adjustable off-time and blank-time Adjustable current limit Adjustable gate drive Synchronous rectification Internal UVLO
SERIALLY PROGRAMMABLE CLOCK SOURCE. Features
DATASHEET ICS307-02 Description The ICS307-02 is a versatile serially programmable clock source which takes up very little board space. It can generate any frequency from 6 to 200 MHz and have a second
ICS PCI-EXPRESS CLOCK SOURCE. Description. Features. Block Diagram DATASHEET
DATASHEET ICS557-0 Description The ICS557-0 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 00 MHz in a small 8-pin SOIC package.
Spread Spectrum Frequency Timing Generator
Spread Spectrum Frequency Timing Generator Features Maximized EMI suppression using Cypress s Spread Spectrum technology Generates a spread spectrum copy of the provided input Selectable spreading characteristics
ACPL Data Sheet. Three-Channel Digital Filter for Sigma-Delta Modulators. Description. Features. Specifications.
Data Sheet ACPL-0873 Three-Channel Digital Filter for Sigma-Delta Modulators Description The ACPL-0873 is a 3-channel digital filter designed specifically for Second Order Sigma-Delta Modulators in voltage
R/W address auto increment External Crystal kHz oscillator
RAM Mapping 328 LCD Controller for I/O MCU PATENTED PAT No. : 099352 Features Operating voltage: 2.7V~5.2V R/W address auto increment External Crystal 32.768kHz oscillator Two selectable buzzer frequencies
TC4421/TC A High-Speed MOSFET Drivers. General Description. Features. Applications. Package Types (1)
9A High-Speed MOSFET Drivers Features High Peak Output Current: 9A Wide Input Supply Voltage Operating Range: - 4.5V to 18V High Continuous Output Current: 2A Max Fast Rise and Fall Times: - 3 ns with
HT82V7524 3W Mono Filter-free Class-D Audio Power Amplifier
3W Mono Filter-free Class-D Audio Power Amplifier Features 1.8V to 6V Single Supply Output Power: 3W at 5V and 4Ω speaker 5.1W at 6V and 3Ω speaker Up to 90% power efficiency Automatic output power control
BLOCK DIAGRAM. Functionality Table 1 details the differences between the parts to assist designers in selecting the optimal part for their design.
FEATURES LVPECL Outputs Optimized for Very Low Phase Noise (-165dBc/Hz) Up to 800MHz Bandwidth Selectable 1, 2 Output Selectable Enable Logic 3.0V to 3.6V Operation RoHS Compliant Pb Free Packages BLOCK
Quad PLL Programmable Clock Generator with Spread Spectrum
Quad PLL Programmable Clock Generator with Spread Spectrum Features Four fully integrated phase-locked loops (PLLs) Input Frequency range: External crystal: 8 to 48 MHz External reference: 8 to 166 MHz
Dimmable, Low Noise, Dual EL Lamp Driver. 100µH Coilcraft LPS MΩ VREG VOUT LX CS 3 12 VDD EL1 2.0MΩ HV861K7-G. REL-Osc COM1 2. RSW-Osc.
Supertex inc. HV86 Features Adjustable output regulation for dimming Lamp fade-in/fade-out capability Low audible noise 80V PP output voltage for higher brightness.v enable input logic high Single cell
Product Specification PE42851
PE42851 Product Description The PE42851 is a HaRP technology-enhanced SP5T high power RF switch supporting wireless applications up to 1 GHz. It offers maximum power handling of 42.5 m continuous wave
PI6C49X0204A. Low Skew 1 TO 4 Clock Buffer. Features. Description. Block Diagram. Pin Assignment
Features ÎÎLow skew outputs (250 ps) ÎÎPackaged in 8-pin SOIC ÎÎLow power CMOS technology ÎÎOperating Voltages of 1.5 V to 3.3 V ÎÎOutput Enable pin tri-states outputs ÎÎ3.6 V tolerant input clock ÎÎIndustrial
CAT bit Programmable LED Dimmer with I 2 C Interface DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT
16-bit Programmable Dimmer with I 2 C Interface FEATURES 16 drivers with dimming control 256 brightness steps 16 open drain outputs drive 25 ma each 2 selectable programmable blink rates: frequency: 0.593Hz
A8160A. AiT Semiconductor Inc. APPLICATION ORDERING INFORMATION TYPICAL APPLICATION
DESCRIPTION The is a step-up DC-DC converter specifically designed for driving white LEDs with a constant current. The internal MOSFET can support up to 10 White LEDs for backlighting and OLED power application,
Low-Jitter Precision LVPECL Oscillator
DSC0 General Description The DSC0 & series of high performance oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages and temperatures.
1A Buck/Boost Charge Pump LED Driver
1A Buck/Boost Charge Pump LED Driver Description The Buck/Boost charge pump LED driver is designed for powering high brightness white LEDs for camera flash applications. The automatically switches modes
One-PLL General Purpose Clock Generator
One-PLL General Purpose Clock Generator Features Integrated phase-locked loop Low skew, low jitter, high accuracy outputs Frequency Select Pin 3.3V Operation with 2.5 V Output Option 16-TSSOP Benefits
HT9170 DTMF Receiver. Features. General Description. Selection Table
DTMF Receiver Features Operating voltage 2.5V~5.5V Minimal external components No external filter is required Low standby current (on power down mode) Excellent performance Tristate data output for C interface
OBSOLETE. RF Output DOC-02145
Product Description The PE436 is a high linearity, 5-bit RF Digital Step Attenuator (DSA) covering a 3 db attenuation range in db steps, and is pin compatible with the PE43x series. This 5-ohm RF DSA provides
MK2705 AUDIO CLOCK SOURCE. Description. Features. Block Diagram DATASHEET
DATASHEET MK2705 Description The MK2705 provides synchronous clock generation for audio sampling clock rates derived from an MPEG stream, or can be used as a standalone clock source with a 27 MHz crystal.
IS62WV10248EALL/BLL IS65WV10248EALL/BLL. 1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
1Mx8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM KEY FEATURES High-speed access time: 45ns, 55ns CMOS low power operation 36 mw (typical) operating TTL compatible interface levels Single power supply
3-Channel Fun LED Driver
3-Channel Fun LED Driver Description is a 3-channel fun LED driver which features two-dimensional auto breathing mode. It has One Shot Programming mode and PWM Control mode for RGB lighting effects. The
SM General Description. ClockWorks. Features. Applications. Block Diagram
ClockWorks PCI-e Octal 100MHz/200MHz Ultra-Low Jitter, HCSL Frequency Synthesizer General Description The is a member of the ClockWorks family of devices from Micrel and provides an extremely low-noise
INTEGRATED CIRCUITS. PCA9515 I 2 C bus repeater. Product data Supersedes data of 2002 Mar May 13
INTEGRATED CIRCUITS Supersedes data of 2002 Mar 01 2002 May 13 PIN CONFIGURATION NC SCL0 1 2 8 V CC 7 SCL1 SDA0 3 6 SDA1 GND 4 5 EN DESCRIPTION The is a BiCMOS integrated circuit intended for application
HT9172 DTMF Receiver. Features. General Description. Block Diagram
DTMF Receiver Features Operating voltage 2.5V~5.5V Minimal external component requirements No external filter required Low standby current in power down mode) Excellent performance Tristate data output
HT82V mW Mono Audio Power Amp
00mW Mono Audio Power Amp Features Operating voltage: 2.2 V~5.5V High signal-to-noise ratio Low distortion Low power on and chip enable/disable pop noise Output power 00mW at 10% THDN into 8 Large output
DS1075. EconOscillator/Divider PRELIMINARY FEATURES PIN ASSIGNMENT FREQUENCY OPTIONS
PRELIMINARY EconOscillator/Divider FEATURES Dual Fixed frequency outputs (200 KHz 100 MHz) User programmable on chip dividers (from 1 513) User programmable on chip prescaler (1, 2, 4) No external components
Universal Programmable Clock Generator (UPCG)
Universal Programmable Clock Generator (UPCG) Features Spread Spectrum, VCXO, and Frequency Select Input frequency range: Crystal: 8 30 MHz CLKIN: 0.5 100 MHz Output frequency: LVCMOS: 1 200 MHz Integrated
A3909. Dual Full Bridge Motor Driver. Description. Features and Benefits. Packages: Functional Block Diagram
Features and Benefits Low R DS(on) outputs Drives two DC motors or single stepper motor Low power standby (Sleep) mode with zero current drain Thermal shutdown protection Parallel operation option for.8
FailSafe PacketClock Global Communications Clock Generator
Features FailSafe PacketClock Global Communications Clock Generator Fully integrated phase-locked loop (PLL) FailSafe output PLL driven by a crystal oscillator that is phase aligned with external reference
UM Ω Ultra Low ON-Resistance Dual SPDT Analog Switch UM5223 QFN General Description. Applications
0.5Ω Ultra Low ON-Resistance Dual SPDT Analog Switch UM5223 QFN10 1.8 1.4 General Description The UM5223 is a low on-resistance (R ON ), dual single-pole/double-throw (SPDT) analog switch operates from
MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-01 Description The MK1714-01 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread spectrum designed to generate high frequency clocks
MK SPREAD SPECTRUM MULTIPLIER CLOCK. Description. Features. Block Diagram DATASHEET
DATASHEET MK1714-02 Description The MK1714-02 is a low cost, high performance clock synthesizer with selectable multipliers and percentages of spread designed to generate high frequency clocks with low