W588AXXX Data Sheet. 8-BIT MCU WITH VOICE SYNTHESIZER (PowerSpeech TM Series) Table of Contents-
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1 Data Sheet 8-BIT MCU WITH VOICE SYNTHESIZER (PowerSpeech TM Series) Table of Contents- 1. GENERAL DESCRIPTION FEATURES PIN DESCRIPTION BLOCK DIAGRAM ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings D.C. Characteristics A.C. Characteristics APPLICATION CIRCUITS PWM Output DAC Output REVISION HISTORY... 8 Publication Release Date: June 29, Revision A5
2 1. GENERAL DESCRIPTION The W588Axxx is a 8-bit microcontroller-based speech synthesizer with PWM mode output to drive speaker directly. It is suitable for multi-tasking toy application. The W588Axxx family contains several items with different playback duration as shown below: Item W588A003 W588A006 W588A009 W588A012 W588A015 *Duration 4 sec. 7 sec. 12 sec. 16 sec. 19 sec. Item W588A020 W588A025 W588S030 W588A040 W588A050 Duration 25 sec. 29 sec. 32 sec. 50 sec. 58 sec. Item W588A060 W588A080 W588A100 W588A120 Duration 66 sec. 100 sec. 118 sec. 133 sec. Note: *: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and program code have been excluded from user s ROM space for the duration estimation. 2. FEATURES Wide Operating voltage: 2.4 ~ 5.5 volt System clock 4 MHz at 2.4 ~ 5.5 volt 8 MHz at 3.6 ~ 5.5 volt F/W speech synthesis 5-bit MDPCM, 4-bit ADPCM, or 8-bit PCM algorithm can be used Programmable sample rate Provides DAC and/or PWM output to drive speaker (W588A003/006 only PWM) Built-in 1~2 timer (Timer0/1) for speech synthesis, tone melody and IR application Provide power management to save current consumption: 4 ~ 8 MHz system clock, with Ring type oscillator Stop mode for stopping all IC operations Provides 4 I/O and 4 Out in W588A003~A006 and 8I/O in W588A009~A120 Provides IR carrier generation Provides watch dog timer (WDT) Provides low-voltage-reset (LVR) Shared ROM for voice and program storage Support PowerScript TM for developing codes in easy way Full-fledged development system Source-level ICE debugger (Assembly and PowerScript TM format) Event synchronization mechanism Compatible with W566B/C, W567S, W588S system User-friendly GUI environment - 2 -
3 3. PIN DESCRIPTION NAME I/O DESCRIPTION VSS, VSS1_SPK, VSS2_SPK - Negative power supply for Up, peripherals and PWM. PWM+/DAC O PWM driver positive output / DAC output. PWM- O PWM driver negative output VDD, VDD1_SPK - Positive power supply for up and peripherals. /RESET I Active low reset pin, to reset whole device. TEST I Test pin, internally pulled low. *OP0[3:0] O Output port. The pins of OP0 are Inverter-type output. BP0[7:4] **BP0[0:3] I/O I/O multiplexed port. As output port, the pins can be set as open drain type or CMOS type. As input port, the pins can be set with pull-high resistor or not. Interrupt will be generated to release IC from STOP mode upon triggering. When BP0[7] is used as output pin, it can be the IR transmission carrier output for IR applications. OSC I Connect ROSC to VSS to generate the master clock *: Only for W588A003~A006 **: Only for W588A009~A120 Publication Release Date: June 29, Revision A5
4 4. BLOCK DIAGRAM OSC OSC Divider 65C02 Decoder ROM RESET RAM BP04~0 OP00~0 IO Port Interrupt Logic Timer Voice Channel PWM SPK SPK 5. ELECTRICAL CHARACTERISTICS 5.1 Absolute Maximum Ratings PARAMETER SYMBOL CONDITIONS RATED VALUE UNIT Power Supply VDD VSS to +7.0 V Input Voltage VIN All Inputs VSS -0.3 to VDD +0.3 V Storage Temp. TSTG to +150 C Operating Temp. TOPR - 0 to +70 C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device
5 5.2 D.C. Characteristics (V DD V SS = 4.5 V, Ta = 25 C, No Load unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT Operating Voltage V DD F SYS = 4M Hz F SYS = 8M Hz Operating Current I OP1 No load, Fosc = 4 MHz ma Standby Current (STOP) I DD1 No load µa Input Low Voltage V IL All input pins V SS - 0.3V DD V Input High Voltage V IH All input pins 0.7V DD - V DD V Input Current (BP0) I IN VIN = 0V µa Output Current (BP0) Output Current (OP0) Output Current SPK+ / SPK- DAC full scale current Operation Current of Low Voltage Reset Pull-low Resistor I OL V DD = 3V, V OUT = 0.4V ma I OH V DD = 3V, V OUT = 2.6V ma I OL V DD = 3V, V OUT = 0.4V ma I OH V DD = 3V, V OUT = 2.6V ma I OL1 RL = 8 Ohm, ma Connection: I OH1 [SPK+]----[RL]----[SPK-] ma I DAC V DD =4.5V, RL = 100Ω V -6.0 ma I LVR VDD = 4.5V 60 ua R IN All input pins except RESETB KΩ RESERB KΩ Publication Release Date: June 29, Revision A5
6 5.3 A.C. Characteristics (V DD V SS = 4.5 V, Ta= 25 C, No Load unless otherwise specified) PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT Main-clock Frequency Main-clock Wake-up Delay Frequency Deviation by Voltage Drop Main Oscillator, Ring FM WDm F F ROSC = 300 Kohm ROSC = 150 Kohm Ring type, CPU clock = 4 MHz F - F FMIN MAX MIN MHz ms % Cycle Time Tcyc CPU clock = 4 MHz DC ns Reset Signal Width T RST FM is enabled Clocks of F M - 6 -
7 6. APPLICATION CIRCUITS 6.1 PWM Output uF 0.1uF VDD VDD1_SPK W588A PWM Type BP04 BP07 ROSC OSC W588Axxx OP00 OP03 PWM+ Reset Switch 0.1uF /RESET VSS/ VSS1_SPK/ VSS2_SPK PWM- Speaker 6.2 DAC Output VCC 4.7uF 0.1uF 10 VDD VDD1_SPK W588A DAC Type BP00 BP07 VCC OSC Reset Switch ROSC 0.1uF /RESET W588Axxx VSS/ VSS1_SPK/ VSS2_SPK SPK+ SPK- Rs Speaker 8050 Notes: 1. The typical value of Rosc is 150 KΩ for 8MHz and 300 KΩ for 4MHz and should be connected to GND (VSS). 2. Please refer to design guide to get typical Rosc value for each part number. 3. In PCB layout, VSS1_SPK, VSS2_SPK should be connected to VSS; VDD1_SPK should be connected to VDD. 4. The Rs value is suggested in 270Ω ~ 1KΩ to limit too large DAC output current flowing into transistor. 5. The capacitor, 0.1uF, shunts between VDD and GND is necessary to filter power noise. 6. The capacitor, 4.7uF, shunts between VDD and GND is optional as power stability. 7. The 10Ω that between VDD and GND is to limit huge current flow into chip as driving too heavy loading. 8. The above application circuits are for reference only. No warranty for mass production. Publication Release Date: June 29, Revision A5
8 7. REVISION HISTORY REVISION DATE MODIFICATIONS A1 Oct. 23, 2002 Preliminary release. A2 April 8, 2004 A3 May 11, 2004 Change the name Low-Voltage-Detect (LVD) to Low-Voltage-Reset (LVR). Add Pull High Resistance as 450K ohm in D.C. Characteristics. Change the pin description name Change application circuit diagram A4 May 31, 2004 Add the operation current of Low-Voltage-Reset A5 June 29, 2004 Modify provides 4 I/O and 4 Out in W588A003~A006 and 8I/O in W588A009~A120 Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: FAX: Taipei Office 9F, No.480, Rueiguang Rd., Neihu District, Taipei, 114, Taiwan, R.O.C. TEL: FAX: Winbond Electronics Corporation America 2727 North First Street, San Jose, CA 95134, U.S.A. TEL: FAX: Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, Shinyokohama Kohoku-ku, Yokohama, TEL: FAX: Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, China TEL: FAX: Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: FAX: Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners
1. GENERAL DESCRIPTION FEATURES PIN DESCRIPTION BLOCK DIAGRAM... 5
Table of Contents- 1. GENERAL DESCRIPTION... 2 2. FEATURES... 3 3. PIN DESCRIPTION... 4 4. BLOCK DIAGRAM... 5 5. ELECTRICAL CHARACTERISTICS... 5 5.1 Absolute Maximum Ratings... 5 5.2 D.C. Characteristics...
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