LI-3100 Area Meter. Service Manual

Transcription

1 LI-3100 Area Meter Service Manual Publication No February, 1983 Revised September, 1995 LI-COR, inc Superior Street P.O. Box 4425 Lincoln, Nebraska USA Telephone: FAX: Toll-free (U.S. & Canada) Copyright LI-COR, inc.

2 Introduction This latest edition of the LI-3100 Service Manual was revised in September, The original editions covered all instruments with serial numbers up through This new edition adds Section III, which contains the circuit descriptions and diagrams for instruments with serial numbers 1010 and above. Section III also contains information on replaceable parts for these newer instruments. For older instruments, this information is listed in Appendices A through E located between Section II and III. Important Notice These technical documents and drawings are given in good faith solely for the purpose of servicing the LI-3100 Area Meter. This information is a proprietary product of LI-COR, inc., Lincoln, Nebraska, USA, and shall not be released nor be disclosed, duplicated, or used for the purpose of design or manufacturing, without the express written permission of LI-COR.

3 Table of Contents Section I. General Information 1.1 Introduction Description Ordering Replacement Parts Theory of Operation Functional Diagram Description Resolution Options Section II. Circuit Description (S/N 1009 and Below) 2.1 Power Supply PLL and Lamp Driver Scanner Control and Count Detection Counter Logic and Display LI-3000A Console Interface Troubleshooting Aids 2.6a Power Supply Regulator Troubleshooting b Line Scanner Control Circuitry Troubleshooting Functional Diagram Schematic 1. Power Supply Schematic 2. PLL and Lamp Driver Schematic 3. Scanner Control and Count Detection Schematic 4. Counter Logic and Display Timing Diagram Component Layouts APPENDIX A - A1 Control Assembly Parts List... A-1 APPENDIX B - A2 Line Scanner Assembly Parts List... B-1 APPENDIX C - A3 Display Assembly Parts List... C-1 APPENDIX D - A4 Chassis Parts List... D-1 APPENDIX E - Specifications... E-1 Section III. Circuit Description (S/N 1010 and Above) 3.1 Power Supply PLL and Lamp Driver Scanner Control and Count Detection Counter Logic and Display LI-3000A Console Interface Troubleshooting Aids 3.6a Power Supply Regulator Troubleshooting b Line Scanner Control Circuitry Troubleshooting Schematic 5. Primary Wiring Diagram Schematic 6. Main Board Schematic 7. Main Board Schematic 8. Video Board Video Board Timing Diagram Video Board Component Layout Main Board Component Layout Warranty

4 Section I General Information 1.1 Introduction This section contains general information concerning the LI-COR LI-3100 Area Meter. Included is a description of the instrument and the theory of operation. The operation instructions for the LI-3100, which are given in the LI-3100 Instruction Manual, are not duplicated in this manual. 1.2 Description The LI-COR LI-3100 Area Meter is an instrument capable of measuring the area of non-transparent items. The LI-3100 is available with area sensing resolutions of 1.0 mm 2 or 0.1 mm 2. Capability for both 1.0 mm 2 and 0.1 mm 2 area sensing resolution can be provided on the same instrument. The LI-3100 consists of a transparent belt conveyer mechanism, an object illumination lamp, and area unit scanning, counting, and display circuitry. Serial numbers for the LI-3100 Area Meter are designated as LAM XXX-YYMM where LAM means Laboratory Area Meter. XXX is a number which identifies a particular instrument. The YYMM identifies the year and the month of manufacture of the instrument. 1.3 Ordering Replacement Parts To order a replacement part please be sure to send the following information: the instrument model number, the instrument serial number, the part reference designator and part description. If the part is not listed in this manual, give a description of the part, its function and location within the instrument, along with the instrument model number and the instrument serial number. Send orders for parts to: LI-COR inc., P.O. Box 4425, 4421 Superior Street, Lincoln, Nebraska, 68504, USA. 1.4 Theory of Operation The method by which the LI-3100 measures area is best understood by examining the technique for manual area measurement. The manual area measurement technique requires tracing the outline of the sample on grid paper and counting the squares where the sample covers fifty percent or more of the area of an individual grid cell. Each grid cell would be methodically examined, keeping account of each grid row and each grid column. The width of the sample at a given point is determined by the number of grid cells covered across a row. The number of grid cells covered in a column determines the length. The resolution of this measurement technique is a function of the area represented by each grid cell. If the 50% criterion for the acceptance or rejection of grid cells were not used, the result would be non-linearity in the measured area. In other words, if the grid cells with fifty percent or more area covered were not counted, the 1-1

5 result would be inconsistent data on repeated measurements. Similarly, if the sample were cut into pieces and the individual pieces summed, the results would likely not equal the measurement of the whole sample. The function of the LI-3100 Portable Area Meter is to use electronic methods to simulate a grid pattern on the leaf. Samples are placed between the guides on the lower transparent belt and allowed to pass through the instrument. As items travel under the 15 watt fluorescent light source, the image is reflected by a system of three mirrors to a solid state scanning camera within the rear housing. The mirrors are mounted on the instrument base plate. Two are visible under the transparent belts. The third is within the rear housing. The solid state scanning camera is a self-scanning photodiode array with 256 elements. Each photodiode element is used to examine a representative grid cell across the width between the sample guides. When the item being measured blocks the light from reaching a photodiode element, an area unit is accumulated on the display. The solid state camera scans across the width between the sample guides, accumulating area units for each grid cell where more than 50 percent of the light is blocked. The sample is advanced by the transparent conveyer belt to allow a new row of grid cells to be examined. An important aspect of this electronic measurement technique is that it requires that the light source be uniform in intensity as each grid cell is examined. This gives a consistent acceptance/rejection threshold for each grid cell. 1.5 Functional Diagram Description The following text refers to the FUNCTIONAL DIAGRAM of the LI-3100 Area Meter found with the schematic diagrams later in this manual. The POWER SUPPLY provides the necessary voltages for all the electronic circuitry. The 15 watt fluorescent light source is powered by a DC inverter LAMP DRIVER. This is necessary to provide constant intensity of illumination during the period when grid cells are examined. A signal from the power transformer is connected to the PHASE-LOCKED LOOP circuitry. AC SYNC provides a signal to which the clock signals used in the digital circuitry are synchronized. Synchronization of the clock signals to the AC power line frequency enables the scanning sequence of the LINE SCANNER to be periodic to the motion of the conveyer belt which is driven by a synchronous motor; i.e., if the synchronous motor slows down, the time period between scanning sequences is increased. Synchronization of the circuitry which scans across the width of the sample and of the belt motion is necessary for precise area measurement. The PHASE-LOCKED LOOP provides a square wave drive signal to the LAMP DRIVER circuitry and a clock signal to the scanner control circuitry. The square wave to the LAMP DRIVER assures balanced lamp intensity over the period of time in which the photodiode elements in the LINE SCANNER examine grid cell locations. LINE 4 to the SCANNER CONTROL circuitry enables a scan cycle to occur four times per cycle of AC line voltage. The SCANNER CONTROL AND COUNT DETECTION circuit produces the start pulse and the two-phase clock which drive the LINE SCANNER during a scan cycle. The 256 photodiodes in the LINE SCANNER produce current whenever light strikes them. Each photodiode has a capacitor (internal to the integrated circuit) associated with it. The capacitor accumulates the current produced by its companion photodiode over the period of time between scan cycles. When a scan cycle occurs, the circuitry internal to the LINE SCANNER serially selects each capacitor and dumps its accumulated charge into the transimpedance amplifier to produce a voltage pulse representative of the amount of light sensed by the photodiode. A series of 256 voltage pulses, each representative of the amount of light striking a grid location, are then examined by the VIDEO COMPARATOR to see if this 1-2

6 voltage amplitude overcomes the acceptance/rejection threshold value set by the CAL(ibration) potentiometer on the front panel of the instrument. Those pulses which are greater than the threshold are allowed to pass to the COUNT DETECTION CIRCUITRY to block count pulses. A count pulse is allowed to pass to counters on the DISPLAY to be accumulated and displayed on the readout when the VIDEO COMPARATOR fails to send a pulse to the COUNT DETECTION CIRCUITRY. 1.6 Resolution Options Two resolution options are available for the LI-3100 Area Meter. Choice of resolution option dictates the use of a specific lens with a factory-calibrated F-stop and focus setting. The lens and the position to which it is set are factory-calibrated to enable the LINE SCANNER to examine points at precise intervals across the total width between the sample guides. Proper operation with a selected option dictates the following: 1) The correct factory calibrated lens be used. 2) The lens be in its correct position on the camera alignment rail. 3) The proper sample guides be used. 4) The proper resolution be selected by switch S1 on the DISPLAY assembly. 5) Proper adjustment be made to the CAL potentiometer. 1-3

7 Section II Circuit Description (S/N 1009 and Below) 2.1 Power Supply Schematic 1, illustrates the POWER SUPPLY circuitry of the LI This includes the AC power jack, power transformers, voltage regulators, and the synchronous motor which drives the conveyer mechanism. AC power is received through the line cord to jack J17. The input is protected by fuse F1. When the ON/OFF switch is closed, the line voltage is applied across autotransformer T3. The voltage selector card in the 120 VAC position connects pin E to pin F, permitting the full line voltage to be applied to the primary of transformer T1. When the voltage selector card is in the 240 VAC position, pin E is connected to pin D. This selects the tap on autotransformer T3. With 240 VAC input the autotransformer output at its tap (pin D) is 120 VAC. The voltage selector card and the autotransformer function together to provide 120 VAC to the primary of transformer T1 and to synchronous motor M1 which drives the conveyer mechanism. Transformer T1 has two secondary windings of 34 VRMS each. These secondary windings are wired in parallel with their center taps connected to circuit ground. Plug P11 of the wiring harness connects the secondary windings of transformer T1 to the CONTROL Assembly A1. A full wave rectifier composed of diodes D1-D4 provides a DC voltage of approximately +25 volts on filter capacitor C2 and -25 volts on filter capacitor C24. These voltages are inputs to the DUAL POLARITY TRACKING REGULATOR which provides regulated voltage outputs of +15 and -15 volts. The +25 volts also powers the +8 VOLT REGULATOR, the +5 VOLT REGULATOR, and the +16 VOLT REGULATOR. The output of the +8 VOLT REGULATOR is distributed through jack J6 to the DISPLAY assembly. The output of the +5 VOLT REGULATOR is used as the reference for the +16 VOLT REGULATOR and is also distributed to the CONTROL assembly. The +16 VOLT REGULATOR has a basic differential amplifier stage, which compares the +5 volt reference on the base of transistor Q3 to a proportional signal of the regulator output on the base of transistor Q4. The difference between the two signals produces a control signal to transistor Q5. Transistor Q5 then amplifies this control signal and applies it to the series-pass transistor Q1, causing it to correct the error in the output voltage. 2.2 PLL and Lamp Driver Schematic 2 illustrates the PHASE-LOCKED LOOP AND LAMP DRIVER circuitry. The PHASE-LOCKED LOOP provides a square wave which drives the LAMP DRIVER and a clock signal, LINE 4, which is sent to the SCANNER CONTROL circuitry. The input to the PHASE-LOCKED LOOP is AC SYNC, a signal taken from the power transformer secondary in the power supply circuitry. AC SYNC originates as a sine wave. It is filtered and then clipped by the 5.2 volt Zener diode at pin 15 of integrated circuit U10. The clipped signal drives three buffers of U3 to provide a square wave signal to pin 14 of U10. Integrated circuit U10 is a phase-locked loop (PLL). The voltage controlled oscillator (VCO) of the PLL runs at a frequency which is sixteen times higher than the frequency of the AC SYNC signal. For 2-1

8 60 Hertz AC power the VCO operates at 960 Hertz (50 Hz/800 Hz). The output of the VCO is at pin 4 of U10. The signal is divided down in frequency by divider U6. The Q4 output, pin 6 of U6, is connected back to pin 3 of U10. The input at pins 3 and 14 of U10 are the inputs to the phase comparator which provides the correction signal to keep the VCO on frequency. The VCO output at pin 4 of U10 is inverted by transistor Q2 to provide the DISPLAY CLOCK signal to function as the digit scanning clock for the display. In addition, the VCO output is divided by U6 to provide an N 2 signal which functions as the drive to the LAMP DRIVER and N 4 (LINE 4) signal which functions as a synchronization clock to the SCANNER CONTROL circuitry. The N 2 signal to the LAMP DRIVER drives NOR gate U7, pin 6, and is inverted by NAND gate inverter U9 to drive NOR gate U7, pin 2. The fifteen watt fluorescent lamp is ignited by the LAMP START switch, S2. When switch S2 is depressed current from the +16 volt supply flows through the heaters of the lamp. Current also flows through the secondary of transformer T2, causing a magnetic field to build up. With the start switch depressed, a "1" state is held on pins 1 and 5 of the two U7 NOR gates to "0" until the LAMP START switch is released. When released, the magnetic field in the secondary of transformer T2 collapses. The voltage caused by the collapsing field ionizes the fluorescent lamp. After the LAMP START switch is released, a "0" state to both U7 NOR gates allows the out-of-phase clock signals to provide the necessary drive on the primary of transformer T2 to keep the lamp ionized. Two identical transistor circuits drive each half of the center-tapped transformer T2. Only one amplifier need be described. The output of buffer U3, pin 2, furnishes the necessary drive to darlington transistor Q10, which in turn provides drive to transistor Q12. When transistor Q12 is driven into saturation, causing current to flow in one half of the primary of transformer T2, transistor Q13 is off since the two circuits are driven by out-of-phase square waves. Diodes D8 and D10 along with transistors Q6 and Q8 function to shut off transistor Q12 in the event that the clock signal input fails. Out-of-phase signals alternating near ground potential on the cathodes of D8 and D10 keep capacitor C14 from charging sufficiently positive to turn on transistor Q6 unless the clock drive fails. If the clock drive to the LAMP DRIVER circuits fail, one of the power transistors will be left with a positive drive signal. For example, if the clock fails such that the output of buffer U3, pin 2, is a "1" state, this would cause transistor Q10 to conduct. Transistor Q10 conducting would cause transistor Q12 to conduct. If transistor Q12 remains conducting, the primary winding of transformer T2 will go into saturation. When the saturation condition occurs the current in the transformer winding will begin to approach that value limited only by the resistance of the winding. This increasing current causes the voltage on the collector of transistor Q12 to rise. Diodes D8 and D10 function as an AND gate sensing for positive voltage at both the base and collector Q12. When the AND gate inputs are true, current through resistor R40 charges capacitor C14 such that transistors Q6 and Q8 conduct, removing the base drive from Q12. The circuitry will remain in this protected condition until the clock input is restored. 2.3 Scanner Control and Count Detection Schematic 3 illustrates the conveyer mechanism, the SCANNER CONTROL circuitry, the LINE SCANNER and its transimpedance amplifier, the VIDEO COMPARATOR and COUNT DETECTION circuitry. Whenever the conveyer mechanism is in motion, the LINE SCANNER periodically examines small units of area across the width of the belt between the sample guides. The LINE SCANNER examines that area across the belt which is exactly under the fluorescent lamp. The light from the lamp is reflected by means of three mirrors and then focused by the lens onto the photodiode sensing elements in the LINE SCANNER. The photodiode elements sense the presence of the light and when a sample passes under the lamp, a certain portion of the sensing elements in the LINE SCANNER integrated circuit detect that the light from the lamp has been blocked. 2-2

9 At periodic intervals the control circuitry initiates an interrogation of the sensing elements in the LINE SCANNER integrated circuit. When this interrogation occurs the LINE SCANNER produces a series of current pulses, each one coming from a photodiode sensing element. These current pulses are converted to negative polarity voltage pulses by means of the transimpedance amplifier. The amplitude of these negative voltage pulses is proportional to the quantity of light which the photodiode element detected. When the sample blocks the light from a sensing element, its representative voltage pulse will be decreased in amplitude. The CAL potentiometer P1 is calibrated to a threshold value which determines at what amplitude the pulses are to be counted as valid area units. A serial stream of voltage pulses of maximum negative amplitude occurs at the output of the VIDEO COMPARATOR when no sample is present to block the light from the lamp. It is the function of the COUNT DETECTION circuitry to produce an output COUNT pulse when the sample causes a video pulse to be of sufficiently reduced amplitude (or its total absence) to merit the accumulation of a unit of area. The LINE SCANNER is interrogated at intervals of time proportional to the distance that the conveyer moves the sample. This is because the signal (LINE 4) which initiates an interrogation and the motor which drives the conveyer are dependent upon the AC power line frequency. LINE 4 is a square wave with a frequency four times that of the AC power line frequency. Each time LINE 4 goes negative, an interrogation of the LINE SCANNER occurs. The period of time from the beginning to the end of the LINE SCANNER interrogation is known as a scan cycle. The SCANNER CONTROL circuitry contains a 200 kilohertz oscillator to provide the source for the clock signals necessary to interrogate the LINE SCANNER. The 200 KHz OSCILLATOR consists of two one-shot multivibrators. The first one-shot multi-vibrator (OS1) is connected such that it oscillates at approximately 200 kilohertz. It drives the input to the second one-shot (OS2) to provide a 200 kilohertz clock signal output. The exact frequency and pulse period of the clock may vary depending upon RC networks R1C1 and R2C2 respectively. NOTE: It may be helpful to examine the TIMING DIAGRAM which illustrates those signals labeled on Schematic 3 with numbered hexagons. When LINE 4 has a negative transition, SCAN FLIP-FLOPS FF1 and FF2 provide inputs to NAND gate U9 to cause a pulse output from U9 which initializes the START FLIP-FLOP and the TWO-PHASE CLOCK FLIP- FLOPS. The "1" state output at pin 6 (TP1) of the START FLIP-FLOP drives transistor Q14 to produce a start pulse input to the interrogation circuitry internal to the LINE SCANNER integrated circuit U2. The TWO-PHASE CLOCK FLIP- FLOPS provide the clock signals necessary for the interrogation circuitry in the LINE SCANNER. The Q outputs of the two flip-flops drive high speed MOS clock drivers on the A1 LINE SCANNER assembly. As the first cycle of the two-phase clocks occur, the pin 8 output of flip-flop FF2 sets the START FLIP-FLOP. The pin 6 (TP1) output of the START FLIP-FLOP goes to a "0" state which ends the start pulse to the LINE SCANNER. The pin 5 output changes to a "1" state, which enables NOR gate U9 to allow negative pulses from the VIDEO COMPARATOR to set the COUNT INHIBIT FLIP-FLOP. As the transition occurs, flip-flop U8 is clocked to a "0" state at pin 12 to enable clock pulses to the COUNT INHIBIT FLIP-FLOP. The start pulse to the LINE SCANNER enables the internal circuitry of the LINE SCANNER to begin its sequence of interrogating each photodiode sensing element. The two-phase clock drives the internal circuitry of the LINE SCANNER to cause the output of each of the photodiode sensing elements to be gated serially into the input of the transimpedance amplifier. The transimpedance amplifier converts the current pulses in negative-going voltage pulses. These negative pulses function as input video to the VIDEO COMPARATOR. If a video input pulse into the VIDEO COMPARATOR is decreased in amplitude below the comparator threshold, no pulse is produced at the output of the comparator. Output pulses set the COUNT INHIBIT FLIP-FLOP. The COUNT INHIBIT FLIP-FLOP is normally clocked to a "0" state at its Q output by each positive transition of 200 kilohertz clock. The absence of a 2-3

10 pulse at the output of the VIDEO COMPARATOR leaves the COUNT INHIBIT FLIP-FLOP with a logical "0" output from pin 1 as an input to NAND gate U7. When the negative half-cycle of the 200 kilohertz clock occurs the output of NAND gate U7 produces a positive pulse at pin 10 (TP4), which results in a negative count pulse at the collector of transistor Q1. When 200 kilohertz clock returns positive, the transition ends the count pulse and clocks the COUNT INHIBIT FLIP-FLOP back to a "0" state output on pin 1 whenever it has been previously set to a "1" state output. The interrogation process continues until all of the photodiode sensing elements in the LINE SCANNER have been gated to the transimpedance amplifier. As the last element is interrogated, an end of scan (EOS) signal from the internal circuitry of the LINE SCANNER appears at pin 13. The signal is adjusted to 5-volt logic levels by transistor Q1 and resets the EOS FLIP-FLOP to a "1" state output at pin 8. This "1" state resets flip-flop U8 to cause a "1" state on pin 12 of NAND gate U7. This "1" state disables 200 kilohertz clock from producing any more count pulses until another scan cycle is initiated by the LINE 4 input to the SCANNER CONTROL circuitry. 2.4 Counter Logic and Display Schematic 4, illustrates the COUNTER LOGIC AND DISPLAY circuitry. The Display consist of eight seven-segment LED digits which operate in the multiplexed mode. Integrated circuits U1 and U2 contain the multiplex circuitry as well as the data counters necessary to accumulate the area unit counts. As DISPLAY CLOCK drives the digit scanning portions of U1 and U2, DECADE DIVIDER U4 divides DISPLAY CLOCK to provide the control signals necessary for proper digit blanking, decimal point indication, and BCD output selection. DECADE DIVIDER outputs Q0 and Q5 drive an RS flip-flop comprised of two NOR gates of U7. The output of the RS flip-flop causes either U1 or U2 to control LED digit selection and to furnish accumulated count data in BCD format to the BCD TO 7-SEGMENT DECODER for display. The BCD data also functions as inputs to the BLANKING DECODE GATES. One pole of switch S1 controls transistors Q25 and Q24 to select the proper decimal point position for display. This signal selected by S1 also functions as an input to the BLANKING DECODE GATES. The second pole of switch S1 selects either the input or the output of the DIVIDE-BY-THREE COUNTER as the input to the data counter of U1. The DIVIDE-BY-THREE COUNTER causes the counts of three scan cycles to be averaged in the 1.0 square millimeter resolution mode. 2.5 LI-3000A Console Interface The "Count Output Board" buffers the LI-3100 from the LI-3000A console. Each pulse from "count" represents one leaf pixel. The dimensions of this pixel depends on whether the LI-3100 is in the 1 mm 2 or the 0.1 mm 2 resolution mode. In the 1 mm 2 mode, each pixel equals cm long by 0.10 cm wide ( cm 2 area). The area displayed on the LI-3100 is obtained by counting the pixels, dividing by three, and then rounding off to 0.01 cm. Thus, One pixel equals cm, rounded off to 0.00 cm 2. Two pixels equal cm, rounded off to 0.01 cm 2. Three pixels equal cm, rounded off to 0.01 cm

11 In the 0.1 mm 2 mode, each pixel equals cm long by cm wide (0.001 cm 2 area). The display counts each pixel and displays the counts. The "EOS" pulse tells the LI-3000A when each scan is completed. The "CNTRL" signal clears the reading (it is high when the reset button is pressed). Pins 4 and 5 allow the LI-3000A to sense whether or not an LI-3100 is connected. 2.6 Troubleshooting Aids 2.6a Power Supply Regulators Verify the +16, +8, +5, +15, and -15 volt power supply voltages as all of these are essential for proper instrument operation. If the +16 Volt Regulator is defective, failure of the LAMP DRIVER circuitry should be suspected. It may be helpful to isolate these two circuits by disconnecting plug P10. Anytime the +16 volts REGULATOR is repaired, its output voltage should be set to +16 volts by means of potentiometer P1. The fluorescent lamp should be illuminated during this adjustment. If the Dual-Polarity Tracking Regulator fails, resistor R36 should be selected (either 1.10 or 1.15K 1%) to give an output voltage between and volts when a new regulator integrated circuit is installed. 2.6b Line Scanner Control Circuitry Verification of signals as shown on the TIMING DIAGRAM simplifies troubleshooting the SCANNER CONTROL AND COUNT DETECTION circuitry. It may be helpful to remove power from the synchronous motor by disconnecting plug P13. This stops the conveyer motion and facilitates placement of a sample under the fluorescent lamp to aid troubleshooting the COUNT DETECTION circuitry. At no time should the screws which hold the LINE SCANNER assembly A2 to the camera assembly be loosened. The positioning of LINE SCANNER assembly A2 behind the lens is critical to the optical alignment of the instrument. All electronic components except the LINE SCANNER integrated circuit may be serviced without harm to instrument alignment or specifications. Consult the factory if a failure of the LINE SCANNER INTEGRATED circuit is suspected. If other components on the LINE SCANNER assembly A2 fail, the camera assembly may be removed by loosening the four set screws of the outer camera pressure rail. The lens may be removed and the black tape which is wrapped around the standoffs which support the LINE SCANNER assembly may also be removed (the end of the tape is usually on the underside). Once the tape is removed, all components are accessible to a soldering pencil. If the clock driver integrated circuit fails, caution must be used to leave the gimmick (a short piece of wire which is epoxied in place and soldered to pin 5 of the clock driver integrated circuit) undisturbed. If the clock driver fails, cut off the pins of the integrated circuit as close to the body as possible. Then remove the pins one at a time by heating them on the component side of the board. A drill bit can be used to clean out the holes to enable a new IC to be put in place. Be certain that pin 5 is soldered to the gimmick. The gimmick is used to ensure that the video output pulses are of even amplitude. Failure to have the gimmick in place will result in a sawtooth appearance with every other video pulse of different amplitude. 2-5

12 Appendix A A1 Control Assembly Parts List Reference Designator A1C1 A1C2 A1C3 A1C4 A1C5 A1C6 A1C7 A1C8 A1C9 A1C10 A1C11 A1C12 A1C13 A1C14 A1C15 A1C16 A1C17 A1C18 A1C19 A1C20 A1C21 A1C22 A1C23 A1C24 A1C25 A1C26 A1C27 A1C28 A1C29 A1C30 A1D1 A1D2 A1D3 A1D4 A1D5 A1D6 A1D7 A1D8 A1D9 A1D10 A1D11 A1P1 Description CAPACITOR.001MF 1000V DISC CERAMIC CAPACITOR 390PF 1000V DISC CERAMIC CAPACITOR 2.2MF 25V TANTALUM CAPACITOR 2.2MF 25V TANTALUM CAPACITOR 2.2MF 25V TANTALUM CAPACITOR.022MF 25OV POLYESTER CAPACITOR.047MF 250V METALLIZED POLYESTER CAPACITOR.02MF 100V DISC CERAMIC CAPACITOR.02MF 100V DISC CERAMIC CAPACITOR 47PF 1000V DISC CERAMIC CAPACITOR 15MF 20V TANTALUM CAPACITOR 15MF 20V TANTALUM CAPACITOR 15MF 25V TANTALUM CAPACITOR 250MF 100V ELECTROLYTIC CAPACITOR 250MF 100V ELECTROLYTIC CAPACITOR 450MF 25V ELECTROLYTIC CAPACITOR 100PF 1000V DISC CERAMIC CAPACITOR 1500PF 1000V DISC CERAMIC CAPACITOR 1500PF 1000V DISC CERAMIC CAPACITOR 15MF 20V TANTALUM CAPACITOR 15MF 20V TANTALUM DIODE RECTIFIER I=5A VBR=50V DIODE RECTIFIER I=5A VBR=50V DIODE 1N5060 RECTIFIER VBR=400V IF=1.5A DIODE 1N5060 RECTIFIER VBR=400V IF=1.5A DIODE 1N5060 RECTIFIER VBR=400V IF=1.5A DIODE 1N5060 RECTIFIER VBR=400V IF=1.5A DIODE 1N4755A ZENER 43 VOLT 1 WATT DIODE 1N914 SIGNAL DIODE 1N914 SIGNAL DIODE 1N914 SIGNAL DIODE 1N914 SIGNAL TRIMPOT 200OHM SINGLE TURN CERMET A-1

13 Reference Designator A1Q1 A1Q2 A1Q3 A1Q4 A1Q5 A1Q6 A1Q7 A1Q8 A1Q9 A1Q10 A1Q11 A1Q12 A1Q13 A1Q14 A1R1 A1R2 A1R3 A1R4 A1R5 A1R6 A1R7 A1R8 A1R9 A1R10 A1R11 A1R12 A1R13 A1R14 A1R15 A1R16 A1R17 A1R18 A1R19 A1R20 A1R21 A1R22 A1R23 A1R24 A1R25 A1R26 A1R27 A1R28 A1R29 A1R30 A1R31 A1R32 A1R33 A1R34 Description TRANSISTOR D45C3 PNP SI IC=4A PD=30W TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR D44H8 NPN SI IC=10A PD=50W TRANSISTOR D44H8 NPN SI IC=10A PD=50W TRANSISTOR MPS6519 PNP SI IC=100MA VCE=25 VOLTS PD=310MW RESISTOR 15K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 680 ohm 1/4w 5% CF RESISTOR 680 ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 2.2K-ohm 1/4w 5% CF RESISTOR 1.2K-ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 470 ohm 1/4w 5% CF RESISTOR 33 ohm 1/4w 5% CF RESISTOR 33 ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 27K-ohm 1/4w 5% CF RESISTOR 150K-ohm 1/4w 5% CF RESISTOR 470K-ohm 1/4w 5% CF RESISTOR 470K-ohm 1/4w 5% CF RESISTOR 33K-ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 3.3K-ohm 1/4w 5% CF RESISTOR 1.5K-ohm 1/4w 5% CF RESISTOR 1.5K-ohm 1/4w 5% CF RESISTOR 2.21K-ohm 1/8w 1% MF RESISTOR 1K-ohm 1/8w 1% MF RESISTOR 3.3K-ohm 1/4w 5% CF RESISTOR 100 ohm 1w 10% CC A-2

14 Reference Designator A1R35 A1R36 A1R37 A1R38 A1R39 A1R40 A1R41 A1R42 A1R43 A1R44 A1R45 A1R46 A1R47 A1R48 A1R49 A1R50 A1R51 A1U1 A1U2 A1U3 A1U4 A1U5 A1U6 A1U7 A1U8 A1U9 A1U10 A1U11 A1U12 Description RESISTOR 1K-ohm 1/4w 1% MF RESISTOR SELECTED 1.10K OR 1.15K 1% FOR 14.5 TO 15.0 VOLTS RESISTOR 4.7 ohm 1/4w 5% CF RESISTOR 15 ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 3.3K-ohm 1/4w 5% CF RESISTOR 3.3K-ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 10K-ohm 1/4w 5% CF RESISTOR 39 ohm 1/2w 5% CF RESISTOR 39 ohm 1/2w 5% CF RESISTOR 330 ohm 1/4w 5% CF RESISTOR 330 ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF RESISTOR 10 ohm 1/4w 5% CF IC DM9602 TTL DUAL RETRIGERRABLE RESETTABLE ONE SHOTS ICDM74S74N TTL DUAL D POSITIVE-EDGE-TRIGGERED FLIP-FLOP IC CMOS CD4050 NON-INVERTING HEX BUFFERS IC CMOS MM74C74N DUAL D FLIP-FLOP IC CMOS CD4013AE DUAL TYPE D FLIP-FLOP IC CMOS CD4024AE SEVEN STAGE RIPPLE COUNTER IC CMOS CD4001AE QUAD 2-INPUT NOR GATE IC CMOS CD4013AE DUAL TYPE D FLIP-FLOP IC CMOS CD4011AE QUAD 2-INPUT NAND GATE IC CMOS CD4046 PHASED-LOCKED LOOP IC LM311 VOLTAGE COMPARATOR IC MC1468R DUAL POLARITY 15-VOLT TRACKING REGULATOR A-3

15 Appendix B A2 Line Scanner Assembly Parts List Reference Designator A2C1 A2C2 A2C4 A2C5 A2C6 A2D1 A2Q1 A2R1 A2R2 A2R3 A2R4 A2R5 A2R6 A2R7 A2R8 A2R9 A2R10 A2R11 A2R12 A2R13 A2R14 A2U1 A2U2 A2U3 Description CAPACITOR.01MF 50V DISC CERAMIC DIODE 1N754 ZENER 6.8 VOLTS PD=400MW TRANSISTOR MPS6515 NPN SI IC=100MA VCE=25 VOLTS PD=310MW RESISTOR 10 ohm 1/4W 5% CF RESISTOR 10 ohm 1/4W 5% CF RESISTOR 10 ohm 1/4W 5% CF RESISTOR 61.9K-ohm 1/8W 1% MF RESISTOR 6.19K-ohm 1/8W 1% MF RESISTOR 47K-ohm 1/4W 5% CF RESISTOR 5.1K-ohm 1/4W 5% CF RESISTOR 10 ohm 1/4W 5% CF RESISTOR 10 ohm 1/4W 5% CF RESISTOR 1K-ohm 1/8W 1% MF RESISTOR 10K-ohm 1/8W 1% MF RESISTOR 2.2K-ohm 1/4W 5% CF RESISTOR 10K-ohm 1/4W 5% CF RESISTOR 5.1K-ohm 1/4W 5% CF ICMHOO26C 5 MHZ TWO PHASE MOS CLOCK DRIVER RETICON RL256EC 256 ELEMENT LINE SCANNER IC2625 WIDEBAND OP AMP B-1

16 Appendix C A3 Display Assembly Parts List Reference Designator A3C1 A3DS1 A3DS2 A3DS3 A3DS4 A3DS5 A3DS6 A3DS7 A3DS8 A3P1 A3Q1 A3Q2 A3Q3 A3Q4 A3Q5 A3Q6 A3Q7 A3Q8 A3Q9 A3Q10 A3Q11 A3Q12 A3Q13 A3Q14 A3Q15 A3Q16 A3Q17 A3Q18 A3Q19 A3Q20 A3Q21 A3Q22 A3Q23 A3Q24 A3Q25 A3R1 A3R2 A3R3 A3R4 A3R6 A3R7 A3R8 Description CAPACITOR 15MF 20V TANTALUM LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE LED SEVEN SEGMENT DISPLAY 0.3" ORANGE COMMON ANODE POTENTIOMETER 2.5K OHM 2.25W SINGLE TURN TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES5306 NPN DARLINGTON SI IC=300MA PD=400MW TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W TRANSISTOR GES6011 PNP SI PD=1W C-1

17 Reference Designator A3R9 A3R10 A3R11 A3R12 A3R13 A3R14 A3R15 A3R16 A3R17 A3R18 A3R20 A3R21 A3R22 A3R23 A3R24 A3R25 A3R26 A3R27 A3R28 A3R29 A3R30 A3R31 A3R32 A3R33 A3R34 A3R35 A3R36 A3R37 A3R38 A3R39 A3R40 A3R41 A3R42 A3R43 A3R44 A3R45 A3R46 A3S1 A3S2 A3U1 A3U2 A3U3 A3U4 A3U5 A3U6 A3U7 Description RESISTOR 47 ohm 1/2w 5% CF RESISTOR 47 ohm 1/2w 5% CF RESISTOR 47 ohm 1/2w 5% CF RESISTOR 47 ohm 1/2w 5% CF RESISTOR 47 ohm 1/2w 5% CF RESISTOR 47 ohm 1/2w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 330 ohm 1/4w 5% CF RESISTOR 33K-ohm 1/4w 5% CF RESISTOR 39 ohm 1/2w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 1K-ohm 1/4w 5% CF RESISTOR 100K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 22K-ohm 1/4w 5% CF RESISTOR 6.8K-ohm 1/4w 5% CF RESISTOR 6.8K-ohm 1/4w 5% CF SWITCH TOGGLE DPDT C & K 7201AE SWITCH MOMENTARY SPST NC ALCO MSPM-101BS IC CMOS MC14534 REAL TIME 5-DECADE COUNTER IC CMOS MC14534 REAL TIME 5-DECADE COUNTER IC CMOS CD4013AE DUAL TYPE D FLIP-FLOP IC CMOS CD4017AE DECADE COUNTER IC CMOS MC14511 BCD-TO-SEVEN SEGMENT LATCH/DECODER/DRIVER IC CMOS CD4071 QUAD 2-INPUT OR GATE IC CMOS CD4001AE QUAD 2-INPUT NOR GATE C-2

18 Appendix D A4 Chassis Parts List Reference Designator Description A4C1 CAPACITOR.68MF 400VDC MOLDED POLYESTER A4C2 CAPACITOR 24000MF 30V ELECTROLYTIC A4F1 1-Amp 250 Volt SLOW BLOW FUSE A4J17 CONNECTOR W/VOLTAGE SELECTOR AND FUSE A4L1 CHOKE 100 UH 2 AMP A4LP1 LAMP FLUORESCENT 15 WATT COOL WHITE A4M1 MOTOR SYNCHRONOUS 60 RPM-60Hz/115V A4PC1 POWER CORD-UL & CSA APPROVED 10A 125V A4Q1 TRANSISTOR D45H2 PNP SI IC=10A PD=50W A4R1 RESISTOR 200 ohm 50w 5% A4S1 SWITCH TOGGLE DPDT C & K 7201E A4S2 SWITCH MOMENTARY 3PDT NO ALCO MPA-306F A4T1 TRANSFORMER 115V/2 X 34 CT SIGNAL 68-2 A4T2 TRANSFORMER 115/26.8 CT TRIAD F-55X A4T3 AUTOTRANSFORMER 230/115 SIGNAL 115-OF A4TBL LOWER TRANSPARENT BELT (LI-3100) A4TBU UPPER TRANSPARENT BELT (LI-3100) A4U1 IC MC VOLT REGULATOR A4U2 IC MC VOLT REGULATOR D-1

19 Appendix E Instrument Specifications Resolution: 1 mm 2 or 0.1 mm 2 (interchangeable). Scanning Area 1 mm 2 Resolution: 1 mm 1 mm. 0.1 mm 2 Resolution: mm L mm W. Display Capacity: 1 mm 2 Resolution: 999, cm mm 2 Resolution: 9, cm 2. Display: Full 8-digit LED (light emitting diode). Sample Width 1 mm 2 Resolution: 25.4 cm maximum, 1.5 to 3.0 mm minimum. 0.1 mm 2 Resolution: 7.5 cm maximum, 0.5 to 1.5 mm minimum. Sample Thickness: Up to 2 cm, expandable to 2.5 cm by the user. Sample Length: Unlimited. Conveyer Belt Speed: 8.0 cm sec -1 at 60 Hz, 6.7 cm sec -1 at 50Hz. Light Source: 15 watt fluorescent tube. Transparent Belts: Rugged clear vinyl. Power Requirement: / VAC, 48 to 66 Hz, 100 watt minimum. Operating Temperature: + 15 to 55 C. Storage Temperature: + 20 to 65 C. Weight: 43 Kg (95 lb). Dimensions: cm ( in). Accuracy:* Sample Area Resolution 10 cm 2 5 cm 2 1 cm 2 0.5cm cm mm 2 ± 1% ± 2% ± 5% ± 7% mm 2 ± 0.5% ± 1% ± 1% ± 1.5% ± 4% *The error (precision) was determined at the 99% level with irregular shaped complex objects. Most applications will result in less error. E-1

20 Section III Circuit Description (S/N 1010 and Above) 3.1 Power Supply Schematics 5 and 6 illustrate the POWER SUPPLY circuitry of the LI This includes the AC power jack, power transformers, voltage regulators, and the synchronous motor which drives the conveyer mechanism. AC power is received through the line cord to jack J17. The input is protected by fuse F1. When the ON/OFF switch S1 is closed, the line voltage is applied across transformer T1. The voltage selector card in the 120 VAC position connects pin E to pin F and pin C to pin D, permitting the full line voltage to be applied to each primary of transformer T1. When the voltage selector card is in the 240 VAC position, pin E is connected to pin D. This places the primaries in series. The synchronous motor M1 that drives the conveyer mechanism is permanently connected to one of the 120V primaries. Transformer T1 has two secondary windings of 18 VRMS each. These secondary windings are wired in series with their center common connected to circuit ground. Two rectifiers may be mounted on the secondary terminals. Plug P11 of the wiring harness connects the secondary windings of transformer T1 to the main board. A full wave rectifier composed of diodes CR7, 8, 10, 11, 12, 13 provides a DC voltage of approximately +25 volts on filter capacitor C22 and -25 volts on filter capacitor C13. These voltages are inputs to the +8 VOLT REGULATOR, the +5 VOLT REGULATOR, the +16 VOLT REGULATOR, the +12 VOLT REGULATOR and the -5VOLT REGULATOR. The output of the +8 VOLT REGULATOR is distributed through plug P6 to the DISPLAY assembly. The output of the +5 VOLT REGULATOR is used as the reference for the +16 VOLT REGULATOR and is also distributed to the lamp and digital circuits. The +16 VOLT REGULATOR has a basic differential amplifier stage, which compares the +5 volt reference on the base of transistor Q7 to a proportional signal of the regulator output on the base of transistor Q1. The difference between the two signals produces a control signal to transistor Q2. Transistor Q2 then amplifies this control signal and applies it to the series-pass transistor Q16, causing it to correct the error in the output voltage. Q8 implements a drive current limit to prevent Q2 from overheating at low line voltage. 3.2 PLL and Lamp Driver Schematic 7 illustrates the PHASE-LOCKED LOOP AND LAMP DRIVER circuitry. The PHASE-LOCKED LOOP provides a square wave which drives the LAMP DRIVER and a clock signal, LINE 4, which is sent to the SCANNER CONTROL circuitry. The input to the PHASE-LOCKED LOOP is AC SYNC, a signal taken from the power transformer secondary in the power supply circuitry. AC SYNC originates as a sine wave. It is filtered and then clipped by the 5.2 volt Zener diode at pin 15 of integrated circuit U3. The clipped signal drives two buffers of U5 to provide a square wave signal to pin 14 of U3. Integrated circuit U3 is a phase-locked loop (PLL). The voltage controlled oscillator (VCO) of the PLL runs at a frequency which is sixteen times higher than the frequency of the AC SYNC signal. For 60 Hertz AC power the VCO operates at 960 Hertz (50 Hz/800 Hz). The output of the VCO is at pin 4 of U3. The signal is divided down in frequency by divider U2. The Q4 output, pin 6 of U2, is connected back to pin 3 of U3. The input 3-1

21 at pins 3 and 14 of U3 are the inputs to the phase comparator which provides the correction signal to keep the VCO on frequency. The VCO output at pin 4 of U3 is inverted by transistor Q13 to provide the DISPLAY CLOCK signal to function as the digit scanning clock for the display. In addition, the VCO output is divided by U2 to provide an N 2 signal which functions as the drive to the LAMP DRIVER and N 4 (LINE 4) signal which functions as a synchronization clock to the SCANNER CONTROL circuitry. The N 2 signal to the LAMP DRIVER drives NOR gate U1D, and is inverted by NOR gate inverter U1B to drive NOR gate U1C. The fifteen watt fluorescent lamp is ignited by the LAMP START switch, S2. When switch S2 is depressed current from the +25 volt supply flows through the heaters of the lamp. Current also flows through the secondary of transformer T2, causing a magnetic field to build up. With the start switch depressed, a "1" state is held on pins 13 and 9 of the two U1 NOR gates to "0" until the LAMP START switch is released. When released, the magnetic field in the secondary of transformer T2 collapses. The voltage caused by the collapsing field ionizes the fluorescent lamp. After the LAMP START switch is released, a "0" state to both U1 NOR gates allows the outof-phase clock signals to provide the necessary drive on the primary of transformer T2 to keep the lamp ionized. Two identical transistor circuits drive each half of the center-tapped transformer T2. Only one amplifier need be described. The output of U1C, furnishes the necessary drive to darlington transistor Q6, which in turn provides drive to transistor Q12. When transistor Q12 is driven into saturation, causing current to flow in one half of the primary of transformer T2, transistor Q11 is off since the two circuits are driven by out-of-phase square waves. Diodes CR3 and CR4 along with transistors Q9 and Q10 function to shut off transistor Q12 in the event that the clock signal input fails. Out-of-phase signals alternating near ground potential on the cathodes of CR3 and CR4 keep capacitor C7 from charging sufficiently positive to turn on transistor Q9 unless the clock drive fails. If the clock drive to the LAMP DRIVER circuits fail, one of the power transistors will be left with a positive drive signal. For example, if the clock fails such that the output of U1C is a "1" state, this would cause transistor Q6 to conduct. Transistor Q6 conducting would cause transistor Q12 to conduct. If transistor Q12 remains conducting, the primary winding of transformer T2 will go into saturation. When the saturation condition occurs the current in the transformer winding will begin to approach that value limited only by the resistance of the winding. This increasing current causes the voltage on the collector of transistor Q12 to rise. Diodes CR3 and CR4 function as an AND gate sensing for positive voltage at both the base and collector Q12. When the AND gate inputs are true, current through resistor R6 charges capacitor C7 such that transistors Q9 and Q10 conduct, removing the base drive from Q12. The circuitry will remain in this protected condition until the clock input is restored. 3.3 Scanner Control and Count Detection Schematic 8 illustrates the SCANNER CONTROL circuitry, the LINE SCANNER and its video amplifier, and the VIDEO COMPARATOR. Whenever the conveyer mechanism is in motion, the LINE SCANNER periodically examines small units of area across the width of the belt between the sample guides. The LINE SCANNER examines that area across the belt which is exactly under the fluorescent lamp. The light from the lamp is reflected by means of three mirrors and then focused by the lens onto the photodiode sensing elements in the LINE SCANNER. The photodiode elements sense the presence of the light and when a sample passes under the lamp, a certain portion of the sensing elements in the LINE SCANNER integrated circuit detect that the light from the lamp has been blocked. At periodic intervals the control circuitry initiates an interrogation of the sensing elements in the LINE SCANNER integrated circuit. When this interrogation occurs the LINE SCANNER produces a series of pulses, each one coming from a photodiode sensing element. These pulses are converted to negative polarity voltage pulses by 3-2

22 means of the DC restore circuits and video amplifier. The amplitude of these negative voltage pulses is proportional to the quantity of light which the photodiode element detected. When the sample blocks the light from a sensing element, its representative voltage pulse will be decreased in amplitude. The CAL potentiometer P1 is calibrated to a threshold value which determines at what amplitude the pulses are to be counted as valid area units. A serial stream of voltage pulses of 0 volts occurs at the output of the VIDEO COMPARATOR when no sample is present to block the light from the lamp. When the video element is below the P1 threshold, the comparator goes H1 (5V). The control circuitry then determines whether to produce an output COUNT pulse when the sample causes a video pulse to be of sufficiently reduced amplitude (or its total absence) to merit the accumulation of a unit of area. The LINE SCANNER is interrogated at intervals of time proportional to the distance that the conveyer moves the sample. This is because the signal (LINE 4) which initiates an interrogation and the motor which drives the conveyer are dependent upon the AC power line frequency. LINE 4 is a square wave with a frequency four times that of the AC power line frequency. Each time LINE 4 goes negative, an interrogation of the LINE SCANNER occurs. The period of time from the beginning to the end of the LINE SCANNER interrogation is known as a scan cycle. Refer to the timing diagram sheet number 9 for the following circuit description. The video circuit board contains all components needed for the control and readout of the line scanner, as well as producing valid count pulses and end-of-scan signal for the display board and for external connection to a LI-3000A console for additional data handling functions. All control functions are implemented by U2, a programmable microcontroller configured to have 3 or 4 digital inputs, and 9 or 10 digital outputs. Crystal Y1 is used by the microcontroller to generate its internal clock. Any value between 16 and 20 MHz should provide good performance. An oscilloscope probe can upset this circuit, so it is best to merely place the probe tip near R32 to check for oscillation. With Link 2 open, the microcontroller is configured for standard operation. (Link 2 is shunted at the factory to enter a special set-up mode useful for aligning the optics, but normal data will not be produced at the display. During this procedure, Link 1 becomes an output sent to the main board via TP1 to remotely reset the display counter.) The positive going transition of U2 pin 3 initiates the scan sequence. If this signal is absent, the only activity present from the microcontroller will be an approximately 28 Hz waveform at pin 17 due to the action of the internal watchdog timer. Under normal operation, pin 17 and transistor Q1 and its related circuitry produce a 0.8 microsecond positive transfer pulse for pin 22 of the scanner U6. The resting state for this signal is -3 volt determined in part by "zener" CR1. This transfers all integrated video information into the scanner's two internal serial shift registers, designated as odd and even. The rest of the scan then is the extraction and processing of this information. Line scanner U6 requires a two phase clock with fast edges and positive voltage overlap. This is provided by the timing of the signals from U2 pins 6 and 7, and inversion by MOS clock driver U1. After these are held static as shown during the transfer pulse, these clocks must be provided to clock out all the video data until the scan is completed. The microcontroller internal execution loop lengths are all carefully controlled so that these clocks occur at a steady period of 58 khz producing video pulses at twice that rate. The shift register video data is spatially interleaved and so must be handled by alternating between odd and even during the readout process. After the transfer pulse, the next 10 video signals are defined to be dark reference pulses since these photosites are beneath an opaque mask. The microcontroller uses the first 8 to generate 4 pulses each of odd and even DC restoration through analog switches U4A and U4B via signals SW1 and SW2. The raw video output of U6 at pins 9 and 14 has a large DC component of about positive 7 volts, and is valid only at the negative-most portion of each waveform. At these moments of the dark pulses the switches clamp the "hold" capacitors C14 and C17 to signal 3-3