Capabilities of Flip Chip Defects Inspection Method by Using Laser Techniques

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1 Capabilities of Flip Chip Defects Inspection Method by Using Laser Techniques Sheng Liu and I. Charles Ume* School of Mechanical Engineering Georgia Institute of Technology Atlanta, Georgia 3332 (44) (P) * Corresponding Author Achyuta Achari Visteon Corporation Technical Center Dearborn Suite C Rotunda Drive Dearborn, MI (P) Juergen Gamalski Siemens AG Corporate Technology Packaging and Assembly CT MM 6 D Berlin juergen.gamalski@blns.siemens.de (P) The International Journal of Microdircuts and Electronic Packaging, Volume 24, Number 2, Second Quarter, 21 (ISSN ) 122

2 Abstract A novel, non-contact, nondestructive approach for flip chip solder joint quality inspection is presented. In this technique, a pulsed laser generates ultrasound on the chip s surface. An interferometer was used to measure the displacement at chip s surface. Changes in solder joint quality produce a different surface displacement response. An Error Ratio method of analysis is used to distinguish a good chip from a chip with defect. Capabilities of this defects inspection method are discussed in this paper. Experimental results indicate that this laser ultrasonic/ interferometric system is capable of detecting various defects such as missing solder ball/ undersized solder ball, surface defects on silicon die such as crack, and misalignment of solder bumps, in a fast and efficient way. A fully developed system can be used on-line for quality assurance or off-line for process development. Key words Flip Chip, Laser Ultrasonics, Solder Joint Inspection, Defect Inspection, Interferometry 1. Introduction A trend in electronic packaging interconnection technology is the change from wire bonding chip attachment technology to solder bump technology. Solder bump technology has been proven to be a reliable interconnection in many advanced packaging formats including flip chip, ball grid array (BGA), chip scale, multi-chip module (MCM), and other surface mount components. Flip chips use small solder bumps underneath the chips for interconnection, making them superior in performance to all other interconnection technologies. However the physical configuration of these interconnects makes inspection of their quality impossible or inefficient using techniques practiced with previous interconnection technologies (e.g. wire bonding, TAB, etc.). Therefore, new techniques for detecting solder bump defects in a reliable, fast and nondestructive means are highly desired in today s electronic packaging industry. Traditional solder joint inspection methods include: x-ray imaging, acoustic microscopy, visual inspection techniques and functional testing. The X-ray approach provides a means of looking through the chips and substrates to see the relative location and size of solder balls, but because x-ray methods rely on the thickness of material the x-rays pass through, poor connections, delaminations, and cracks are very difficult to detect. These defects occur on planes normal to the direction of the x-rays, so the change in material thickness is very small. In addition, images are produced, but they must be interpreted. Extracting solder joint quality information from these images is difficult, time-consuming, and subjective, making the process hard to automate [1][2]. Acoustic microscopes utilize high frequency ultrasound to examine the internal features in materials and components [3]. Defects such as pre-existing voids in the solder joints, nonwet of the solder to the chip or to the substrate bond pads can be observed [4]. However, the ultrasonic imaging systems currently in the market could be destructive techniques for most products because the printed wiring board (PWB) assembly must be immersed in water during the inspection process [5]. In addition, because many solder joints are located near the edge of the chip, edge effects 123

3 distort the ultrasound, providing a poor image in the region of interest. Therefore these techniques cannot be used for on-line inspection in assembly line. For off-line inspection it takes several minutes to image the solder beads under a single chip. Visual inspection techniques are not adequate for the evaluation of flip chip interconnects because the solder-joints are hidden from view in this type of package. Another widely used inspection techniques are functional testing methods. After assembling the entire printed circuit board (PCB), the testing fixture checks for electrical continuity and proper operation by comparing the electrical response at specific nodes to previously determined values. However, unsoldered joints may still pass this test if any type of mechanical contact exists, although the part may fail after a short service life because of cracks or partial connections. The equipment necessary for these tests can be very expensive and time consuming to use, so other options need to be pursued [6]. Because of the weakness of traditional solderjoint inspection methods, such as limited application on flip chip solder-joint inspection, slow, and difficult to be used for on-line inspection, it is highly desired to develop an accurate, on-line, fast, low cost, non-contact and nondestructive system for inspecting flip chip, BGA and other IC packaging interconnections. The objective of this research is to develop such a high resolution system by using laser ultrasound and interferometric techniques. A prototype system has been developed. In this system, a pulsed Nd:YAG laser generates ultrasound on the chip s surface, and a heterodyne laser interferometer measures the displacement of the chip s surface at a single point [7]. If there are detectable defects at solder joints or silicon die, the surface displacement response will change. By comparing the signals with reference signals from good chip, various kinds of defects can be detected. Since only a few brief laser pulses are needed to get a signal from one chip, this method is a very fast means of determining solder joint quality. 2. Experimental Setup and Method The solder joint inspection system has been designed to be flexible and to allow for easy reconfigurations for different approaches to the problem by keeping the components as simple as possible [8]. To perform the testing, three components are necessary: a fixture to hold and move the sample, a source of ultrasound, and a sensor to record the sample s reaction. A computer controls the ultrasonic source, adjusts the sample position, and records and processes the acquired signals. Figure 1 shows the system layout. The fixture for holding the specimen allows the interferometer to be scanned over the chip s surface, so that data may be taken at multiple points on the surface. A right-angle platform is used to accurately position each sample, and the platform is mounted on top of an XY-positioning stage that is controlled by two stepper motors from the computer. A pulsed Nd:YAG infrared laser provides the power for creating ultrasound. Instead of letting the laser pulses fire at the flip chip directly, an optical fiber transmits power from the laser to the testing fixture [9]. After the flip chip has been properly positioned, a laser interferometer records the surface displacement of the chip at specific points. The final system design includes direct recording of the signal through a high-speed data-acquisition card and immediate signal processing, providing a real-time tool for measuring solder joint quality [1][11]. 124

4 Nd-Yag Laser Interferometer Incident Laser Light D C Chip Surface Chip Computer X-Y Positioning Stage A B Interferometer Detection Point Figure 1. System Construction An important feature of this method is signals are only picked up at a few detection points. There is no need for full field scan. For example, in order to detect a certain type of flip chip solder joint quality or other defects on chip surface, like crack, data acquisition scanning pattern was designed as shown in Fig. 2. The laser power irradiates the center of the chip s surface, generating ultrasound at that point. Signals are recorded from four points on each chip, labelled as detection points A, B, C, and D. The location of these points is symmetric about the center of the chip. For each chip, the system records signals from points A to D in sequence, and the signals at each point are most sensitive to the solder joints in the immediate vicinity. The number of detection points depends on the size of the chip, solder joint density, and some other parameters. Data is collected at all those detection points. The waveform shapes were correlated to physical deficiencies in the solder connections. After collecting the data, some analysis is performed to determine the solder joint quality. Signals from test chip are compared with reference signals from a good flip chip. If there is a good match between those signatures, the test chip is determined to be a good chip. If signatures from the test chip do not match Figure 2. Scanning Pattern of Sample Chip the reference, that chip is said to be a chip with defect. For on-line quality assurance, that chip can be simply taken off from the assembly line. And if desired, further off-line analysis can be performed to get more information about that defect. Signal recorded by interferometer are ultrasound waveforms. Although it is easy for a human being to tell the difference between two waveforms, it is not easy for computer to do that, especially to measure the difference quantitatively. Therefore, an automated comparison process was developed to provide an estimate of the solder joint quality at each detection point. This method uses a numerical algorithm to assign a value, called the Error Ratio, representing quality of each chip at each detection point, and it is described in detail below. The Error Ratio is a variable which measures the similarity of two waveforms in time domain. It can be defined as Er = 2 ( f ( t) r( t)) dt 2 r( t) dt (1) where r (t) is the reference waveform and f (t) is the measured waveform. Therefore, a signal that matches the reference signal well 125

5 will have a small value, while a signal that has large changes in amplitude and phase will have a large value. Usually there are several Error Ratio values for each testing chip, because of multiple detection points. It is not necessary to use all of them if the only interest is to find out whether a chip is defective or not, but not to localize or classify that defect. Therefore, the maximum Error Ratio is used to measure the quality of each chip. Results from two different flip chips supplied by two vendors are presented below. The defects in these chips were created purposely for this research. 3. Experimental Results and Discussion The three types of defects that have been tested are: missing solder ball/deformed solder ball, surface defects on silicon die such as crack, and misalignment of solder bumps. 3.1 Detection of Flip Chip with Missing Solder Ball/Under Sized Solder Ball A single flip chip design was chosen as the test vehicle. The chip measures 3.23mm by 2.281mm, and there are 14 solder balls under each chip attached to ceramic substrate. The diameter of solder ball is 33 microns and the pitch size is 67 mm. As shown in Fig. 3, four test flip samples are labeled Good Chip 1, Good Chip 2, Bad Chip 1, and Bad Chip 2. One solder ball on Bad Chip 1 is missing, and two solder balls on Bad Chip 2 are under sized. Figure 4 shows the waveforms recorded from testing these four chips. It is clear that Good Chip 1 and Good Chip 2 have similar Good Chip 1 Good Chip 2 Bad Chip 1 Missing Solder Ball Bad Chip 2 Deformed Solder Ball Figure 3. Good Chips and Chips with Defects at Solder Bump waveforms, because the amplitude and phase are nearly identical. The signals form Bad Chip 1 and Bad Chip 2 differ a lot from the waveforms from the two good chips, because they have a missing solder ball and two undersize solder balls, respectively. These differences help to confirm that the presence of a defective solder joint affects the chip s surface displacement response. Error Ratio values are calculated by using the equation discussed above. Shown in Fig. 5 are the maximum Error Ratio values from these four testing samples. The Error Ratio of Good Chip 1 is zero, because it was chosen as the reference. Error Ratio of Good Chip 2 is close to zero, but Error Ratio values for the other two bad chips are very high, indicating that there are defects on those two chips. By using the same Error Ratio definition, the maximum Error Ratio values are calculated and shown in Fig. 8. It is clear that Error Ratio from chips with surface defects are much larger than from good chips, therefore such surface defects can be easily detected. 126

6 Figure 4. Signals from our Testing Chips for Solder Joint Defects Inspection Max Error Ratio Good Chip 1 Good Chip Good Chip 1 Good Chip 2 Bad Chip 1 Bad Chip 2 Bad Chip 1 Bad Chip 2 Surface Crack Figure 5. Max Error for Solder Joints Defects Inspection Figure 6. Good Chips and Chips with Surface Defects 127

7 Figure 7. Signals from Four Test Flip Chip Samples for Surface Defects Inspection 3.2 Detection of Flip Chip with Surface Defects The next step is to test some chips with surface defects, such as crack on silicon die. Figure 6 shows four flip chip samples, still labeled Good Chip 1, Good Chip 2, Bad Chip 1, and Bad Chip 2. There is a crack on one side of Bad Chip 1, and Bad Chip 2 has a crack at one of its corner. Figure 7 shows the waveforms recorded from those four chips. It is clear that Good Chip 1 and Good Chip 2 have similar waveforms, while waveforms from Bad Chip 1 and Bad Chip 2 are very different compared with the good chips. By using the same Error Ratio definition, the maximum Error Ratio values are calculated and shown in Fig. 8. It is clear that Error Ratio from chips with surface defects are much larger than from good chips, therefore such surface defects can be easily detected. 3.3 Detection of Flip Chip with Misaligned Solder Bumps Another four different flip chip samples are shown in Figure 9. This type of flip chip measures 6.3mm by 6.3mm. It has 48 solder balls sitting on FR-4 substrate, without underfill. The solder ball diameter is

8 microns, and the pitch size is 457 µm. Among those samples, two of them are good chips, while the other two are chips with solder bump misaligned, labeled as Bad Chip 1 and Bad Chip 2. Good Chip 1 Good Chip 2 Again, Error Ratio values were calculated, as shown in Fig. 1. By comparing the Error Ratio values, it is easy to separate chips with misalignment problems from good chips. Similar to what has been shown before, ultrasound signals are recorded from those four test samples by using interferometer, and waveforms are compared as shown in Fig. 11. As expected, Bad Chip 1 and Bad Chip 2 have ultrasound waveforms that are different from those of good chips, because they have misalignment problems. Bad Chip 1 Bad Chip 2 Misalignment Figure 9. Good Chips and Chips with Solder Bump Misaligned Max Error Ratio Good Chip 1 Good Chip 2 Bad Chip 1 Bad Chip 2 Max Error Ratio Good Chip 1 Good Chip 2 Bad Chip 1 Bad Chip 2 Figure 8. Max Error Ratio for Surface Defects Inspection Figure 1. Max Error Ratio for Misalignment Defects Inspection 129

9 Figure 11. Signals from Four Testing Chips for Misalignment Inspection Analyses of the Error Ratio values and the waveforms shows that the measurement system makes repeatable measurements that accurately represent physical defects. In addition, the data analysis algorithm provides a good measure of the physical defects of flip chips. The smallest defect that can be detected by this system is mainly determined by the sensitivity of interferometer. In this prototype system, the minimum detectable displacement of the interferometer is on the order of.25 nm. Therefore, any change in the solder joints that causes a change in the surface vibration of a least.25 nm can potentially be detected by the system, hence, giving the system a high resolution. Because of limited number of tests that have been performed, the resolution of this technique has not been tested to its limit. However, for the samples have been tested, the system is able to detect a missing solder ball in flip chip, which has a diameter of 12µm and pitch size 457µm. With further improvements on the testing system, the system resolution can be improved allow the detection of smaller defects, such as open solder joints, cracked solder joints, porosity, lean joints, or excess solder deposits. 13

10 4. Conclusion A new approach for flip chip solder joint quality inspection has been developed, tested and proven to be practical. Unlike other solder joint inspection methods, this technology has advantages such as being non-contact, nondestructive, low cost, and practical for on-line detection. However, it can still be used during process development for optimization. Experiment results indicate that this laser ultrasound and interferometric system is capable of detecting different kinds of defects on flip chip, including missing solder ball/under size solder ball, surface defects on silicon die such as crack, and misalignment of solder joints. By using an automated inspection prototype and the Error Ratio analysis routine, those defects can be successfully detected in a fast and efficient way. 5. Acknowledgements The authors would like to thank Visteon and Siemens for their continued support for this research. References [1] S. Edward, X-Ray Systems Keep Pace with SMT, Test & Measurement World, February, [2] C. G. Masi, Future of Solder-Joint Inspection, Test & Measurement World, July, [3] T. Adams, Acoustic Micro Imaging of Flip Chip Interconnects, III-Vs Review, Vol. 8, No. 5, pp. 5-52, Oct [4] J. E. Semmens, et al, Further Investigation into the Use of Acoustic Micro Imaging for Analyzing Flip Chip Integrity and Failure Modes, Proceedings of SPIE, pp , [5] J. Kubota, et al, Imaging Flaws in Soldered Joints of Integrated Circuits Using an Ultrasound Electronic Scanning Technique, IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, Vol. 39, No. 1, January [6] M. Yojima, H. Juzumi, and T. Nishiyama, Non-contact LSI-package solderjoint inspection method using an electro-optic probe, Proceeding of SPIE-The International Society for Optical Engineering, Vol. 3582, 1998, pp [7] J. P. Monchalin, Measurement of In- Plane and Out-of-Plane Ultrasonic Displacements by Optical Heterodyne Interferometry, Journal of Nondestructive Evaluation, Vol. 8, No. 2, [8] J. Liu, C. Erdahl, C. Ume and A. Achari, A Novel Method and Device for Solder Joint Quality Inspection by using Laser Ultrasound, IEEE ECTC 2 Conference, Las Vegas, May, 2 [9] C. B. Scruby, et al, Laser Ultrasonics: Techniques and Applications, Adam Hilger, New York, 199. [1] S. Hopko and C. Ume, Laser Generated Ultrasound by Material Ablation with Fiber Optic Delivery, Ultrasonics, Vol. 37(1), Jan [11] J. Jarzynski and Y. H. Berthlot, The Use of Fibers to Enhance the Laser Generation of Ultrasonic Waves, J. Acoustical. Soc. Am. Vol. 85, No. 1,

Inspection of Flip Chip and Chip Scale Package Interconnects Using Laser Ultrasound and Interferometric Techniques

Inspection of Flip Chip and Chip Scale Package Interconnects Using Laser Ultrasound and Interferometric Techniques Turner Howard, Dathan Erdahl, I. Charles Ume Georgia Institute of Technology Atlanta,