A High Performance Generalized Discontinuous PWM Algorithm

Transcription

1 IEEE Alied Power Electronics Conference Atlanta, Georgia, February 997 Volume, IEEE Trans. on Industry Alications Version A High Performance Generalized Discontinuous PWM Algorithm Ahmet M. Hava y Russel J. Kerkman z Thomas A. Lio y y University of WisconsinMadison z Rockwell AutomationAllen Bradley 45 Engineering Drive 4 W. Enterrise Drive Madison, WI 579 Mequon, WI 597 Phone: (8) 585 Phone: (44) 58 Fax: (8) 7 Fax: (44) 58 hava@cae.wisc.edu rjkerkman@meq.ra.rockwell.com lio@engr.wisc.edu Abstract In this aer a Generalized Discontinuous Pulse Width Modulation (GDPWM) method with suerior high modulation oerating range erformance characteristics is develoed. An algorithm which emloys the conventional sace vector PWM method in the low modulation range, and the GDPWM method in the high modulation range is established. As a result, the current waveform quality, switching losses, voltage linearity range, and the overmodulation region erformance of a PWM VSI drive are online otimized as oosed to conventional modulators with fixed characteristics. Due to its comactness, simlicity, and suerior erformance, the algorithm is suitable for most high erformance PWM VSI drive alications. The aer rovides detailed erformance analysis of the method and comares it to the other methods. The exerimental results verify the sueriority of this algorithm to the conventional PWM methods. Index Terms: inverter, PWM, discontinuous modulation, switching losses, harmonics I. INTRODUCTION Voltage Source Inverters (VSIs) are widely utilized in AC motor drive, utility interface, and Uninterruted Power Suly (UPS) alications as means for DC, AC electric energy conversion. Shown in Fig., the classical VSI has a relatively simle structure and generates a low frequency outut voltage with controllable magnitude and frequency by rogramming high frequency voltage ulses. Carrier based PWM methods emloy the er carrier cycle voltsecond balance rincile to rogram a desirable inverter outut voltage waveform. Two main imlementation techniques exist. In the direct digital technique, the sace vector concet is utilized to calculate the duty cycle of the inverter switching devices and digital counters utilize the duty cycle information to rogram the switch gate signals []. In the triangle intersection technique, the reference voltage (modulation) waveforms are comared with the triangular carrier wave and the intersections define the switching instants []. Although the early triangle intersection imlementations emloyed analog circuits, low cost digital microelectronics have roven the viability of digital hardware/software imlementations. The absence of the neutral current ath in three wire loads rovides a degree of freedom in determining the duty cycle of the inverter switches. In the direct digital imlementation the degree of freedom aears as the artitioning of two zero states []. In a triangle intersection imlementation, this degree of freedom aears in choosing the modulation wave. Any zero sequence signal can be injected to the reference modulation waves [4, 5]. In Fig., the otential difference between the three wire load neutral oint and the centeroint of the DC link caacitor, v, is the zero sequence voltage and it can be arbitrarily selected. The zero sequence signal injection technique block diagram φ ~ L dc V dc C C Sa Sb Sc Sa Sb Sc ia Va Vc Vb I M Fig.. Circuit diagram of a diode rectifier front end tye PWMVSI drive. V a * V b * V c * Zero Sequence Signal Calculator V V * * b V * * c V a * * Sa Sb Sc Fig.. Triangle intersection technique based PWM emloying the zero sequence injection rincile. is illustrated in Fig.. In both direct digital and triangle intersection methods the voltage linearity, waveform quality (current rile), and switching losses are all influenced by the choice of the zero sequence signal (zero state artitioning). Recognizing this roerty, many researchers have been investigating high erformance PWM methods. With erformance and imlementation simlicity being the main criteria, only a few of the many PWM methods have gained accetance []. Due to its simlicity, the Sinusoidal PWM (SPWM) method has found a wide range of alications since the early develoment of PWMVSI technology []. However, the SPWM method is linear between % and 78.5% of sixste voltage value. Therefore, oor voltage utilization. Emloying the zero sequence signal injection technique, King develoed an analog hardware based PWM method [4] and illustrated the method is linear between % and 9.7% of sixste voltage value. Thus, King s method, also termed Sace Vector PWM (SVPWM) method, significantly imroves inverter voltage utilization. The following years witnessed the develoment of several similar modulation methods such as the Third Harmonic Injection PWM (THIPWM) method [5, 7, 8]. Utilizing a discontinuous tye of zero sequence signal, Deenbrock develoed a modulation method

2 with discontinuous modulation waves (later named as Discontinuous PWM (DPWM) method and here on will be referred to as DPWM) that also rovides a wider linearity range than SPWM [9]. Since during each carrier cycle one hase ceasesmodulation, the associated hase is clamed to the ositive or negative DC rail and the switching losses of the associated inverter leg are eliminated. Deenbrock thoroughly investigated DPWM and illustrated its suerior voltage linearity range, reduced switching loss, and the suerior high modulation range current waveform quality [9]. However, the oor low modulation range erformance (narrow ulse roblems and oor current waveform quality []) and imlementation comlexity has limited the alication of this modulator. Prior to DPWM, a modulation method which has similar modulation waveforms and characteristics to DPWM was develoed by Schörner []. Schörner s modulator and DPWM are identical at the maximum voltage linearity oerating oint. However, at all other oerating oints Schörner s method yields continuous modulation and therefore has higher switching losses than DPWM. Emloying the sace vector theory,pfaff et al. established the carrier based PWM direct digital imlementation technique []. Since modern high erformance AC drives emloy vector control, rogramming the switch duty cycles also in the vector coordinates would be an intuitive and direct aroach. Therefore, this imlementation immediately gained accetance. Skudelny et al. later thoroughly investigated the technique, and termed the method that equally slits the two inverter zero states as the Sace Vector PWM (SVPWM) method and illustrated its suerior erformance characteristics []. Recent studies illustrated this method is equivalent to King s method []. The recent digital software based triangle intersection imlementation of SVPWM also has emloyed King s aroach to generate the modulation signal []. Ogasawara et al. develoed a direct digital PWM method with suerior high modulation range waveform quality and reduced switching loss characteristics suitable for induction motor drives oerating near lagging ower factor angle [](minimum switching losses for lagging ower factor). Later it was recognized that this sace vector theory based method has a triangle intersection imlementation based DPWM equivalent (DPWM) [4]. This modulator was later reinvented and termed minimum switching loss PWM method (this is only true for lagging ower factor)[5]. The modulation waveforms of these modulators and several other oular PWM methods [4,, 7] are shown in Fig. along with their zero sequence signals. In the figure, unity triangular carrier wave gain is assumed and the signals are normalized to V dc. Therefore, V dc saturation limits corresond to. Since the erformance of a modulator is voltage utilization (modulation index) deendent, at this stage a modulation index definition is required. Modulation Index: For a given DC link voltage V dc, the ratio of the fundamental comonent magnitude of the line to neutral inverter outut voltage, V m, to the fundamental comonent magnitude of the sixste mode voltage, V dc, is termed the modulation index Mi []: V m M i = V () dc As discussed in detail in references [,,, 8], the erformance of the oular PWM methods is modulation index deendent and no single modulator rovides a satisfactory erformance over a very wide modulation range. Therefore, a high erformance drive with a wide oerating range must combine at least two PWM methods and online select a roer modulator as a function of the modulation index. In the lower modulation range the modulation methods with continuous [] [9, ] wt 4 [rad] wt 4 [rad] SVPWM DPWM [, 4] [, 4] wt 4 [rad] wt 4 [rad] THIPWM DPWM [5, 7, 8] [4] wt 4 [rad] wt 4 [rad] DPWMMIN DPWMMAX SPWM [7] [4] wt 4 [rad] wt 4 [rad] Fig.. Modulation waveforms of the modern PWM methods (M i = :7). DPWM modulation wave (CPWM methods) are suerior to DPWM methods, while in the higher modulation range the oosite is true. Therefore, in the low modulation range SVPWM is suerior to all other modulators due to its suerior erformance and imlementation simlicity []. In the high modulation region DPWM methods are suerior to SVPWM and the other CPWM methods. However, the DPWM method of choice deends on the erformance criteria and no modulator has an overall suerior erformance. The switching losses, waveform quality and voltage linearity characteristics are different in each DPWM method. Therefore, selecting only two PWM methods (SVPWM and a DPWM method) results in a less than otimal erformance, while emloying more than two PWM methods substantially increases the algorithm comlexity. A simle DPWM method with online controllable characteristics would be a suerior and ractically realizable aroach. This aer develos a high erformance Generalized DPWM (GDPWM) method and an algorithm combining GDPWM with SVPWM to maximize the drive erformance in the whole modulation range. First the GDPWM method is described, then the modulator characteristics are studied and comared to the other oular methods to illustrate its erformance sueriority. Finally, laboratory test results are illustrated to verify the caabilities of the method. The aer will focus on the triangle intersection imlementation (digital hardware/software based), however the algorithm can be emloyed in a direct digital imlementation also. The recent Ph.D. thesis by Reinold [8] and this work have imortant similarities. However, this work rovides more detailed analysis, more global aroach, simler imlementations, and a thorough modulator design method.

3 II. THE GENERALIZED DISCONTINUOUS PWM METHOD A careful examination of the DPWM and DPWM modulation waveforms of Fig. indicates there exists a hase angle distance between their DC rail clamed segments. While in DPWM the center of each DC rail clamed segment is aligned with the cosine modulation wave eak, in DPWM a hase difference exists. The modulation signals of the two methods are similar to each other and furthermore the magnitude rules involved in generating them are similar []. The minimum switching loss characteristic of DPWM under unity ower factor oerating condition and of DPWM under lagging ower factor is intuitive. In each case, the DC rail clamed switch conducts the largest current and minimum switching losses are obtained. In fact, this characteristic has been the reason for the develoment and widesread use of these modulators. However, under different ower factor oerating conditions than the described, the erformance of these modulators degrades. Following the recognition of the similarities between these modulators, an attemt towards unifying them in this researchhas lead to the develomentof a high erformance Generalized DPWM (GDPWM) method []. GDPWM is a DPWM method which covers a range of modulators including the DPWM and DPWM methods. Figure 4 illustrates the zero sequence signal generation method of GDPWM. For illustration uroses, the triangular carrier wave eak to eak voltage is scaled to the VSI DC link voltage V dc. Therefore, the modulator saturates at a signal value larger than V dc. To aid the descrition of GDPWM, it is useful to define the modulator hase angle increasing from the intersection oint of the two reference modulation waves at w et = as shown in Fig. 4. From to, the zero sequence signal is the shaded signal which is equal to the difference between the saturation line ( V dc ) and the reference modulation signal which asses the maximum magnitude test. In the maximum magnitude test, all three reference modulation signals va, v b,andv c are hase shifted by,, and of the three new signals v ax, vbx,andv cx, the one with the maximum magnitude determines the zero sequence signal. Assume jvaxj jvbxj; jvcxj, then, v =(sgn(va)) V dc, va. Adding this zero sequence signal to the three original modulation waves va, v b,andv c, the GDPWM waves v a, v b,andv c are generated. V dc V dc ψ π/ π/ V o v * a v * b vc * π π ω e t ω e t Fig. 4. Generalized DPWM zero sequence signal generation method: is the only control arameter wt [rad].5.5 = = 4 4 wt [rad] wt [rad].5.5 = = 4 wt [rad] Fig. 5. GDPWM method modulation waves( ), their zero sequence signal (. ) and the fundamental comonent ( ) for M i = :7 and four different modulator hase angle values. Since the GDPWM zero sequence signal must not be too large to force a modulation wave outside the triangular carrier wave boundaries, the control range of is confined to the interval [, ]. Within this range, the modulator is linear between : M i :97. Figure 5 illustrates the modulation and zero sequence waveforms for four different values and M i = :7. Notice that DPWM corresonds to = and DPWM to =.For = thedpwm method, which was reorted in [4, 9] results. Since it only requires a hase shift oeration (rotation) and several comarisons, the GDPWM method is simle and can be easily imlemented on a Digital Signal Processor (DSP) or microrocessor. Although the variable is helful in the analysis and grahic illustration of this method, in the ractical imlementation a modified control variable m =, results in reduced comutations. With this variable, DPWM corresonds to m =,,DPWMto m = and DPWM to m = values. Emloying dq transformations and exanding the terms in a manner to minimize the comutational requirements, the rotation calculation can be accomlished in the following equations. v ax = v acos( m), (v c, v b) sin( m) () v bx = v b cos( m)( (v c, v b) v, a ) sin( m) () v cx =,v ax, v bx (4) Alying the maximum magnitude test to the above signals, the switch to be clamed to the ositive or negative rail is defined and the zero sequence signal is calculated and added. Duty cycles of the inverter switches are then comuted and assed to the PWM counters. Figure summarizes the direct digital PWM technique that emloys sace vectors and it illustrates the direct digital PWM equivalent of the GDPWM method. As the figure indicates, in the direct digital imlementation the inverter zero states, t () and t 7 () are alternately

4 ω e t = a =e jπ/ V k t k t t 7 V * a = V * cos( ω ) m e t π/ Vk t T k = V ref s = T s t k t k SVPWM ==>> t = t 7 ω e t V ref = (/) ( V * V * b V * a a a c ) t = 7 V 4 t = t = V 5 V V 4 V V ω e t V ref V V ref ω V e t (/) V dc V 5 V ψ V ϕ V V * I ψ ψ t = 7 V π/ t = V ω e t = t = 7 Fig.. Grahic summaryof the direct digital PWM techniqueandthe GDPWM method sace vector illustration. set to zero for segments. The diagram indicates the direct digital imlementation is straightforward. However, it is comutationally more involved than the triangle intersection imlementation [, ]. Therefore, the direct digital imlementation is less ractical. However, the sace vector coordinate illustration of the method aids visualization of this modulator characteristics such as the voltage linearity and waveform quality which will be investigated in the following sections in detail. The! region of GDPWM is suitable for PWM Voltage Source Converter (VSC) utility interface alications and AC Permanent Magnet (PM) motor alications where the load ower factor is near unity. The DPWM region rovides desirable erformance characteristics for near lagging ower factor loads such as induction motor drives. The! region is suitable for near leading ower factor alications such as induction generators. In all these cases, the hase that conducts the largest current is not switched. Therefore, the inverter switching losses are significantly reduced. It is aarent,the control arameter of GDPWM, strongly affects the inverter switching losses and waveform quality. The following sections investigate these characteristics. III. WAVEFORM QUALITY Linear modulation range inverter outut current harmonics (switching frequency harmonics) of the carrier based PWM methods are concentrated at the carrier frequency, its sidebands, its multiles, and the sidebands of its multiles. An inverter s waveform quality is determined by the RMS value (er fundamental cycle) of these harmonics. Since each zero sequence signal (zero state artitioning) and each modulation index value results in a unique inverter outut voltage waveform, the harmonic current waveform and its RMS value is unique for each modulator and modulation index value. Since the discussed zero sequence signal injection PWM methods have eriodic zero sequence signals, the switching signals and the harmonic currents are eriodic also. With the assumtion that the carrier frequency is higher than the fundamental frequency by at least an order of magnitude and the load high frequency model can be aroximated with an inductance, the harmonic current RMS value of these eriodic waveform modulators can be closed form calculated as a function of the modulation index [, ]. To obtain a load inductance and carrier frequency indeendentformula, the RMS harmonic current can be normalized to a base value. The resulting Harmonic Distortion Factor (HDF) function is a olynomial which only deends on the modulation index. The HDF of SVPWM, DPWM, and DPWM are as follows []. HDF SVPWM = ( 4 Mi), 4 7 ( 4 Mi) (, 8 4 )( 4 Mi)4 (5) HDF DPWM = ( 4 Mi),( )( 4 Mi) ( 8 )( 4 Mi)4 () HDF DPWM = ( 4 Mi), ( 4 Mi) ( 8 4 )( 4 Mi)4 (7) The exact relation between the HDF function and the hase a (arbitrarily selected) harmonic current RMS value, I ah, is as follows. I V dc ah =( ) HDF(M i) (8) 4L fc The HDF function of the GDPWM method for any value can be roughly aroximated by linearly interolating the HDF of DPWM (HD) and DPWM (HD), which are its two end oints []. Since it is symmetric about =, the HDF of GDPWM (HDFGD) can be written in two ieces as follows. HDF GD( )= n ( )HD (, )HD ; (, )HD (, )HD Figure 7 shows the HDF curves of all the discussed PWM methods under equal inverter average switching frequency (the HDF of the DPWM methods is multilied by ( ) ). The GDPWM method HDF function varies between the DPWM and DPWM HDF curves. Since the difference between the HDF of DPWM and DPWM is only noticeable in the high modulation index range and it is at most 5 %, the HDF of GDPWM is not a strong function of. The HDF curves indicate that the CPWM methods have better HDF in the low modulation range while the DPWM methods (including GDPWM) are suerior in the high modulation range. Therefore, a high erformance PWMVSI drive should emloy at least two modulators and select a different modulator in each region. Utilizing the HDF formula, the transition oint can be calculated according to the design criteria. In the very low modulation index range all CPWM methods have ractically equal HDF. However, as M i increases the SPWM erformance raidly degrades while the remaining CPWM methods maintain (9)

5 H D F :SPWM :SVPWM :THIPWM[=] 4:THIPWM[=4] 5:DPWM;DPWMMAX; 4 DPWMMIN :DPWM 7:DPWM 5 7 f ccpwm = f c V dc V dc o n S ia S i sw a a a v sw S a v sw i sw P sw Fig. 8. PWMVSI single hase model for commutation analysis and er carrier cycle switching loss diagram under linear commutation. V dc i a t off Ts t on.5 f cdpwm = :5f c M i Fig. 7. HDF = f (M i ) curves in the linear modulation range under equal inverter average switching frequency. low HDF over a fairly wide range. The THIPWM method with the theoretically minimum HDF (THIPWM/4 with v ot = V m sin )[8] 4 has only slightly smaller HDF than SVPWM and the conventional THIPWM (THIPWM/ with v = V m sin ). Since SVPWM is easier to imlement and has a wider voltage linearity range, it is suerior to all CPWM methods []. Therefore, a high erformance drive should emloy SVPWM in the low modulation index range. In the high modulation index range as Fig. 7 indicates DPWM methods are suerior to SVPWM. Therefore, in the high modulation index region DPWM methods should be selected. The intersection oint of the DPWM method of choice and the SVPWM HDF curves define the otimal transition oint. Although in the high modulation range the DPWM method has less HDF than the other DPWM methods, the difference is negligible. Therefore, the DPWM method selection criteria can be based on the switching loss characteristics or voltage linearity characteristics which are stronger functions of the DPWM methods. Since it swees a wide range of modulation waveforms, the GDPWM method has the otential of otimizing these erformance characteristics. Therefore, a clear understanding of the switching loss mechanism and the voltage linearity characteristics of DPWM methods is required. IV. SWITCHING LOSSES The switching losses of a PWMVSI drive are load current deendent and increase with the current magnitude. Switching device manufacturer s databooks (for examle, IGBT device databooks []) indicate this relation is aroximately linear, i.e. the switching losses are roortional to the current magnitude. With CPWM methods, all the three hase currents are commutated within each carrier cycle of a full fundamental cycle. Therefore, for all CPWM methods the switching losses are the same and indeendent of the ower factor. With DPWM methods, however, the switching losses are significantly influenced by the modulation method and load ower factor angle. DPWM methods cease to switch each switch for a total of er fundamental cycle and the location of each DC rail clamed segment with resect to the modulation wave fundamental comonent hase is modulator tye deendent. Therefore, the load ower factor and the modulation method together determine the time interval that the load current is not commutated. Since the switching losses are strongly deendent on and linearly increase with the magnitude of the commutating hase current, selecting a DPWM method with reduced switching losses can significantly contribute to the erformance of a drive. Therefore, it is necessary to characterize and comare the switching losses of DPWM methods. Assuming the inverter switching devices have linear current turnon and turnoff characteristics with resect to time and accounting only for the fundamental comonentof the load current, the switching losses of a PWMVSI drive can be analytically modeled [4]. Shown in Fig. 8, the single hase inverter model and the switching voltage/current diagram aid calculating the switching losses. The average value of the local (er carrier cycle) switching loss over the fundamental cycle, P swave, can be calculated as follows. P swave = Z V dc(t on t off) f i()d () T s In the above formula, t on and t off variables reresent the turnon and turnoff times of the switching devices, and f i() is the switching current function. The switching current function f i() equals zero in the intervals where modulation ceases and the absolute value of the corresonding hase current value elsewhere. For examle, for hase a this function is as follows. f ia()= ji aj jv a j V dc jv a j < V dc () The calculation assumes steady state oerating conditions where the currents are ractically sinusoidal functions. Therefore, () is a function of the load ower factor angle and the current magnitude. As a result, the ower factor angle ' enters the formula as the integral boundary term. Normalizing P swave to P o, the switching loss value under CPWM condition (which is ' indeendent), the Switching Loss Function (SLF) of a DPWM method can be found. P o = V dc I max T s (t on toff ) () SLF = Pswave () P o In () the variable I max reresents the load current fundamental comonent maximum value. By the definition of (), the SLF of CPWM methods is unity. The SLF of DPWM methods can be easily calculated with the above rocedure. Figure 9 shows the and '

6 ψ v a * v a ** i a v * c ϕ P swave P ( ω e t) sw S L F ϕ ψπ/ ψπ/ ϕπ 4 5 [rad] ω e t.5 5 ' [deg] 5 4 [deg] 5 Fig. 9. The average switching losses of GDPWM, P swave = f ( ;'). Fig.. SLF = f ( ;') function of the GDPWM method. deendent switching current and switching loss function waveforms of GDPWM. Alying the rocedure to GDPWM yields the following SLF. ( cos( SLF GDPWM = 4, '), ',, sin (, '), ' cos(, ') ' (4) The SLF function of DPWM, DPWM, and DPWM can be easily evaluated from (4) by substituting =, =,and =.The SLF of the remaining DPWM methods are reorted in []. Shown in Fig., SLF surface of GDPWM indicates that its switching losses are a strong function of ' and they can be minimized by controlling as a function of '. It is aarent from the figure the SLF surface touches the SLF = :5 lane along a straight line. In the, ' region, selecting = ' results in minimum switching loss value (SLF min = :5), which is equal to 5 % of the CPWM methods (SLF CPWM = :). Outside this range, the modulator hase angle must be held at the boundary value of = (DPWM) for ositive ' and at the value of = (DPWM)fornegative ' so that the GDPWM voltage linearity is retained. As a result, in these oerating regions the switching losses become more than 5 % and less than 75 % of the switching losses of CPWM methods and the exact amount can be found from the D SLF surface of Fig.. Figure shows the SLF characteristics of the modern DPWM methods along with the otimum SLF solution of the GDPWM method. Note that outside the,75 ' 75 range DPWM yields minimum switching losses. The grahic suggests combining GDPWM and DPWM would result in otimum SLF. A control algorithm should select GDPWM within,75 ' 75 and otimize it with the above described choice. Outside this ' range DPWM should be selected. With this algorithm, the switching losses become less than 5% of the CPWM methods. The switching loss analysis with the aid of SLF has shown the modulator choice strongly influences the inverter efficiency and thermal design. Since the switching losses are load ower factor angle deendent, the modulator choice should involve the ower factor. Drives mostly oerating within,75 ' 75 range could emloy an online SLF otimized GDPWM algorithm. Most AC motor drives such S L F X DPWM % GDPWM ot X: DPWMMAX DPWMMIN DPWM # DPWM DPWM ' [deg] Fig.. SLF = f (') characteristics of the modern DPWM methods under fixed carrier frequency constraint (SLF CPWM = ). as induction motors and ermanent magnet motors belong to this category. Utility interface and UPS alications also oerate near unity ower factor conditions and could utilize such an algorithm. In reactive ower comensation alications (PWMVSI VAr comensators) the DPWM method could be included to the algorithm and selected outside the,75 ' 75 range such that both the switching losses and the HDF are minimized simultaneously. When the erformance criteria is only switching loss minimization, the above discussed algorithms can utilize the load ower factor information and select a modulation signal which minimizes the SLF function. However, as the linear modulation range exires at high modulation index levels, the nonlinear modulation range erformance characteristics increasingly dominate drive erformance. The waveform quality, voltage gain, and dynamic erformance characteristics of the drive substantially degrade and in addition to SLF and HDF, the inverter overmodulation erformance characteristics must be considered. The following section discussesthe voltage linearity of GDPWM and other modern PWM methods.

7 V. OVERMODULATION ANDVOLTAGE GAIN In the triangle intersection PWM technique, when the modulation wave magnitude becomes larger than the triangular carrier wave eak value ( V dc ), the inverter ceases to match the reference er carrier cycle voltseconds. As a result, the referenceoutut voltage relations become nonlinear within certain carrier cycles. SPWM s linear modulation range ends at V m = V dc i.e. a modulation index of M LSPWM = :785. Injecting a zero sequence signal to the 4 SPWM signal can flatten and contain the modulation wave within the triangle boundaries such that the linearity range is extended to at most M Lmax = :97. This is the theoretical inverter fundamental comonent voltage linearity limit [4, 5]. With the excetion of THIPWM/4 which looses linearity at M LTHIPWM=4 = 7 7 :88, all the modern zero sequence signal injection PWM methods are linear until M Lmax. Practically the theoretical voltage linearity limits are further reduced due to the inverter blanking time and Minimum Pulse Width (MPW) constraints. In alications that require large inverter blanking time (high ower drives) or MPW control (narrow ulses may cause significant transient overvoltages and commutation failure, and increase harmonic distortion in most drives [, ]) the voltage linearity range is significantly reduced. With a MPW limit of t MPW, a carrier cycle of T s, and a theoretical modulator voltage linearity limit of MLmax, t the ractical modulator voltage linearity limit, MLmax, can be calculated in the following []. M Lmax = M t Lmax (, k m t MPW T s ) (5) If no MPW constraint is emloyed, then the linearity is limited by the blanking time t d and in (5) relacing t MPW with t d the linearity limit can be calculated. In both cases the k m coefficientis for DPWM methods and for CPWM methods. Therefore, DPWM methods have suerior voltage linearity characteristics. This is due to the fact that DPWM methods utilize only one zero state (with a long duration) in a carrier cycle while CPWM methods have two zero states (with smaller time lengths). Since the smallest zero state time length determines the minimum allowable ulse width, the DPWM methods (including GDPWM) can allow smaller minimum on time values. Hence a higher linear modulation limit. In the DPWM methods, the near zero modulation index oerating region also exhibits nonlinear referenceoutut voltage relations. Since the zero sequence signal of DPWM methods near zero modulation index is large, injecting this signal to the sinusoidal references results in nearly saturated modulation signals. Therefore, the DPWM methods have a lower limit on the voltage linearity. The following minimum voltage linearity limit equation holds for all the discussed DPWM methods []. M Lmin = t MPW T s () The nonlinear modulation region from zero modulation index until MLmin is termed the undermodulation region. DPWM methods exerience significant erformance difficulties in the undermodulation region, and oerating in this region is normally avoided. The region starting from the end of the linear modulation region of a modulator, M Lmax, until the sixste oerating oint (Mi = ) is termed the overmodulation region. All modulators exerience erformance degradation in the overmodulation region []. The outut voltage waveform quality degrades and results in substantial harmonic current. The outut voltseconds become substantially less than the reference; the fundamental comonent voltage gain decreases, and the hase of the outut voltage vector deviates from the reference value. Therefore, the steady state and dynamic erformance of a drive substantially degrades in the overmodulation region. In oen loo drives (voltage feedforward controlled drives with constant volts er hertz ratio) the dynamic erformance requirements are not stringent. Waveform quality, switching losses, and the fundamental comonent voltage gain characteristics determine the overmodulation region erformance []. A modulator with low waveform distortion, low switching losses, and high gain is desirable to oerate an oen loo drive in the overmodulation region. The advantageous waveform quality and switching loss characteristics of the DPWM methods in the higher end of the linear modulation region are artially retained in the overmodulation region. The intervals without modulation wave saturation retain these characteristics while the saturation intervals imly increasing harmonic distortion and reduced switching losses. As the sixste oeration mode is aroached, the waveform distortion becomes very large (large amount of subcarrier frequency harmonics are generated) while the switching losses become negligible. A detailed study indicated GDPWM waveform quality characteristics are suerior to SVPWM and other modulators in the lower ortion of the overmodulation region (M i < :95) while a switching loss comarison indicated no notable difference [, ]. The last erformance criteria for oen loo drives is the fundamental comonent voltage gain characteristic. Therefore, the voltage gain characteristics of the modern PWM methods need be investigated. For each modulator a unique nonlinear fundamental comonent voltage gain relation exists and this relation can be closed form calculated by means of Fourier analysis of the saturated modulation wave [, ]. For examle, the gain function for DPWM is given as follows. G DPWM = M i M i = ( ) arcsin ( M i,, M i )( M ) i ( 4 ) Mi r, ( M ) (7) i Figure shows the voltage gain characteristics of various PWM methods [, ]. As the figure indicates, excet for DPWM all the modulators exerience a substantial gain reduction in the overmodulation range (furthermore, in DPWM the outut voltage decreases). In order to oerate in the overmodulation range, such modulators require a wide modulation signal range (increased word length in digital systems and a wide voltage range in analog systems). However, this either increases the rocessor cost or reduces modulation waveform resolution, which degrades erformance. Therefore, the DPWM voltage gain characteristic is suerior to all other modern PWM methods []. As DPWM and DPWM voltage gain characteristics indicate, the GDPWM method voltage gain is a function of and = rovides maximum gain (DPWM). In articular in the high end of the overmodulation range, a small deviation from = value results in a large gain reduction. Therefore, the = is the otimal gain oint and should be selected to fully utilize the resolution range of the digital/analog PWM circuit. This final argument suggests the GDPWM method has suerior overall erformance in the overmodulation region and with its otimal voltage gain characteristic the = oerating oint should be selected.

8 :SPWM :SVPWM 4 % 4 5 V * Eqn () V dc G :THIPWM[=] 4:THIPWM[=4] 5:DPWM :DPWM 7:DPWM 7 y HDF min M i M i M itr (HDF) y SLF min n ψ=ϕπ/<π/ M i M n itr (SLF, G) Gmax ψ=π/ M i Fig.. G = f (M i ) voltage gain characteristics of the modern modulators. SVPWM GDPWM In the late 98 s Stanke and Nyland recognized the erformance deficiency of SPWM in the high modulation region and develoed an algorithm for high ower drives which selects a rogrammed ulse PWM (often termed as otimal PWM) method in the high modulation (including the overmodulation) region [4]. At high modulation levels the otimized ulse attern is similar to the ulse attern of DPWM, however the aroach has limited dynamic erformance. Transitions from SPWM to the rogrammed ulse attern with low transients is only ossible at secific angles and the algorithm is involved. Therefore, the GDPWM aroach that extends the modulator linearity as much as ossible without degrading the drive dynamic erformance is suerior in most alications including the high ower drives with near megawatt ratings. In closed loo drives (current/flux/torque regulated drives widely emloying vector control rinciles) the dynamic erformance requirements are stringent. In addition to the waveform quality and switching losses, the modulator voltage hase and magnitude relations determine the overmodulation region erformance [5]. The GDPWM hase angle can be controlled in a manner to reduce the hase or magnitude error of the inverter outut voltage vector, hence imrove the dynamic erformance. The closed loo drive overmodulation issues are involved [, 5] and will not be further discussed in this work. VI. A HIGH PERFORMANCE PWM ALGORITHM The erformance analysis conducted thus far clearly shows selecting SVPWM in the lower end of the linear modulation range, and GDPWM in the remainder results in a suerior overall erformance when comared to the conventional PWM methods. To maximize the drive erformance, the transition oint from SVPWM to GDPWM and the value of GDPWM must be roerly selected. As the revious sections indicate, the transition oint from SVPWM to GDPWM is determined by the waveform quality characteristics while the GDPWM modulator hase angle is determined from the switching loss and voltage gain characteristics. Figure shows the online modulator selector flow diagram of the roosed algorithm. Simle in structure and comutational rocedure, the algorithm requires only two transi V ** a V b ** V c ** V ** a V b ** V c ** Fig.. The combined high erformance PWM algorithm flow diagram. tion modulation indices and ' as otimization arameters. With ' online estimated, the algorithm online calculates the otimal to maximize the drive erformance. The transition value M itr is determined by the GDPWM linearity limit from (5) for k m =. However, the otimal value of M itr deends on the carrier frequency value as well as the SLF and HDF characteristics. To assist in selecting this transition value, the HDF curves of SVPWM and GDPWM for various carrier frequency values are comared in Fig. 4 for = (aroximate average value over 4 ). As the figure indicates, deending on the carrier frequency value, three ractical cases can be distinguished. ) Constant carrier frequency (f c = const:): As Fig. 4 indicates the theoretical HDF curves of SVPWM and GDPWM do not intersect and SVPWM is suerior to GDPWM until M itr (calculated from (5) for k m = ). As a result, transition from SVPWM to GDPWM at a oint before M itr imlies an increase in the current waveform distortion. However, according to Fig. with early entrance to GDPWM, the switching losses can be reduced by as much as 5%. If the waveform quality requirements are not stringent, the M itr value should be selected as small as ossible. Given an HDF limit, the M itr transition oint can be easily determined from Fig. 4. More recise calculations to determine its value could involve (8) and (5)[]. ) Constant inverter average switching frequency (f swave = const:): In this case, the carrier frequency for SVPWM case is selected as f c, and for GDPWM as :5f c, such that the inverter average switching frequency, f swave remains constant. The HDF curves of Fig. 4 indicate the intersection oint of SVPWM and GDPWM is at M itr :5. Therefore, this M itr value minimizes the HDF of the drive, and under this condition the switching losses in the GDPWM mode are reduced by at most 5% when comared to SVPWM. ) Constant switching losses (P swave = const:): In this case, the carrier frequency for SVPWM case is selected as f c,andfor GDPWM as f c, such that the inverter switching losses P swave remain

9 H D F SVPWM : GDPWM : :5f c M i Fig. 4. HDF = f (M i ) curves of SVPWM and GDPWM for various carrier frequency values illustrate the otimal transition oints/regions. constant (this is true for, ' where the otimal SLF of GDPWM is.5). Figure 4 indicates that the SVPWM and GDPWM method curves are close together until near a modulation index of., then GDPWM method becomes suerior. With this aroach, smallest ossible M itr becomes equal to the undermodulation limit of GDPWM defined in (). Figure 4 indicates, in alications with small current rile requirement, M itr : would yield suerior erformance. The full PWM algorithm can be easily and efficiently rogrammed in a microrocessor or a DSP leading to a low cost high erformance drive. Since the transition from SVPWM to GDPWM only involves a zero sequence signal, oscillatory transitions do not affect the load current fundamental comonent and motion control. Only the switching frequency harmonic content changes. The comutational requirements of the algorithm (including the modulation signal generation) are only slightly higher than the conventional modulation methods. Thus, the algorithm is suitable over a wide range of alications where low cost, high erformance, and high energy efficiency are in demand. Perhas, the most suitable alications of the combined algorithm are the future generation multiurose intelligent drives. With the controller tuning the modulator online for the alication, or by allowing the user to configure the modulator of his/her choice, an increased level of erformance and satisfaction to the costumer would result. Therefore, it is believed this algorithm will be an indisensable feature of future generation drives. Note that a PWM algorithm which is solely based on bus claming the inverter leg corresonding to the hase with the largest current [] does not guarantee voltage linearity (including the low modulation index range) excet for the ower factor angle range of, <'<. If the ower factor angle is outside this range, and the hase with the largest current is selected to be clamed to the ositive/negative DC rail, the zero sequence signal generated becomes too large in magnitude. Regardless of the modulation index value, at least one of the two remaining modulation signals saturate and nonlinear modulation results. Therefore, the aroach roosed in this work, which utilizes the ower factor information and selects a with the highest ossible overall erformance is suerior and more reliable. f c f c f c VII. EXPERIMENTAL RESULTS The high erformance PWM algorithm, which combines the SVPWM and GDPWM method suerior erformance characteristics, was tested in the laboratory on a constantvolts er hertz controlled 5 HP induction motor drive. The three hase 4V, A, HP PWMVSI utilized a diode rectifier front end with a DC bus voltage of V. The PWM VSI drive control board was fully digital and emloyed a 4 MHz, 4bit fixed oint DSP. The digital PWM algorithm emloyed the triangle intersection technique and a simle software code generated the modulation signals. The carrier frequency was fixed at 5 khz and modulation waves were fed to the digital PWM counters to generate the VSI gate switch signals. The drive had a 4s blanking time, and through symmetric blanking time comensation the voltage ulses were recisely generated. A minimum ulse width control algorithm was emloyed and through a Pulse Elimination Method (PEM), voltage ulses less than s were eliminated. The DSP comuted the SVPWM zero sequence signal by comaring the three reference signals and multilying the signal with the smallest magnitude by.5. The GDPWM modulation waveforms were comuted by the algorithm described in Section II. The GDPWM method emloyed the minimum SLF control algorithm ( = ' for motoring) until the end of the linear region. The hase difference between a modulation wave and the corresonding hase current was measured to estimate '. In the overmodulation region an inverse gain comensation method was emloyed. A DC bus voltage disturbance decouling algorithm was also emloyed to reduce the sensitivity of the drive to DC bus voltage variations[]. Since the carrier frequency was fixed at 5 khz, the transition oint from SVPWM to GDPWM was determined by the linearity limit of SVPWM (with s PEM control) which was calculated from (5) as M itr = :798. However, the exerimental observation suggested that the current waveform quality with SVPWM did not immediately degrade and was slightly better than with GDPWM until aroximately.8. Therefore, the transition value was selected as M itr = :8. Figure 5, Fig., and Fig. 7 illustrate the modulator reference voltage and motor hase current waveforms immediately before, during, and after transition (M i = :79; :8; :8) under 5% of the rated motor torque (T er). Shown in the same oscillograms, the modulation waves were outut from the DSP through an A/D converter and the carrier signal voltage gain is V/V. The current waveform quality of all three figures, in articular the eak current rile, is ractically the same. Since the seed reference signal of the drive is fed to the DSP through an A/D converter, at the transition modulation index oerating oint (M i = M itr) a small reference signal noise results in an oscillation between SVPWM and GDPWM. However, this zero sequence signal oscillation only affects the carrier frequency harmonic content of the motor current and as Fig. shows, it does not disturb the motor current fundamental comonent and motion quality. Therefore, it is not necessary to rohibit modulator oscillations with any control algorithms. Since the carrier frequency is constant, changing from SVPWM to GDPWM results in significant reduction in switching losses. With ' at this oerating oint being larger than (Fig. 7 indicates ' 4 ), the SLF curve in Fig. indicates the losses are reduced by at least 45% when comared to SVPWM. The GDPWM linear modulation limit with s PEM control is M Lmax = :85 (calculated from (5)). Beyond this oint the voltage gain criteria becomes more imortant than the SLF otimization criteria and a transition to DPWM ( = ) is required. However, the exerimental study indicated transition at a modulation index value

10 Fig. 5. Exerimental SVPWM modulation wave, its fundamental comonent and the motor current waveforms (M i = :79, 49Hz,5%T er ). Scaling: A /div, V /div, ms/div. Fig. 7. Exerimental GDPWM modulation wave, its fundamental comonent and the motor current waveforms (M i = :8,5Hz,5%T er ) with = '. Scaling: A /div, V /div, ms/div. Table. SVPWM and Otimal GDPWM Thermal Performance Data Method M i TL % I max (A) T( C) SVPWM GDPWM ot.8 5. GDPWM ot and switching losses are less than SVPWM under 5 % motor load. Hence imroved energy efficiency and reduced thermal stress. Fig.. Transition from SVPWM to GDPWM (M i = :8,5Hz,5%T er ) with = '. Scaling: A /div, V /div, 5ms/div. as high as.8 did not cause noticeable waveform quality degradation. Therefore, M itr = :8 was selected. As a result, within :8 <M i < :8 the GDPWM method reduces the switching losses significantly and maintains high waveform quality. As shown in Fig. 8 at M i = :854 and %T er, the algorithm online otimizes to minimize the switchinglosses. Sincethe ower factor angle for this oerating condition is less than, the transistor which conducts the largest current is held on and this reduces the switching losses by aroximately 5% when comared to SVPWM. Confirming the imrovement in the switching losses, the laboratory measurements showed notable decrease in the heat sink temerature. The exerimental heat sink temerature data for these and above discussed oerating conditions is illustrated in Table in detail. The laboratory dynamometer ower rating limited the exeriment to a 5 HP motor and the inverter could not be fully loaded (the inverter rating is HP). Therefore, the heat sink temeratures were relatively low. The table indicates the GDPWM full motor load heat sink temerature Above M itr the GDPWM algorithm online selects = for maximum voltage gain, and the inverse gain comensated modulator oerates in the overmodulation range. Figure 9 and Fig. show the modulator and motor hase current waveforms during and after transition to the nonlinear modulation range (M i = :8; :9). As the figures indicate oscillation of during transition does not distort the fundamental comonent current, and motion quality is not affected. As the HDF curves of Fig. 7 suggest, in the uer linear modulation range the hase current rile of GDPWM decreases as the modulation index increases. In the overmodulation range the switching losses are reduced by at least 4% when comared to SVPWM. As the modulation index is further increased large amount of subcarrier frequency voltage/current harmonics are generated and the waveform quality degrades. However, as Fig., and Fig. indicate, the modulated segments of the current waveform still retain the harmonic low distortion characteristic of the GDPWM method. Figure and Fig. 4 illustrate and comare the effect of PEM algorithm on the SVPWM and GDPWM method erformance. As the exerimental waveforms indicate, eliminating voltage ulses narrower than s, the SVPWM method looses linearity at a lower modulation index than GDPWM method and the hase current waveform distorts significantly. As all the exerimental waveforms indicate,the SVPWM method in the lower modulation range combined with the GDPWM method in the remainder of the range is a suerior aroach.

11 Fig. 8. Exerimental GDPWM modulation wave, its fundamental comonent and the motor current waveforms (M i = :854, 5Hz,%T er ) with = '. Scaling: 5 A /div, V /div, ms/div. Fig.. GDPWM modulation wave, its fundamental comonent and the motor current waveforms in the overmodulation range (M i = :9, 59Hz, %T er ) with =. Scaling: 5 A /div, V /div, ms/div. Fig. 9. Transition of GDPWM from = ' to = (M i = :8, 54 Hz, %T er ). Scaling: 5 A /div, V /div, ms/div. Fig.. GDPWM modulation wave and motor current waveforms in the overmodulation range (M i = :98, Hz,%T er ) with =. Scaling: 5 A /div, V /div, ms/div. Fig.. Exerimental GDPWM modulation wave, its fundamental comonent and the motor current waveforms (M i = :9, 5Hz,%T er ) with =. Scaling: 5 A /div, V /div, ms/div.

12 VIII. CONCLUSIONS A Generalized Discontinuous PWM (GDPWM) method with online erformance otimization caability has been develoed and its characteristics have been analytically and exerimentally investigated. An algorithm that combines the suerior high modulation range erformance characteristics of GDPWM and the suerior low modulation range erformance characteristics of SVPWM has been develoed and imlemented. The selfotimization rocedure of the algorithm which minimizes the harmonic distortion, reduces the switching losses, and rovides suerior overmodulation range erformance has been described. The algorithm has a simle structure and it is suitable for DSP or microrocessor based digital imlementation. The hase angle of the modulator is online controlled in order to otimize the drive erformance. The oerating characteristics of GDPWM and the high erformance PWM algorithm have been verified with laboratory exeriments. The switching losses, harmonic distortion, and voltage linearity characteristics have been both exerimentally and theoretically investigated and reorted. A detailed modulator design method is established and the modulation index level the transition from SVPWM to GDPWM occurs is analytically determined. Fig.. SVPWM modulation wave, PEM controlled modulation wave and the motor current waveforms for M i = :85, 49 Hz. Scaling: 5 A /div, V /div, ms/div. ACKNOWLEDGMENT The authors thank Mr. David W. Schlegel of Rockwell Automation for his technical assistance during this research. REFERENCES [] H. Van Der Broeck, H. Skudelny, and G. Stanke, Analysis and realization of a ulse width modulator based on voltage sace vectors, in IEEEIAS Conf. Records, Denver, USA, 98, [] A. Schönung and H. Stemmler, Static frequency changers with subharmonic control in conjunction with reversable variable seed AC drives, Brown Boveri Review, , Setember 94. [] S. Ogasawara, H. Akagi, and A. Nabae, A novel PWM scheme of voltage source inverter based on sace vector theory, in Euroean Power Electronics Conf. Records, Aachen,Germany, 989,. 97. [4] K. G. King, A three hase transistor classb inverter with sinewave outut and high efficiency, in Inst. Elec. Eng. Conf. Publ., 974, [5] G. Buja and G. Indri, Imrovement of ulse width modulation techniques, Archiv für Elektrotechnik, 57,. 8 89, 975. [] J. Holtz, Pulsewidth modulation for electronic ower conversion, Proceedingsof IEEE, Vol. 8,. 94 4,August 994. Fig. 4. GDPWM modulation wave, PEM controlled modulation wave and the motor current waveforms for M i = :87, 5 Hz with =. Scaling: 5 A /div, V /div, ms/div. [7] J. A. Houldsworth and D. A. Grant, The use of harmonic distortion to increase the outut voltage of a threehase PWM inverter, IEEE Trans. on Industry Alications,. 4 8, Setember/October 984. [8] S. R. Bowes and A. Midoun, Subotimal switching strategies for microrocessor controlled PWM inverter drives, IEE Proceedings Vol., Pt. B, No.,. 48, May 985.