Analysis of Electronic Circuits with the Signal Flow Graph Method

Transcription

1 Circuits and Systems, 207, 8, htt:// ISSN Online: ISSN Print: Analysis of Electronic Circuits with the Signal Flow Grah Method Feim Ridvan Rasim, Sebastian M. Sattler Friedrich-Alexander-University Erlangen-Nuremberg, Chair of Reliable Circuits and Systems Paul-Gordan, Erlangen, Germany How to cite this aer: Rasim, F.R. and Sattler, S.M. (207) Analysis of Electronic Circuits with the Signal Flow Grah Method. Circuits and Systems, 8, htts://doi.org/0.4236/cs Received: October 6, 207 Acceted: November 26, 207 Published: November 29, 207 Coyright 207 by authors and Scientific Research Publishing Inc. This work is licensed under the Creative Commons Attribution International icense (CC BY 4.0). htt://creativecommons.org/licenses/by/4.0/ Oen Access Abstract In this work a method called signal flow grah (SFG) is resented. A signal-flow grah describes a system by its signal flow by directed and weighted grah; the signals are alied to nodes and functions on edges. The edges of the signal flow grah are small rocessing units, through which the incoming signals are rocessed in a certain form. In this case, the result is sent to the outgoing node. The SFG allows a good visual insection into comlex feedback roblems. Furthermore such a resentation allows for a clear and unambiguous descrition of a generating system, for examle, a netview. A Signal Flow Grah (SFG) allows a fast and ractical network analysis based on a clear data resentation in grahic format of the mathematical linear equations of the circuit. During creation of a SFG the Direct Current-Case (DC-Case) was observed since the correct current and voltage directions was drawn from zero frequency. In addition, the mathematical axioms, which are based on field algebra, are declared. In this work we show you in addition: How we check our SFG whether it is a consistent system or not. A signal flow grah can be verified by generating the identity of the signal flow grah itself, illustrated by the inverse signal flow grah (SFG ). Two signal flow grahs are always generated from one circuit, so that the signal flow diagram already resented in revious sections corresonds to only half of the solution. The other half of the solution is the so-called identity, which reresents the (SFG ). If these two grahs are suerosed with one another, so called -edges are created at the node oints. In Boolean algebra, these -edges are given the value, whereas this value can be identified with a zero in the field algebra. Keywords Analog, Feedback, Network Theory, Symbolic Analysis, Signal Flow Grah, Transfer Function DOI: /cs Nov. 29, Circuits and Systems

2 . Introduction There are various methods in the circuit technology to caculate transfer functions of electrical circuits such as Kirchhoff s laws, two-ort network theory, nodal analysis method [] and time constant method [2]. These methods are generally time-consuming and comutationally intensive. Moreover, it is always useful to develo a common grahical model, with using this model to make a connection between the state variables (arameters) and the transfer function as well as to obtain a better understanding of the comlex functionality of a network. Using mesh rules, node rules and Ohm s equations a signal flow grah can be build. Targeted minimization of subgrahs, allows the caculation of a transfer function easier. In this aer we reeat the mathematical methodology for the symbolic analysis of real electronic circuits on the basis of a given real circuitry. It is based on grah theory, the so called SFG method. The signal flow grah (SFG) is a vividly method to resent the internal structure of a system or the interaction of several systems. This resentation allows a better understanding of the function as well as the interrelations of one or more systems. Signal flow grahs are formally defined grahs [3]. Such a maing enables a one-to-one (local-bijective) and understandable descrition of a generating system. It serves to increase clarity as well as contribute to an understanding of the circuit. The SFG allows a further comrehensible and simle visual consideration of the roblem. It shows us all the functions of every art in the circuit and the connections between them. It is also a good method to hel us to define the states in the circuit. It hels us to understand the circuit deely and systematically. In addition, hysical connections of the circuit become more recognizable. For the understanding of the circuit, the signal flow grah is a suitable method for the reresentation. To resent the alication we use a Common-X circuit as a use case. First, the Common-X circuit is slit into its subcircuits and for each subcircuit their associated SFGs are established. Then by the suerosition of the SFGs of the subcircuits the total SFG for the Common-X circuit results. Organization of the aer: First, the theoretical foundations are briefly exlained in Chater 2. They are regarded as basic knowledge in order to understand this work. Subsequently, the imlementation is described in detail in Chater 3 and visualized by sketches and signal flow grahs. In the end, the results and the core outline of the work are summarized again and an outlook is given. 2. Theoretical Foundations Signal flow grah: A signal flow grah describes a system by its signal flows by directed and weighted grah [3] [4] [5]. Similarly, an SFG rovides a grahical reresentation of a set of linear relationshis [3] [6] [7]. For this reason, a signal flow grah can be constructed between the materials using the Kirchhoff's laws, the current and voltage relationshi. The directed and undirected grahs, the signals are alied to nodes and functions on edges; the direction is given by an DOI: /cs Circuits and Systems

3 arrow on the edge. The edges of the signal flow grahs are small rocessing units, through which the incoming signals are rocessed in a certain form. In this case, the result is sent to the outgoing node [3]. In network theory are often used ohmic resistors, caacitors and inductors. When considering these elements, the direction of the directed and weighted signal flow grah can not be interchanged easily. Prior to changing the direction of the arrow direction, the function on the edge has to be inverted. The material equation is given as an examle. The signal flow grah with the resective function on the edge is shown in Figure [8]. Figure. SFG of an inductance. 2.. Elements of a Signal Flow Grah A signal flow grah exists next to edges and nodes of aths, loos, inut node and outut node. A node is a oint or a circle, which reroduces a signal or a variable. In order to illustrate these individual elements, the Figure 2 is to be investigated in more detail. Figure 2. Examle of a signal flow grah (SFG). This signal flow grah has six nodes and seven edges. A node is a oint or a circle that reresents a signal or a variable. In the examle, the variables x, x 2 etc. reresent a node. There are different tyes of nodes. A deendent node has one or more leading incoming edges and any number of leading outgoing edges. Inut node ( x 0 ), also known as source node, has only outgoing aths and reresent indeendent variables. An outut node ( x 5 ), also known as sink node, has only incoming aths and is in contrast to the inut node a deendent variable. A ath is a connected sequence of edges in one direction, the connection of x to x 3 by edges bc, via node x 2 reresents a ath. The ath gain is the roduct of the functions on the edges along a ath. In this examle, the ath gain is b c. A reverse ath is a ath that leads towards the entrance node. As with the forward ath, the nodes can only be assed once. The DOI: /cs Circuits and Systems

4 connection via the edges bc, and g build a feedback loo, the initial loo is x in this case. A feedback loo is resent when the start and end nodes are the same. When the edges bc, and g ass through, we reach the original node x : x x x x. oos are equal oriented edges forming a closed ath 2 3 and will touch no node multily. A self-referential loo is exactly resent when a ath flows from one node in the same node without crossing other nodes [9] Modifications of Signal Flow Grah By associative law (Figure 3) sequential edges can be summarized. As soon as three nodes which are interconnected via a ath so resent, that there are the x0 x x2 connected, the central node x is eliminated from the grah: x a = x, x b= x x a b= x Figure 3. Summary of sequential edges-associative law. Parallel running edges with the same inut node x 0 and outut node x can be combined with the distributive law (Figure 4). The resulting grah is minimized to an edge. For examle, two edges from node x 0 flow into the node x. Algebraically, the node x be exressed as: x a+ x b= x a+ b = x ( ) Figure 4. Summary of arallel edges-distributive law. Dissolving a feedback loo (Figure 5): In order to eliminate the node x, be first the functions multilied on the edges along the forward ath. Next, forming the roduct of the individual loo gains. This is the signal flow grah of two edges a b and c b, in which c b is a self-referential loo. Thus, the node x is removed from the grah and the feedback has been summarized in a reflexive edge: x a= x, x b= x x a b+ x c b= x a b x a b= x ( c b) x = x c b DOI: /cs Circuits and Systems

5 Figure 5. Dissolving a feedback loo. A reflexive edge (self-referential loo) can be eliminated, in which one by one divides the roduct of the functions on the edges toward the reflective edge minus the roduct of the functions on the reflexive edges. For more reflexive edges one can use the same rocedure. In Figure 6, the reflexive edge resolved is shown with the corresonding weights [4] [6]. Figure 6. Dissolving a reflexive edge. Examle: Source node x 0 Sink node x 4 Target: Simlification of the SFG consists only of start and end nodes Transfer Function G ) The node x is to be eliminated: Resolving a feedback loo. DOI: /cs Circuits and Systems

6 2) Elimination of reflexive edges: 3) On the basis of the associative law, the nodes x 2 and x 3 are taken from the grah: x a b d f = = 0 4 G x c b c g 3. Analysis of Common X-Circuit ( )( )( ) In this section, we will show you an examle: How to set u the SFG, then by using SFG modification rules how to simlify the SFG to calculate the transfer function, and additionally how we check our SFG whether it is a consistent system or not? The Common X circuit (Figure 7) is chosen as an examle of the determination of the signal flow grah in the course of work. Therefore, at this oint the members of the small-signal model are exlained: V in is the inut voltage, V is the outut voltage, R Y is a lead resistance or the internal resistance of the voltage source, r the baseband resistance of a BJT, g m is the transconductance or the steeness of the CX circuit with g m = i out /V in. To aly now the method SFG, the circuit is divided into artial circuits (Figure 8). The intention in the division is to reduce the comlexity of the analysis and to win by the substes a better and clearer view of the functioning of the structure. The small-signal equivalent circuit diagram of the CX circuit can be divided into two arts following circuits: In order to simlify the effort of calculation, in the first ste the circuit is broken. This results in two subcircuits. DOI: /cs Circuits and Systems

7 Figure 7. Small signal equivalent circuit of the CX-circuit. Figure 8. Small signal equivalent circuit of the CX-circuit in searate form. 3.. Analysis of First Subcircuit The first subcircuit is a simle voltage divider. Based on the above considerations (Figure 8) can now be derived for the first subcircuit of the signal flow grah (Figure 0). Before the signal flow grah is derived from the first subcircuit, the first subcircuit is to be simlified by a further ste. If the resistor R Y is taken out of the circuit, then a circuit with an ideal voltage source and a resistor is r obtained, Figure 9. In the ideal case, the total voltage V in dros across the resistance r. The voltage source sulies the current i as a function of the resistance r. A voltage source should never be confused with a ower source. The voltage source rovides a current deendent on the load. On the other hand, the current source rovides a constant current indeendent of the load. The mesh rules and the material equation yield the equations: Vin = : V with i : = V r Figure 9. First subcircuit (left) of the CX-circuit is simlified by R Y and SFG (right) of the circuit. Thus, the signal flow grah can be reroduced for this simle structure. The dashed edge comletes the identity of the signal flow grah. Therefore, the signal flow reresentation reresents only a half of the solution. For each material equation, we can go back, Figure 9. On the basis of the revious considerations, the DOI: /cs Circuits and Systems

8 signal flow grah for the first sub circuit can now be derived much more easily. It is desirable that the total voltage V in of the voltage source dros across the resistor r. In reality, however, a small art of the voltage at the much smaller resistance R Y dros. The desired voltage at the resistor r can thus be adjusted with the resistance R Y. Thus, the mesh equation for the first sub-circuit can be established: V : = V V in RY Deending on the resistance r is generated by the voltage V of the current i. The material equation is: i : = V ; VRY : = iy RY ; i = : iy r V RY The current i flowing through the resistor R Y and generates the voltage. Thus, the signal flow grah of the first artial circuit may be formed by exansion of the signal flow grah of the ideal case without R Y. This only needs around the edge ( iy, V RY ) of the circuit to be sulemented. The dashed edges comlement the axiomatic identity of the signal flow grah (Figure 0). Figure 0. First subcircuit (above) of the CX-circuit and SFG (below) of the first artial circuit Analysis of Second Subcircuit When dividing the common X-circuit, the second subcircuit between the nodes X and Z forms in Figure 2 a current divider. Analogously to the first subcircuit, the current divider is initially to be considered for the sake of simlicity without the resistor r 0, Figure. In the ideal case, the source current i should flow comletely through the load resistor R and generate the voltage V there. A current source should not be confused with a voltage source. The current source i sulies a current which is indeendent of the load resistor R. By these statements the equations of the currents and the material equations can be defined for this simle case. DOI: /cs Circuits and Systems

9 i = : i ; V : = i R R R Figure. Second subcircuit (left) of the CX-circuit is simlified by r 0 and SFG (right) of the circuit. From the definitions, the signal flow grah for the circuit of Figure (left) can be constructed. The dashed edges describe the identity of the signal flow grah. With the hel of the circuit from Figure, the signal flow grah of the second subcircuit can be determined much more easily. In reality, however, the total current i of the source does not flow through the load resistor R. In order for the entire current i to flow through the load resistor R, the resistance r 0 would have to be infinite. But since the resistance r 0 is not infinite, a small fraction of the source current flows through it. The current i R through the load resistor R can be adjusted by a suitable choice of the resistor r 0. This allows the node rule to be set u. ir : = i ir0 The current i R generates the voltage V at the load resistor R, which is equal to the magnitude of the voltage falling to r 0. This relationshi can be understood by means of the mesh rule. The voltage across the resistor r 0 roduces the current i r0 which acts on the current i R through a negative feedback. In summary, the node, mesh rule and the material equations for the second subcircuit can now be set u. ir : = i ir0; ir0 : = V0 ; r V = : V ; V : = i R 0 R If the signal flow grah of the simle circuit is extended by the nodes V 0 and i r0 using the above equations, the signal flow grah of the second subcircuit will result, Figure 2. The material equations can be inverted. In reality, not all of the current i of the source flows through the load resistor R : Thus, if the total current i flows through the load resistor R, the resistance r 0 would be infinite. But the resistance r 0 being not infinitely large, a small ortion of the source current flows through it. The current i R through the load resistor R can be adjusted by the aroriate choice of resistance r 0 or reduced by this resistance. Thus, the nodes usually can be laced. The current i R generates at the load resistor R the voltage V which is equal to the voltage dro across r 0. With the mesh analysis, this relationshi can be traced. The voltage across resistor r generates the current 0 i r0 which acts back to the current i R through a negative feedback. In summary, the node, mesh and the material 0 DOI: /cs Circuits and Systems

10 equations for the second subcircuit can now be set u. Extending the signal flow V, i, yields the signal flow grah grah of the simle circuit around the edge ( ) 0 r0 of the second subcircuit. The material equations can be inverted. Figure 2. (Above) Second subcircuit of CX-circuit and (below) SFG of the second subcircuit Signal Flow Grah of Total CX-Circuit To make the signal flow grah of the CX-circuit, the individual subgrahs must be combined into a grah (Figure 3). The current source i is a voltage controlled current source. It is controlled by the voltage V, the current is determined by i = gm V. Following the relationshi between the current source i and the voltage V the two signal flow grahs can now be interconnected, V in as source, i R as sink, i and V as states. Figure 3. Signal flow grah of the total CX-circuit for r and R r Transfer Function of CX-Circuit Verification of the transfer function: Simlifying the signal flow grah in Fig- DOI: /cs Circuits and Systems

11 ure 3 using the SFG method. In order to find the transfer function, the signal flow grah from Figure 3 is to be simlified ste by ste so that the individual loos and aths leading to the solution are clearly visible. Elimination of the nodes iy, VRY,, iv 0 and i r0 i, V,, iv, i are eliminated by the associative law. Nodes ( ) Y RY 0 r0 Elimination of the node i R The node i is removed from the grah using the associative law. The node i R is controlled by the rule for resolving feedback loos from the grah. Elimination of the reflexive edges and the node There is only one forward ath from V in to V V g R g r r m m 0 V = = R R R Y Y R + r R + r0 RY + r r0 + + r r 0 A Proof of Method: How we check our SFG whether it is a consistent system or not? The mathematical axioms of our SFG are based on field algebra. If we look at all incoming and outgoing edges of a node, a suer edge aears and this is a -edge. With -edges, we can check wheather this is a consistent system or not and the formula is grahically checked. Proof of the SFG method using the inverse signal flow grah (SFG ): A fundamental ste at the end of each analysis rocess is to check whether the signal flow grah and the other reresentation analysis methods of a circuit develoed therefrom have been correctly calculated. On the basis of this roof, it is determined whether the resective signal flow grah corresonds to a consistent system. A signal flow grah can be verified by generating the identity of the signal flow grah, illustrated by the inverse signal R DOI: /cs Circuits and Systems

12 flow grah (dashed -edge). Two signal flow grahs are always generated from one circuit, so that the signal flow grah already resented in revious sections corresonds to only half of the solution. The other half of the solution, the so-called identity, which is reresented by a dashed edge, reresents the inverse signal flow grah (SFG ). If these two grahs are suerosed with one another, so-called -edges are created at the node oints. In Boolean algebra, this -edge is given the value, whereas this value can be identified with a zero in the field algebra. Examle: We want to check the edge of the node V. Now we look at all incoming and outgoing edges of this node of Figure 3, all other nodes and edges can be eliminated as well as dashed edges with material equations. Because material equations give us -edges, we do not use this to check. First we simlified Figure 3 as follows. Then we look for incoming and outgoing edges within the loos. There are 2 loos, VP i iy VRY V and P VP i iy Vin V, they are P marked with diferent lines. The nodes (, Y, RY ) following signal flow grah. i i V are eliminated by the associative law. This gives the Further simlification of SFG: Elimination of reflexive edges of V and then DOI: /cs Circuits and Systems

13 elimination of the reflexive edges of V in. It gives us the edge of the node V. And finally our SFG is checked. Analogously we can use this roof method for all nodes. 4. Conclusion The SFG analysis can offer a faster and more effective alternative to comlex structures with the right aroach and solution atterns. However, the signal flow grah reresents only a rojection of the solution of the network equations. Together (suerimosed) to the inverted solution of the system is then obtained as a result all the states of the structure with self-imosed and unweighted loos. For the analysis of a network the SFG-method rovides an imortant alternative, since you are saving in comlex systems not only long calculus, but also get a most suitable overview in the interaction of the system comonents and sare arts. The method is rarely used, and the existing literature on the subject is little. One can always encounter various roblems in the analysis of a circuit that can now be easily understood with the knowledge of this method and verified. The key of understanding a circuit is always its real structure (hysics). The SFG is the structure faithful model which brings together real hysics and underlying theory. For understanding the cicuit, the signal flow grah is the most suitable reresentation. Thus the method can describe a generating system intelligibly and unambiguously. In this resect, the hysical connections of a circuit are also more recognizable. Such a grah determines how a circuit works and shows what needs to be seen, which can not be fulfilled by the circuit diagram. It also makes a circuit reroducible and traceable. The fact that an SFG belongs to a model reresentation roves itself to be more comact and clearer. In addition, mathematical connections are illustrated more clearly due to the visualization, and certain comutational stes are exlained in a more comrehensible manner. As far as time is concerned, a very small comutation time can be achieved with the aid of the SFG using the smallest memories. The SFG offers further great advantages. Since an SFG is comressible, only a small amount of material is required, so that the cost factor can be minimized. In addition, the method shows the highest quality since the SFG is directed and exhibits due to the -edges and the ability of being self-verifying. Desite this, the signal flow grah method still requires a high degree of research. This need relates, among other things, to the obstacles and difficulties that may arise when rogramming the grahics. DOI: /cs Circuits and Systems

14 References [] Prasad, R. (204) Fundamentals of Electrical Engineering. 3 rd Edition, PHI earning Private imited, New Delhi. [2] Palumbo, G. and Pennisi, S. (2007) Feedback Amlifiers: Theory and Design. Sringer Science and Business Media, Berlin. [3] Dorf, R.C. and Bisho, R.H. (20) Modern Control Systems Solution Manual. Pearson Studium, ondon. [4] Mason, S.J. (956) Feedback Theory Further Proerties of Signal Flow Grahs. IEEE, 44, htts://doi.org/0.09/jrproc [5] evine, W.S. (996) The Control Handbook. CRC and IEEE Press, Boca Raton. [6] Brzozowski, J.A. and McCluskey, E.J. (963) Signal Flow Grah Techniques for Sequential Circuit State Diagrams. IEEE, EC-2, [7] Horowitz,.M. (203) Syntehsis of Feedback Systems. Academic Press INC, ondon. [8] Fakhfakh, M., Pierzchala, M. and Rodanski, B. (202) An Imroved Design of VCCS-Based Active Inducators, Synthesis, Modeling. Analysis and Simulation Methods and Alications to Circuit Design (SMACD) 202, Seville, 9-2 Setember 202. [9] Bakashi, U.A. and Bakashi, U.V. (2009) Princiles of Control Systems. Technical Publications, Pune. DOI: /cs Circuits and Systems