Mixed baseband architecture based on FBD Ʃ based ADC for multistandard receivers

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1 ACTA IMEKO ISSN: 87X September 5, Voume 4, Number 3, 4 Mixed baseband architecture based on FB Ʃ based AC for mutistandard receivers Rihab Lahoui,, Mane Ben Romdhane, Chiheb Rebai, ominique aet GRESCOM Research Lab., SUP COM, University of Carthage, Cité Technoogique des Communications, 83 E Ghazea, Ariana, Tunisia IMS Research Lab., IPB ENSEIRB MATMECA, University of Bordeaux, 35 Cours de a Libération, Bâtiment A3, 3345 Taence Cedex, France ABSTRACT This paper presents the design and simuation resuts of a nove mixed baseband stage for a frequency band decomposition (FB) anaog to digita converter (AC) in a mutistandard receiver. The proposed FB based AC architecture is fexibe with programmabe parae branches composed of discrete time (T) 4 th order singe bit Ʃ moduators. The mixed baseband architecture uses a singe non programmabe anti aiasing fiter (AAF) avoiding the use of an automatic gain contro (AGC) circuit. System eve anaysis proved that the proposed FB architecture satisfies design specifications of the software defined radio (SR) receiver. In this paper, the authors focus on the Butterworth AAF fiter design for a mutistandard receiver. Besides, theoretica anaysis of the reconstruction stage for UMTS test case is discussed. It eads to a compicated system of equations and high digita fiter orders. To reduce the digita reconstruction stage compexity, the authors propose an optimized digita reconstruction stage architecture design. The demoduation based digita reconstruction stage using two decimation stages has been impemented using MATLAB/SIMULINK. Technica choices and performances are discussed. The computed signa to noise ratio (SNR) of the MATLAB/SIMULINK FB AC mode is equa to at east 75 db which satisfies the dynamic range required for UMTS signas. Next to hardware impementation with quantized fiters coefficients, the authors impemented their proposition in VHL in a SysGen environment. The measured SNR of the hardware impementation is equa to 74.8 db which satisfies the required dynamic range of UMTS signas. Section: RESEARCH PAPER Keywords: Frequency band decomposition (FB); moduators; software defined radio (SR) receiver Citation: Rihab Lahoui, Mane Ben Romdhane, Chiheb Rebai, ominique aet, Mixed baseband architecture based on FB Ʃ based AC for mutistandard receivers, Acta IMEKO, vo. 4, no.3, artice 3, September 5, identifier: IMEKO ACTA 4 (5) 3 3 Editor: Paoo Carbone, University of Perugia, Itay Received February 4, 5; In fina form May 8, 5; Pubished September 5 Copyright: 5 IMEKO. This is an open access artice distributed under the terms of the Creative Commons Attribution 3. License, which permits unrestricted use, distribution, and reproduction in any medium, provided the origina author and source are credited Corresponding authors: Rihab Lahoui, ominique aet, e mais: rihab.ahoui@supcom.tn, dominique.daet@ims bordeaux.fr. INTROUCTION Software defined radio (SR) is a state-of-the-art technoogy soution of the software radio concept, first introduced by Mitoa []. SR was proposed by scientists to achieve a feasibe mutistandard receiver. To ensure software reconfigurabiity, the received signas must be digitized as near as possibe to the antenna in order to reduce anaog circuitry. This eads to increased design constraints of the anaog-to-digita converter (AC). In fact, in iterature, there is no fuy integrated AC that covers different coexisting wireess and mobie standards from narrowband to wideband channes with different required dynamic ranges []. To dea with this probem, the authors propose the use of parae architectures of moduators that ensure high accuracy, in terms of dynamic range, whie extending conversion bandwidth. Parae architectures have become an attractive soution for anaog-to-digita conversion especiay in the context of SR, where new appications require extended bandwidths. There are three main parae architectures described in the iterature; the Hadamard moduated parae architecture (Π) [3], the timeintereaved architecture (TI) [4], and the frequency band decomposition (FB) architecture [5]-[7]. In this paper, the authors choose for the FB architecture because unie Π and TI architectures the FB architecture is insensitive to gain and offset mismatches [8], [9]. In the FB architecture, the parae moduators are band-pass (BP) and each one converts a part of the tota input signa band. There are propositions of FB architecture designs in the iterature, essentiay in [5]-[7]. The main drawbac of these soutions is ACTA IMEKO September 5 Voume 4 Number 3 4

2 that they are based on continuous-time (CT)- moduators. In fact, CT- moduators bring anaog errors that shoud be handed in the digita reconstruction stage. To overcome this probem, the authors proposed an FB architecture based on discrete-time (T)- moduators []. They are 4 th order moduators based on singe-bit quantizers []. The authors choose singe-bit quantization to overcome non-inearity errors introduced by muti-bit quantizers [7]. Moreover, the novety in this proposed architecture is the use of six programmabe parae branches with different sub-bandwidths, where ony some branches are active according to the seected standard. The mutistandard receiver handes E-GSM, UMTS and IEEE8.a communication standard signas. The outputs of the parae branches in the FB AC architecture have to be recombined using a digita reconstruction stage to provide the overa fina output. E-GSM signas are not concerned in this stage since they soicit ony one branch of the FB AC architecture. Ony decimation is required at the moduator output. However, a digita reconstruction stage is mandatory for the UMTS and IEEE8.a signas that soicit the three first branches and a the six branches of the AC architecture, respectivey. In [], the authors focused on the design and test of a digita reconstruction stage for the FB Ʃ -based AC architecture. It was verified when impementing the whoe AC architecture in MATLAB/SIMULINK that the architecture performances satisfy the standard requirements for the dynamic range of the UMTS signas in this test case. The choice of this test case has been made because the three first branches of the AC architecture, which are activated for digitizing UMTS signas, are reused for the digitization of IEEE8.a signas. Besides, the UMTS standard requires a dynamic range of 73.8 db that is higher than the required dynamic range for IEEE8.a which equas 6.8 db. In this paper, interest is focused on the design of the mixed baseband stage for the SR receiver. Indeed, in a conventiona baseband receiver stage, an anti-aiasing fiter (AAF), an Automatic Gain Contro (AGC) circuit and an AC are required to anaogicay process and digitize the received signas. However, in the proposed mixed baseband stage soution in this paper, the authors suggest to suppress the AGC, to design a singe passive AAF and to digitize the received signa thans to the mutistandard FB T -based AC architecture. Moreover, the theoretica anaysis of the digita reconstruction stage based on demoduation is detaied using mutirate theory. The design of the FB -based AC with demoduationbased digita reconstruction stage is first recaed []. Then, the novety comes with the theoretica discussion that justifies the authors proposition of an optimized digita reconstruction stage. In this paper, the authors come aso with new comparative MATLAB/SIMULINK simuation resuts of signa-to-noise ratio regarding frequency position of the input signas. Besides, resuts of hardware impementation with quantized fiter coefficients are presented and discussed. The paper is organized as foows. In Section, the design of an FB -based mixed baseband stage with a singe passive AAF ahead intended for an SR receiver is presented. Section 3 deas with the digita reconstruction stage of the FB based AC. The two existing approaches in the iterature, the direct reconstruction and the demoduation-based reconstruction, are discussed. A demoduation based digita reconstruction stage design for UMTS test case is proposed and anayzed theoreticay using mutirate theory. This initia design has been modified and optimized in order to aow its impementation. Simuation resuts of the FB -based AC mode using the MATLAB/SIMULINK environment are presented in Section 4. Then, impementation resuts in VHL using the SysGen environment are presented and discussed. Finay, some concusions are drawn in Section 5.. FLEXIBLE FB Ʃ ARCHITECTURE ESIGN To reach system eve specifications of wireess and mobie standards, the authors propose to use a parae moduator architecture and modify the conventiona mixed baseband stage design []. The mutistandard receiver processes E-GSM [3], UMTS [4] and IEEE8.a [5] communication signas []. According to these supported communication standard specifications, design specifications for a mutistandard SR receiver have been computed. Furthermore, a hybrid homodyne/ow-if architecture was proposed in [6] for the SR receiver front-end. An RF fiter seects the received signas. Afterward, the signas are ampified by a ow-noise ampifier (LNA). Then, on the one side, the UMTS and IEEE8.a signas are down-converted by the mixer to baseband frequencies. On the other side, the E-GSM signas are down-converted to a ow intermediate frequency of Hz to overcome ficer noise disturbance. System eve specifications are introduced in Sub-section.. Then, in Sub-section., the mixed baseband stage design is expained. Next, the design of the non-programmabe AAF is proposed in Sub-section.3. Afterwards, the design of the FB -based AC architecture is detaied in Sub-section.4... Mixed baseband SR receiver specifications According to the specifications of the communication standards handed by the SR receiver, system eve specifications for the baseband receiver are depicted. Tabe summarizes the channe bandwidth Ch BW, the channe spacing Ch sp, the reference sensitivity S ref, the signa-to-noise ratio (SNR) at the receiver input, SNR in, the signa-to-noise ratio at the receiver output SNR out, the anaog gain reative to a 3 dbm AC fu scae input G ana, the receiver dynamic range R in and the AC dynamic range R AC from which the AC resoution Res AC, is deduced. Since E-GSM signas are down-converted to a ow intermediate frequency of Hz to avoid ficer noise, the E- GSM channe bandwidth is considered equa to Hz. The mixed baseband architecture is presented in the next sub-section. Tabe. esign specifications for the E GSM/UMTS/IEEE8.a receiver. E GSM UMTS IEEE8.a ChBW (MHz) Chsp (MHz). 5 Sref (dbm) 7 65 SNRin (db) SNRout (db) Gana (db) Rin (db) RAC (db) ResAC (bits) 6 ACTA IMEKO September 5 Voume 4 Number 3 5

3 f RF f LO f in AAF moduator moduator M FB-based AC Figure. FB Ʃ based mixed baseband stage. bit bit igita reconstruction stage AC output Tabe. esign of the LP AAF fiter E GSM UMTS IEEE8.a Fs (MHz) fp (MHz) fr (MHz) Nb (db) Amin (db) AAF order (n) Mixed baseband architecture The mixed baseband stage, presented in Figure [], foows the mixer which is controed by the oca osciator (LO). The mixed baseband stage is composed of a singe passive ow-pass (LP) AAF that precedes the FB -based AC. There is no need for n automatic gain contro (AGC) circuit before the AC stage since the AAF fiters ony E-GSM bocers that are outside the IEEE8.a bandwidth [6]. The M parae singe-bit quantizer moduators are designed using Matab toos. Their stabiity is ensured using a test pan performed in []. moduator outputs are combined in the digita reconstruction stage to reconstruct the fina output. The design of the non-programmabe AAF is expained in the next sub-section..3. esign of the non programmabe AAF In this sub-section, the authors are interested in the design of a Butterworth non-programmabe AAF for the SR receiver. This AAF is unique for the E-GSM, UMTS and IEEE8.a signas. Its roe is to attenuate bocers and interfering signas which are susceptibe to fod on the usefu signa after samping operation of the AC, whie ensuring the required SNR out as defined by design specifications presented in Tabe. The ow-pass AAF is defined by its cut-off frequency f p, its rejection frequency f r, its maxima attenuation in the usefu bandwidth A max, and its minima attenuation A min, beyond the rejection frequency. The cut-off frequency is set equa to haf of the channe bandwidth with a conception margin of 3 %. This margin is required to avoid attenuation in the usefu channe bandwidth after anaog integrated circuit reaization but aso circuit aging [6]. The rejection frequency is fixed at F s -Ch BW /, where F s is the samping frequency. The F s vaues for the different supported standards are obtained when designing the FB Ʃ -based AC as given in Tabe []. These evauation conditions are expained by Figure. The minima attenuation is cacuated as given by () [6], A N S SNR M min b ref out AAF () where S ref is the receiver sensitivity whose vaues for the different supported standards are given in Tabe, M AAF is a margin of conception equa to 3 db attributed to S ref, and N b is the eve of the bocer to attenuate. The bocer eve is cacuated given the bocer s profie at the RF fiter output of the different supported standards. In fact, LNA and mixer ineary ampify the signas in the received bandwidth. Vaues of the AAF parameters are summarized in Tabe. The cut-off frequency is considered to be the same for the three standards and corresponds to haf of the Ch BW of IEEE8.a standard with a margin of 3 %. The AAF order is therefore computed given the Butterworth attenuation expression as described by (), A / f max n A( f ) Log( ( )( ) ) () f p where n is the Butterworth fiter s order to compute and A max is set equa to.3 db. Given the needed A min to attenuate bocers at the rejection frequency of each standard, the required AAF order is computed. Computation resuts are summarized in Tabe. For UMTS and IEEE8.a standards, the required AAF orders are 4 and 3, respectivey. However, the E-GSM standard is the most restrictive since it requires a 6 th order Butterworth AAF. Thus, for the SR receiver the ony AAF for the three standards is a 6 th order Butterworth AAF. The frequency response of the designed AAF is presented in Figure Fexibe FB Ʃ architecture The authors in [] started from SR receiver specifications in terms of channe bandwidths and required AC dynamic ranges for the chosen communication standards. The designed discrete-time (T) FB architecture for the AC stage was proposed in []. The design reaizes a trade-off between increasing the samping frequency whie sti operating in discrete time and increasing the number M of parae branches regarding a ow-compexity goa, or increasing moduator orders whie eeping them stabe. Thus, an FB architecture which is composed of 6 programmabe parae Attenuation (db) Amin E-GSM= 85 db 8 Amin UMTS= 5.8 db 6 Amin 4 IEEE8.a= 4.6 db Specifications mas 6 th order Butterworth attenuation f p =.8 MHz Frequency (MHz) f r UMTS f r E-GSM f r IEEE8.a =7.8 MHz =7.8 MHz =85. MHz Figure. Evauation conditions for the AAF design. Figure 3. Frequency response and specification mas of the LP nonprogrammabe AAF for the SR receiver. ACTA IMEKO September 5 Voume 4 Number 3 6

4 branches was proposed as presented in Figure 4(a). According to the E-GSM, UMTS or IEEE8.a communication standard, from the whoe architecture ony the needed branches are activated. Each branch is composed of a T 4 th order singe-bit quantizer moduator. The moduator order is defined as the number of integrators or resonators for ow-pass (LP) and band-pass (BP) moduators, respectivey. Since the designed FB architecture is composed of both LP and BP moduators, the authors designate in this paper as moduator order []. Besides, the moduators of the proposed FB architecture are based on a non-unitary signa transfer function (NU-STF) that permits deaing with stabiity probems and recovering the input signa dynamic range []. The branch bandwidths are different and the samping frequencies vary from one radio communication standard to another in order to optimize the fexibe FB architecture whie fufiing the theoreticay required dynamic ranges. The branch bandwidth and the samping frequency according to the chosen standard are given by the branch frequency division pan presented in Figure 4(b). In the next section, to detai the theoretica anaysis and design of the digita reconstruction stage of the FB -based architecture, the authors seect the UMTS standard as a test case. The choice of this test case has been made because the UMTS standard uses the three first branches of the AC architecture. These branches are aso seected with three more branches for the digitization of IEEE8.a signas. Moreover, the required standard dynamic range of the UMTS is equa to 73.8 db which is higher than the 6.8 db for the required dynamic range of the IEEE8.a. (a) 3. IGITAL RECONSTRUCTION STAGE: THEORETICAL ANALSIS AN ESIGN In the iterature, there are two main approaches to reconstruct the output signa from the parae moduator outputs whie ensuring the required dynamic range [5]. For the first soution, the moduator outputs are directy processed using band-pass fiters, then, the seected signas are decimated. However, the second soution demoduates each moduator output signa by converting it to baseband frequencies, then, the signa is decimated before being processed by a ow-pass fiter. It was shown in [5] that the digita reconstruction with direct processing presents high compexity due to high required BP fiter orders and operating samping frequencies. The digita reconstruction with demoduation requires ower LP fiter orders and operating samping frequencies. Consequenty, in this paper, the authors proceed to digita reconstruction with demoduation whose architecture is expained in sub-section 3.. The theoretica anaysis of this architecture is presented in Sub-section 3.. Afterwards, an optimized digita reconstruction stage is impemented using MATLAB/SIMULINK and technoogy choices are discussed in Sub-section igita reconstruction with demoduation The digita reconstruction architecture with demoduation is presented in Figure 5. In this digita processing, the BP moduator output signas are first brought to baseband by processing a compex demoduation. This operation consists in mutipying moduator outputs by the compex sequence m [n] as given by (3) where f c is the centra frequency of the th branch bandwidth, T s is the samping period which is equa to /F s and n is a positive integer: m n j f c nt s e (3) Since the moduators oversampe input signas [5], it is mandatory to proceed to decimation and fitering operations after the compex demoduation operation. Hence, each demoduated signa is decimated in order to decrease its samping frequency and bring it to the Nyquist frequency which is defined as the doube of the channe bandwidth. The goba decimation factor is equa to the goba oversamping ratio, OSR, defined as the samping frequency F s, out of the Nyquist frequency. Then, each demoduated and decimated signa is processed by a ow-pass fiter that seects the branch bandwidth before being moduated. The moduation operation consists in frequency up-converting each baseband signa around the corresponding branch centra frequency at the Nyquist frequency. Finay, the output signas of the parae branches are recombined to form the output signa of the FB architecture. For the first branch that operates with a LP- (b) Figure 4. (a) esigned FB based AC architecture, (b) branch frequency division pan. Figure 5. igita reconstruction with demoduation of the FB architecture (genera case). ACTA IMEKO September 5 Voume 4 Number 3 7

5 moduator, there is no need to demoduate and moduate as shown in Figure 5. Starting from the test case corresponding to the FB based AC architecture operating to digitize UMTS signas, the design of a demoduation based digita reconstruction stage is performed. In this chosen test case, ony the three first parae branches of the FB AC architecture are activated. The samping frequency is set at 7 MHz and operating branche bandwidths are as expained by the branch frequency division pan for UMTS signas presented in Figure 4(b). The goba decimation factor is chosen equa to 6 which is an integer number that permits digitizing UMTS signas at a Nyquist frequency equa to 4.5 MHz. This Nyquist band is between the channe bandwidth Ch BW and the channe spacing Ch sp, as given in Tabe. The equivaent diagram in the discrete-time domain of the designed digita reconstruction stage is presented in Figure 6 where H (z) is the non-unitary signa transfer function of the th moduator, G (z) the decimation fiter of the th branch, and F (z) the branch bandwidth seection fiter of the th branch. This mode is anayzed anayticay in the next sub-section. 3.. Theoretica study of the demoduation based digita reconstruction stage In this sub-section, based on the mutirate theory [], the theoretica anaysis of the digita reconstruction stage mode, designed for the UMTS test case as presented in Figure 6, is accompished. In the first branch, a decimation operation and branch seection fitering process are performed. It is necessary to start by presenting the genera expression of the z-transform of a decimated input signa by a decimation factor as given by (4) [6]: j j( ) ( e ) X( e ) or ( z) X( z W ) (4) j j with W e and z e. Therefore, the transfer function of the first branch output signa is deduced as expressed by equation (5): ( z) X ( z W ) H ( z W ) G ( z W ) F ( z In the nd and 3 rd branche, the digita reconstruction processing contains demoduation and moduation operations that consist, as expained in the previous sub-section, in mutipication of the signa by a discrete exponentia signa as given by (3). It is important to note that in this designed digita reconstruction stage, demoduation is operated at the moduator oversamping frequency F s. However, the moduation is performed at the down samping frequency equa to F s./. Therefore, the moduation is obtained by mutipying the outputs of branch seection bandwidth fiters by the Figure 6. Equivaent diagram of demoduation based digita reconstruction stage mode for the UMTS use case. ) (5) sequence given by (6): m n jf c nts mod_ e (6) The z-transform expression of the nd branch output signa after demoduation dem, is then given by expression (7): dem jf T jf ( c s c s z) X( z e ) H ( z e ). (7) Then, the expression of the nd branch output after decimation is expressed by (8): dec ( z) H ( z X ( z j f c Ts ) G ( z T j f c Ts ) ). (8) Therefore, the z-transform expressions of the nd and 3 rd branch output signas are determined as given respectivey by (9) and (): ( z ) 3 H ( z) ( z G ( z 3 3! H ( z G ( z X ( z W e X ( z j f c T s ( ) j f c T s j f c 3T s j f c T s ( ) ) F ) F ( z j f c 3T s ( ) ( z ) e ) j f c T s j f c 3T s ( ) 3 ) e ) ) j f c 3T s ) (9) () The combined output signa of the FB AC architecture is obtained by summing the three branche output signas as presented by (): ( z) ( z) ( z) 3( z). () To cance the aiasing and ensure a perfect reconstruction system, the output signa has to be a deayed version of the input signa and the aias terms shoud be canceed []. In the fiter ban architectures, the signa is decimated at the input of the converters and interpoated at their outputs. The main difference between the FB architecture with demoduationbased digita reconstruction and the fiter ban architecture is the presence of demoduation and moduation operations. In fact, the signa at each band-pass branch is frequency shifted through these operations around the corresponding branch s centra frequency. Consequenty, a part of the input signa which is frequency shifted around the branch centra frequency is appied at each branch s bandwidth. There is a need to recuperate these input signas at the recombined fina output. However, the aiasing terms introduced by decimation and corresponding to the input signa terms for different from zero have to be eiminated to ensure perfect reconstruction. This eads to the expression of the output signa as given by () and (3): z M X z W V H z W V F z V ( ) G z W V ( ) ( ) jf s where c T V e with f c () ACTA IMEKO September 5 Voume 4 Number 3 8

6 For, z M X ( ) ( ) z V H z V ( ) z V F z V / G M z X z V ( ) (3) For, z where and are gain and deay, respectivey. This theoretica design of the digita reconstruction stage eads to a compex system of equations and aso to very high fiter orders when impementing it on MATLAB/SIMULINK. Consequenty, it is essentia to modify this mode to permit an optimized digita impementation soution Proposed optimized digita reconstruction stage architecture design The digita reconstruction architecture based on demoduation for the UMTS test case presented in Sub-section 3. has been modified in order to minimize its impementation compexity. The optimized design is detaied in this sub-section. The mode of the FB -based AC with the proposed digita reconstruction architecture is designed using MATLAB/SIMULINK as presented in Figure 7. The mode corresponds to the test case of the FB architecture intended for UMTS signas. The corresponding boc diagram for this mode is presented in Figure 8. For the first branch, ony decimation and fitering operations are needed for the digita reconstruction since it operates at ow-pass frequencies as shown in Figure 5. The decimation operation is aways preceded by a decimation fiter that serves as an anti-aiasing fiter of the resamping operation. To reduce the compexity of such a Figure 8. Boc diagram of FB Ʃ based AC architecture with demoduation based digita reconstruction. decimation fiter with a high decimation factor, the authors opt for two-stage decimation. The first stage ensures decimation by a factor of 8 when the second stage decimates by a factor of. For the second and third parae branches that operate in band-pass frequencies, the digita reconstruction is composed of the operations of demoduation, decimation, fitering and moduation as expained in Figure 5. The compex demoduation as expained before consists in mutipying the moduator output by a discrete exponentia signa at the branch centra frequency as given by (). In the MATLAB/SIMULINK mode, the authors repace the compex demoduation and moduation by in phase (I) and quadrature (Q) paths to ensure better conditions for impementation. The demoduation shoud then be foowed by fitering of the unwanted frequencies which are due to the demoduation operation. This fiter presents high compexity since the unwanted frequencies are at ow vaues and the fiter operates at the oversamping frequency of the moduator. For the second branch, the required finite impuse response (FIR) fiter order after demoduation is equa to 9. To dea with this probem, the authors opt to pace the demoduation operation after the first decimation stage with a factor of 8. This soution To Worspace3 Sigma_deta_output In Out FAToo 8 z FAToo Sigma deta moduator ecimation Fiter ownsampe Unit eay Fiter ownsampe7 Sine Wave at fin Sine Wave at fin Sine Wave3 at fin3 Anaog AAF Fiter butter To Worspace Sigma_deta_output In Out Sigma deta moduator FAToo ecimation Fiter 8 ownsampe -j Constant Sine Wave at fc Product3 Product emoduated_signa_br Q FAToo Fiter Q_ ownsampe Sine Wave at fc Product Fina_Output Sine Wave4 at fin4 Add3 To Worspace Product I FAToo Fiter I_ ownsampe Product4 To Worspace To Worspace Cosine Wave at fc Cosine Wave at fc Sigma_deta_output3 In Out Sigma deta moduator 3 FAToo ecimation Fiter 3 8 ownsampe3 Sine Wave (w_fc3) Product7 Q3 FAToo Fiter Q_3 ownsampe6 Sine Wave at fc3 Product9 Product8 I3 FAToo Fiter I_3 ownsampe8 Product Add Cosine Wave at fc3 Cosine Wave at fc3 Figure 7. Proposed FB based AC architecture mode with demoduation based digita reconstruction. ACTA IMEKO September 5 Voume 4 Number 3 9

7 permits to reduce the operating frequency of the fiter foowing the demoduation. Moreover, it aows combining this fiter with the second stage decimation fiter and the ow-pass fiter that seects the branch bandwidth signas and rejects the quantization noise at the adjacent branches bandwidths. The first decimation stage paced at the moduator output is composed of an operation of decimation by a factor of 8 preceded by a LP FIR decimation fiter. The order of these fiters at the first, second and third branches are chosen to be 9, 39 and 56, respectivey. Then, the order of the LP FIR fiters of branch bandwidth seection are equa to 8. The frequency response of these fiters after moduation of the second and third ones is presented in Figure 9. The fiter responses are overapping. Their intersection is at a eve around 6 db and at the frequency imits between adjacent branches as shown in Figure 9. The sum of the LP fiters of 8 nd order after moduation is computed and its frequency response magnitude is presented in Figure (a). At the higher and ower ends of the bandwidth, the magnitude response presents rippes and attenuations that do not exceed db as shown in Figure (b). Thus, expected performances of the reconstruction system are not affected. Magnitude (db) Normaized Frequency ( rad/sampe) Figure 9. Magnitude of the LP fiters of 8 nd order after moduation. Magnitude (db) Magnitude (db) Normaized Frequency ( rad/sampe) Normaized Frequency:.4487 Magnitude: Fiter of branch bandwidth seection Fiter of branch bandwidth seection Fiter of branch 3 bandwidth seection (a) Normaized Frequency ( rad/sampe) (b) Normaized Frequency: Magnitude: Figure. (a) Magnitude of the sum of LP fiters of 8 nd order after moduation, (b) zoom in [,.6] normaized frequency band to show rippes. After decimation and fitering operations, the I and Q paths are moduated to convert the sub-band signa frequency around its origina frequency which is the branch centra frequency. Finay, the sub-band output signas are recombined to obtain the reconstructed UMTS signa. Simuation resuts are presented in Section SIMULATION RESULTS Simuation resuts are reaized by appying a muti-tone signa composed of four sine-wave signas to the FB mode shown in Figure 7. The first and ast sine-wave frequencies are paced in the bandwidths [, 6 Hz] and [5 Hz, 5 Hz] of the branches and 3, respectivey. The seected vaues are 3 Hz and 9 Hz. The first branch centra frequency f c and the third branch centra frequency f c3 are equa to 3 Hz and Hz, respectivey. The two other sine waves are at frequencies in the nd branch bandwidth. They are situated on both sides of the nd branch centra frequency f c, which is equa to Hz, and their vaues are 7 Hz and 3 Hz. In fact, the authors tested the UMTS FB second branch with a two-tone signa to verify the correct operation of the I/Q demoduation and moduation stages. The sine-wave normaized ampitudes are set at.5 for the first and ast sine waves and at.5 for the sine-waves of the nd branch where the normaized ampitude is the input ampitude out of the power suppy votage []. The zoom in the spectrum over [4.5, 4.5 MHz] of the second branch sigma deta moduator output, Sigma_deta_output, is drawn in Figure. It is shown that the sine-wave signas are at the frequencies 7 Hz and 3 Hz as in the test conditions. To present I/Q demoduated signa of the nd branch as in Figure, the authors need to recombine a compex demoduated signa, emoduated_signa_br, as defined in Figure 7. The samping frequency after the first decimation stage is equa to 9 MHz and the spectrum covers the band [4.5 MHz, 4.5 MHz]. The obtained sine-wave signas have frequencies Hz and 4 Hz which are the frequencies of the needed demoduated sine-wave signas. However, the sine-wave signas at the frequencies 8 Hz and 4 Hz are unwanted signas that are fitered thans to the fiters FiterI_ and FiterQ_ foowing the demoduation stage. After the second decimation stage, the recombined fina output signa spectrum in the band [.5 MHz,.5 MHz] is presented in Figure. It shows that the moduated signas Power (dbm) Frequency (MHz) Figure. emoduated signa spectrum of the nd branch. Sigma deta moduator output emoduated signa ACTA IMEKO September 5 Voume 4 Number 3

8 Power (dbm) Frequency (MHz) Figure. Recombined output signa spectrum. have frequencies equa to ±3 Hz, ±7 Hz, ±3 Hz and ±9 Hz which corresponds to the chosen vaues of the test conditions of the simuation resuts. Moreover, the signato-noise ratio (SNR) computed using MATLAB/SIMULINK is equa to 75.6 db which satisfies the required UMTS dynamic range which is equa to 73.8 db. Performance parameters as SNR and effective resoution Res AC are computed for different combination of input frequencies of the four sine-wave signas. Computation resuts are summarized in Tabe 3. Besides, the designed FB mode is impemented in VHL using the System Generator (SysGen) too from Xiinx Inc. in a co-simuation environment with MATLAB. The impementation is reaized on a Virtex-6 FPGA target from Xiinx Inc. Test conditions for input signas are the same as for the MATLAB/SIMULINK simuation. The output signa spectrum is presented in Figure 3. The computed SNR for this spectrum is equa to 74.8 db which satisfies the UMTS required dynamic range. 5. CONCLUSIONS In this paper, the authors proposed a mixed baseband architecture based on a FB based AC in a Tabe 3. Performance parameters of fina output signa. Input signas frequencies (Hz) SNR (db) Res AC (bits) 3, 7, 3 and , 8, 4 and , 9, 4 and ,, 4 and Power (dbm) Frequency (MHz) Figure 3. Frequency spectrum of the recombined output signa using SysGen impementation. mutistandard receiver. The mixed baseband stage architecture is presented and the singe non-programmabe AAF is designed using Butterworth approximation. The theoretica anaysis and design of the digita reconstruction stage for the FB -based AC architecture dedicated to mutistandard radio receivers are proposed. The designed digita reconstruction stage is based on demoduation that brings the moduators outputs to baseband before proceeding to the decimation and LP fitering operations. The parae signas are then moduated and combined to form a fina output signa. However, the theoretica anaysis of the digita reconstruction stage does not converge to a soution of fiter coefficients. Besides, the first proposed design eads to very high fiter orders when impemented in MATLAB/SIMULINK. Consequenty, it is essentia to modify this mode to permit an optimized digita impementation soution. Finay, the whoe FB -based AC architecture mode with the optimized digita reconstruction stage is impemented and tested for the UMTS test case in MATLAB/SIMULINK. Moreover, hardware impementation and test resuts in the SysGen environment are presented for quantized coefficient vaues. A obtained resuts satisfy at east the required UMTS dynamic range which is equa to 73.8 db. REFERENCES [] J. Mitoa, Software radios: survey, critica evauation and future directions, IEEE Aero. and Eect. Syst. Mag., vo.8, no.4, pp.5-36, Apr [] J. M. e a Rosa, An empirica and statistica comparison of state-of-the-art sigma-deta-moduators, IEEE Int. Symp. on Circ. And Syst., ISBN , pp. 85-8, May 3. [3] I. Gaton, H.T. Jensen, eta-sigma moduator based A/ conversion without oversamping, IEEE Trans. Circuits and Syst.-II: Anaog and digita Sig. Proc., vo.4, no., pp , ec [4] A. Eshraghi, T. Fiez, A time-intereaved parae Ʃ A/ converter, IEEE Trans. Circuits and Syst.-II: Anaog and digita Sig. Proc., vo.5, no. 3, pp.8-9, Mar. 3. [5] A. Beydoun, P. Benabes, Bandpass/wideband AC architecture using parae deta sigma moduators, Proceedings of the 4th European Signa Processing Conf., Sept. 6. [6] P. Benabes, A. Beydoun, M. Javidan, Frequency-banddecomposition converters using continuous-time Sigma eta A/ moduators, IEEE North-East Worshop on Circuits and Syst. and TAISA Conf., pp. 4, Jun. 9. [7] P. Benabes, Extended frequency-band-decomposition sigmadeta A/ converter, Anaog Integr. Circ. Process., Springer Science+Business Media, LLC 9. [8] A. Eshraghi, T. Fiez, A comparative anaysis of parae deta sigma AC architectures, IEEE Trans. Circuits and Syst. I: Reguar Papers, vo. 5, no. 3, pp , Mar. 4. [9] A. Bad et a., A Genera Formuation of Anaog-to-igita Converters Using Parae Sigma-eta Moduators and moduation sequences, IEEE Asia Pacific Conf. Circuits and Syst. APCCAS, pp , ec. 6. [] R. Lahoui, M. Ben-Romdhane, C. Rebai,. aet, Towards fexibe parae sigma deta moduator for software defined radio receiver, IEEE Int. Instrum. and Meas. Technoogy Conf., May 4. [] R. Lahoui et a., igita reconstruction stage of the FB ΣΔbased AC architecture for mutistandard receiver, th IMEKO TC4 Internationa Worshop on AC Modeing and Testing Research on Eectric and Eectronic Measurement for the Economic Upturn, Benevento, Itay, Sept. 4. ACTA IMEKO September 5 Voume 4 Number 3

9 [] P. P. Vaidyanathan, Mutirate Systems and Fiter Bans, Eagewood Ciffs, NJ: Prentice-Ha, 993. [3] GSM. Radio Transmission and Reception GSM 5.5. ETSI, 996. [4] UMTS. UE. Radio Transmission and Reception (F), 3GPP TS 5., Version 5.. Reease 5.ETSI. [5] IEEE 8.a Part : Wireess LAN Medium Access Contro (MAC), and Physica Layer Specifications, Amendment High Speed Physica Layer in the 5 GHz Band. IEEE, 999. [6] M. Ben-Romdhane, C. Rebai, A. Ghaze, P. esgreys, P. Loumeau, Nonuniformy Controed Anaog-to-digita Converter for SR Mutistandard Radio Receiver, IEEE Trans. Circuits and Syst. II: Brief Papers, vo. 58, no., pp , ec.. ACTA IMEKO September 5 Voume 4 Number 3