RAIL TO RAIL OUTPUT 1W AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW. Standby. Bypass VIN- Standby. Bypass V IN- STANDBY BYPASS V IN+

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1 RAIL TO RAIL OUTPUT W AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW OPERATING FROM V CC =.V to 5.5V W RAI L TO RAIL OUTPUT Vcc=5V, THD=%, f=khz, with 8Ω Load ULTRA LOW CONSUMPTION IN STANDBY MODE (na) 75dB 7Hz from 5 to.v POP & CLICK REDUCTION CIRCUITRY ULTRA LOW DISTORTION (.%) UNITY GAIN STABLE AVAILABLE IN SO8, MiniSO8 & DFN8 PIN CONNECTIONS (Top View) Standby Bypass V IN+ TS489ID, TS489IDT - SO VOUT GND VCC VOUT TS489IST - MiniSO8 DESCRIPTION The TS489 (MiniSO8 & SO8) is an Audio Power Amplifier capable of delivering W of continuous RMS. ouput power into 8Ω 5V. This Audio Amplifier is exhibiting.% distortion level (THD) from a 5V supply for a Pout = 5mW RMS. An external standby mode control reduces the supply current to less than na. An internal thermal shutdown protection is also provided. The TS489 have been designed for high quality audio applications such as mobile phones and to minimize the number of external components. The unity-gain stable amplifier can be configured by external gain setting resistors. Standby Bypass V IN+ Vin- VIN- STANDBY BYPASS V IN+ V IN VOUT GND VCC VOUT TS489IQT - DFN V OUT GND Vcc V OUT APPLICATIONS Mobile Phones (Cellular / Cordless) Laptop / Notebook Computers PDAs Portable Audio Devices ORDER CODE Part Number TS489 Temperature Range -4, +85 C Package S D Q MiniSO & DFN only available in Tape & Reel: with T suffix. SO is available in Tube (D) and of Tape & Reel (DT) June 3 Marking 489I Audio Input Vcc Cin Rstb TYPICAL APPLICATION SCHEMATIC Rin Cb 4 3 VIN- Vin+ Bypass Cfeed Rfeed - + Standby Bias 6 Vcc GND 7 Vcc - Av=- + Vout 5 Vout TS489 8 Cs RL 8 Ohms /3

2 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V CC Supply voltage ) 6 V V i Input Voltage ) G ND to V CC V T oper Operating Free Air Temperature Range -4 to + 85 C T stg Storage Temperature -65 to +5 C T j Maximum Junction Temperature 5 C R thja Thermal Resistance Junction to Ambient 3) SO8 MiniSO8 DFN8 Pd Power Dissipation 4) See Power Derating Curves Fig. 4 W ESD Human Body Model kv ESD Machine Model V Latch-up Immunity Class A Lead Temperature (soldering, sec) 6 C. All voltages values are measured with respect to the ground pin.. The magnitude of input signal must never exceed V CC +.3V / G ND -.3V 3. Device is protected in case of over temperature by a thermal shutdown 5 C. 4. Exceeding the power derating curves during a long period may involve abnormal working of the device. OPERATING CONDITIONS Symbol Parameter Value Unit V CC Supply Voltage. to 5.5 V V ICM Common Mode Input Voltage Range G ND + V to V CC V C/W V STB Standby Voltage Input : Device ON Device OFF.5 V STB V CC G ND V STB.5 V R L Load Resistor 4-3 Ω R thja Thermal Resistance Junction to Ambient ) SO8 MiniSO8 DFN8 ). This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves Fig. 4). When mounted on a 4 layers PCB C/W /3

3 ELECTRICAL CHARACTERISTICS V CC = +5V, GND = V, T amb = 5 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit I CC Supply Current No input signal, no load 6 8 ma I STANDBY Standby Current ) No input signal, Vstdby = G ND, RL = 8Ω na Voo Po THD + N PSRR Φ M GM GBP Output Offset Voltage No input signal, RL = 8Ω Output Power THD = % Max, f = khz, RL = 8Ω Total Harmonic Distortion + Noise Po = 5mW rms,, Hz < f <, RL = 8Ω Power Supply Rejection Ratio ) f = 7Hz, RL = 8Ω, RFeed = KΩ, Vripple = mv rms Phase Margin at Unity Gain R L = 8Ω, C L = 5pF Gain Margin R L = 8Ω, C L = 5pF Gain Bandwidth Product R L = 8Ω 5 mv W.5 % 77 db 7 Degrees db MHz. Standby mode is actived when Vstdby is tied to GND. Dynamic measurements - *log(rms(vout)/rms(vripple)). Vripple is the surimposed sinus signal to f = 7Hz V CC = +3.3V, GND = V, T amb = 5 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit I CC Supply Current No input signal, no load ma I STANDBY Standby Current ) No input signal, Vstdby = G ND, RL = 8Ω na Voo Po THD + N PSRR Φ M GM GBP Output Offset Voltage No input signal, RL = 8Ω Output Power THD = % Max, f = khz, RL = 8Ω Total Harmonic Distortion + Noise Po = 5mW rms,, Hz < f <, RL = 8Ω Power Supply Rejection Ratio ) f = 7Hz, RL = 8Ω, RFeed = KΩ, Vripple = mv rms Phase Margin at Unity Gain R L = 8Ω, C L = 5pF Gain Margin R L = 8Ω, C L = 5pF Gain Bandwidth Product R L = 8Ω 5 mv 45 mw.5 % 77 db 7 Degrees db MHz. Standby mode is actived when Vstdby is tied to GND. Dynamic measurements - *log(rms(vout)/rms(vripple)). Vripple is the surimposed sinus signal to f = 7Hz 3/3

4 V CC =.6V, GND = V, T amb = 5 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit I CC Supply Current No input signal, no load 5 8 ma I STANDBY Standby Current ) No input signal, Vstdby = G ND, RL = 8Ω na Voo Po THD + N PSRR Φ M GM GBP Output Offset Voltage No input signal, RL = 8Ω Output Power THD = % Max, f = khz, RL = 8Ω Total Harmonic Distortion + Noise Po = mw rms,, Hz < f <, RL = 8Ω Power Supply Rejection Ratio ) f = 7Hz, RL = 8Ω, RFeed = KΩ, Vripple = mv rms Phase Margin at Unity Gain R L = 8Ω, C L = 5pF Gain Margin R L = 8Ω, C L = 5pF Gain Bandwidth Product R L = 8Ω 5 mv 6 mw.5 % 77 db 7 Degrees db MHz. Standby mode is actived when Vstdby is tied to GND. Dynamic measurements - *log(rms(vout)/rms(vripple)). Vripple is the surimposed sinus signal to f = 7Hz V CC =.V, GND = V, T amb = 5 C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit I CC Supply Current No input signal, no load 5 8 ma I STANDBY Standby Current ) No input signal, Vstdby = G ND, RL = 8Ω na Voo Po THD + N PSRR Φ M GM GBP Output Offset Voltage No input signal, RL = 8Ω Output Power THD = % Max, f = khz, RL = 8Ω Total Harmonic Distortion + Noise Po = mw rms,, Hz < f <, RL = 8Ω Power Supply Rejection Ratio ) f = 7Hz, RL = 8Ω, RFeed = KΩ, Vripple = mv rms Phase Margin at Unity Gain R L = 8Ω, C L = 5pF Gain Margin R L = 8Ω, C L = 5pF Gain Bandwidth Product R L = 8Ω 5 mv 8 mw.5 % 77 db 7 Degrees db MHz. Standby mode is actived when Vstdby is tied to GND. Dynamic measurements - *log(rms(vout)/rms(vripple)). Vripple is the surimposed sinus signal to f = 7Hz 4/3

5 Components Rin Cin Rfeed Cs Cb Cfeed Rstb Gv Functional Description Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = / ( x Pi x Rin x Cin)) Input coupling capacitor which blocks the DC voltage at the amplifier input terminal Feed back resistor which sets the closed loop gain in conjunction with Rin Supply Bypass capacitor which provides power supply filtering Bypass pin capacitor which provides half supply filtering Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency / ( x Pi x Rfeed x Cfeed)) Pull-down resistor which fixes the right supply level on the standby pin Closed loop gain in BTL configuration = x (Rfeed / Rin) REMARKS. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = µf.. External resistors are not needed for having better stability when Vcc down to 3V. The quiescent current still remains the same.. The standby response time is about µs. 5/3

6 Fig. : Open Loop Frequency Response Fig. : Open Loop Frequency Response Gain (db) Phase Gain Vcc = 5V RL = 8Ω -4.3 Frequency (khz) Phase (Deg) Gain (db) Phase Gain Vcc = 5V ZL = 8Ω + 56pF -4.3 Frequency (khz) Phase (Deg) Fig. 3 : Open Loop Frequency Response Fig. 4 : Open Loop Frequency Response Gain (db) Phase Gain Vcc = 3.3V RL = 8Ω -4.3 Frequency (khz) Phase (Deg) Gain (db) Phase Gain Vcc = 3.3V ZL = 8Ω + 56pF -4.3 Frequency (khz) Phase (Deg) Fig. 5 : Open Loop Frequency Response Fig. 6 : Open Loop Frequency Response Gain (db) Phase Gain Vcc =.6V RL = 8Ω -4.3 Frequency (khz) Phase (Deg) Gain (db) Phase Gain Vcc =.6V ZL = 8Ω + 56pF -4.3 Frequency (khz) Phase (Deg) 6/3

7 Fig. 7 : Open Loop Frequency Response Fig. 8 : Open Loop Frequency Response Gain (db) Phase Gain Vcc =.V RL = 8Ω -4.3 Frequency (khz) Phase (Deg) Gain (db) Phase Gain Vcc =.V RL = 8Ω, + 56pF -4.3 Frequency (khz) Phase (Deg) Fig. 9 : Open Loop Frequency Response Fig. : Open Loop Frequency Response Phase - 8 Phase - Gain (db) Gain Vcc = 5V CL = 56pF -4.3 Frequency (khz) Phase (Deg) Gain (db) Gain Vcc = 3.3V CL = 56pF -4.3 Frequency (khz) Phase (Deg) Fig. : Open Loop Frequency Response Fig. : Open Loop Frequency Response Phase - 8 Phase - Gain (db) 6 4 Gain Phase (Deg) Gain (db) 6 4 Gain Phase (Deg) Vcc =.6V - CL = 56pF -4.3 Frequency (khz) Vcc =.V CL = 56pF -4.3 Frequency (khz) /3

8 Fig. 3 : Power Supply Rejection Ratio (PSRR) vs Power supply Fig. 4 : Power Supply Rejection Ratio (PSRR) vs Feedback Capacitor -3 - PSRR (db) Vripple = mvrms Rfeed = kω Input = floating RL = 8Ω Vcc = 5V to.v Cb = µf &.µf PSRR (db) Vcc = 5 to.v Cb = µf &.µf Rfeed = kω Vripple = mvrms Input = floating RL = 8Ω Cfeed= Cfeed=5pF Cfeed=33pF Cfeed=68pF -8 Fig. 5 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor Fig. 6 : Power Supply Rejection Ratio (PSRR) vs Input Capacitor PSRR (db) Cb=µF Vcc = 5 to.v Rfeed = k Cb=µF Rin = k, Cin = µf Rg = Ω, RL = 8Ω Cb=47µF PSRR (db) Cin=µF Cin=33nF Cin=nF Vcc = 5 to.v Rfeed = k, Rin = k Cb = µf Rg = Ω, RL = 8Ω -6-7 Cb=µF -8-5 Cin=nF Cin=nF -6 Fig. 7 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor Fig. 8 : THD + N = % vs Supply Voltage vs RL PSRR (db) Vcc = 5 to.v Cb = µf &.µf Vripple = mvrms Input = floating RL = 8Ω Rfeed=kΩ Rfeed=47kΩ Rfeed=kΩ Rfeed=kΩ -8 Output % THD + N (W) & Cb = µf F = khz BW < 5kHz 6Ω. 3Ω Vcc (V) 4Ω 6Ω 8Ω 8/3

9 Fig. 9 : THD + N = % vs Supply Voltage vs RL Fig. : Power Dissipation vs Pout Output % THD + N (W) & Cb = µf F = khz BW < 5kHz 4Ω Vcc (V) 6Ω 8Ω 6Ω 3Ω Power Dissipation (W) Vcc=5V F=kHz THD+N<% RL=6Ω RL=4Ω RL=8Ω Fig. : Power Dissipation vs Pout Fig. : Power Dissipation vs Pout Power Dissipation (W) Vcc=3.3V F=kHz THD+N<% RL=8Ω RL=4Ω RL=6Ω Power Dissipation (W) Vcc=.6V F=kHz THD+N<% RL=6Ω RL=8Ω RL=4Ω Fig. 3 : Power Dissipation vs Pout Fig. 4 : Power Derating Curves Power Dissipation (W) Vcc=.6V F=kHz THD+N<% RL=6Ω RL=8Ω RL=4Ω Power Dissipation (W) MiniSO8 SO8 QFN Ambiant Temperature ( C) 9/3

10 Fig. 5 : THD + N vs Output Power Fig. 6 : THD + N vs Output Power Rl = 4Ω Vcc = 5V Cb = Cin = µf BW < 5kHz RL = 4Ω, Vcc = 5V Gv = Cb = Cin = µf BW < 5kHz, Hz Hz, khz. E-3.. khz. E-3.. Fig. 7 : THD + N vs Output Power Fig. 8 : THD + N vs Output Power RL = 4Ω, Vcc = 3.3V Cb = Cin = µf BW < 5kHz RL = 4Ω, Vcc = 3.3V Gv = Cb = Cin = µf BW < 5kHz Hz, khz. E-3... Hz khz E-3.. Fig. 9 : THD + N vs Output Power Fig. 3 : THD + N vs Output Power RL = 4Ω, Vcc =.6V Cb = Cin = µf BW < 5kHz RL = 4Ω, Vcc =.6V Gv = Cb = Cin = µf BW < 5kHz Hz, khz. E-3.. Hz. khz E-3.. /3

11 Fig. 3 : THD + N vs Output Power Fig. 3 : THD + N vs Output Power RL = 4Ω, Vcc =.V Cb = Cin = µf BW < 5kHz RL = 4Ω, Vcc =.V Gv = Cb = Cin = µf BW < 5kHz Hz, khz. E-3.. Hz. khz E-3.. Fig. 33 : THD + N vs Output Power Fig. 34 : THD + N vs Output Power RL = 8Ω Vcc = 5V Cb = Cin = µf BW < 5kHz Hz, khz RL = 8Ω Vcc = 5V Gv = Cb = Cin = µf BW < 5kHz Hz. E-3... khz E-3.. Fig. 35 : THD + N vs Output Power Fig. 36 : THD + N vs Output Power RL = 8Ω, Vcc = 3.3V Cb = Cin = µf BW < 5kHz RL = 8Ω, Vcc = 3.3V Gv = Cb = Cin = µf BW < 5kHz Hz Hz, khz.. khz E-3.. E-3.. /3

12 Fig. 37 : THD + N vs Output Power Fig. 38 : THD + N vs Output Power RL = 8Ω, Vcc =.6V Cb = Cin = µf BW < 5kHz Hz, khz RL = 8Ω, Vcc =.6V Gv = Cb = Cin = µf BW < 5kHz Hz.. khz E-3.. E-3.. Fig. 39 : THD + N vs Output Power Fig. 4 : THD + N vs Output Power RL = 8Ω, Vcc =.V Cb = Cin = µf BW < 5kHz khz Hz RL = 8Ω, Vcc =.V Gv = Cb = Cin = µf BW < 5kHz Hz.. khz E-3.. E-3.. Fig. 4 : THD + N vs Output Power Fig. 4 : THD + N vs Output Power RL = 8Ω Vcc = 5V Cb =.µf, Cin = µf BW < 5kHz khz Hz RL = 8Ω, Vcc = 5V, Gv = Cb =.µf, Cin = µf BW < 5kHz, Hz khz.. E-3.. E-3.. /3

13 Fig. 43 : THD + N vs Output Power Fig. 44 : THD + N vs Output Power RL = 8Ω, Vcc = 3.3V Cb =.µf, Cin = µf BW < 5kHz Hz RL = 8Ω, Vcc = 3.3V, Gv = Cb =.µf, Cin = µf BW < 5kHz, Hz khz khz.. E-3.. E-3.. Fig. 45 : THD + N vs Output Power Fig. 46 : THD + N vs Output Power RL = 8Ω, Vcc =.6V Cb =.µf, Cin = µf BW < 5kHz Hz RL = 8Ω, Vcc =.6V, Gv = Cb =.µf, Cin = µf BW < 5kHz, Hz khz khz.. E-3.. E-3.. Fig. 47 : THD + N vs Output Power Fig. 48 : THD + N vs Output Power RL = 8Ω, Vcc =.V Cb = Cin = µf BW < 5kHz Hz RL = 8Ω, Vcc =.V, Gv = Cb =.µf, Cin = µf BW < 5kHz, Hz. khz. khz E-3.. E-3.. 3/3

14 Fig. 49 : THD + N vs Output Power Fig. 5 : THD + N vs Output Power. RL = 6Ω, Vcc = 5V Cb = Cin = µf BW < 5kHz. RL = 6Ω, Vcc = 5V Gv = Cb = Cin = µf BW < 5kHz Hz, khz. E-3.. khz Hz. E-3.. Fig. 5 : THD + N vs Output Power Fig. 5 : THD + N vs Output Power. RL = 6Ω, Vcc = 3.3V Cb = Cin = µf BW < 5kHz. RL = 6Ω Vcc = 3.3V Gv = Cb = Cin = µf BW < 5kHz Hz, khz. E-3.. khz Hz. E-3.. Fig. 53 : THD + N vs Output Power Fig. 54 : THD + N vs Output Power. RL = 6Ω Vcc =.6V Cb = Cin = µf BW < 5kHz. RL = 6Ω Vcc =.6V Gv = Cb = Cin = µf BW < 5kHz Hz Hz, khz. E-3.. khz. E-3.. 4/3

15 Fig. 55 : THD + N vs Output Power Fig. 56 : THD + N vs Output Power. RL = 6Ω Vcc =.V Cb = Cin = µf BW < 5kHz Hz. RL = 6Ω Vcc =.V Gv =, Cb = Cin = µf BW < 5kHz, khz. E-3.. Hz khz. E-3.. Fig. 57 : THD + N vs Frequency Fig. 58 : THD + N vs Frequency RL = 4Ω, Vcc = 5V Cb = µf BW < 5kHz Pout = 6mW Pout =.W.. RL = 4Ω, Vcc = 5V Gv = Cb = µf BW < 5kHz Pout =.W Pout = 6mW. Fig. 59 : THD + N vs Frequency Fig. 6 : THD + N vs Frequency RL = 4Ω, Vcc = 3.3V Cb = µf BW < 5kHz Pout = 54mW RL = 4Ω, Vcc = 3.3V Gv = Cb = µf BW < 5kHz Pout = 54mW Pout = 7mW. Pout = 7mW. 5/3

16 Fig. 6 : THD + N vs Frequency Fig. 6 : THD + N vs Frequency RL = 4Ω, Vcc =.6V Cb = µf BW < 5kHz Pout = 4mW Pout = 4 & mw RL = 4Ω, Vcc =.6V Gv = Cb = µf BW < 5kHz Pout = mw.. Fig. 63 : THD + N vs Frequency Fig. 64 : THD + N vs Frequency RL = 4Ω, Vcc =.V Cb = µf BW < 5kHz Pout = 75mW RL = 4Ω, Vcc =.V Gv = Cb = µf BW < 5kHz Pout = 88mW Pout = 75mW Pout = 88mW.. Fig. 65 : THD + N vs Frequency Fig. 66 : THD + N vs Frequency Cb =.µf Cb = µf RL = 8Ω Vcc = 5V Pout = 9mW BW < 5kHz Cb =.µf Cb = µf RL = 8Ω Vcc = 5V Pout = 45mW BW < 5kHz.. 6/3

17 Fig. 67 : THD + N vs Frequency Fig. 68 : THD + N vs Frequency Cb =.µf RL = 8Ω, Vcc = 5V Gv = Pout = 9mW BW < 5kHz Cb =.µf RL = 8Ω, Vcc = 5V Gv = Pout = 45mW BW < 5kHz Cb = µf Cb = µf.. Fig. 69 : THD + N vs Frequency Fig. 7 : THD + N vs Frequency Cb =.µf Cb = µf RL = 8Ω, Vcc = 3.3V Pout = 4mW BW < 5kHz Cb =.µf Cb = µf RL = 8Ω, Vcc = 3.3V Pout = mw BW < 5kHz.. Fig. 7 : THD + N vs Frequency Fig. 7 : THD + N vs Frequency Cb = µf Cb =.µf RL = 8Ω, Vcc = 3.3V Gv = Pout = 4mW BW < 5kHz Cb =.µf RL = 8Ω, Vcc = 3.3V Gv = Pout = mw BW < 5kHz Cb = µf.. 7/3

18 Fig. 73 : THD + N vs Frequency Fig. 74 : THD + N vs Frequency Cb =.µf Cb = µf RL = 8Ω, Vcc =.6V Pout = mw BW < 5kHz Cb =.µf RL = 8Ω, Vcc =.6V Pout = mw BW < 5kHz Cb = µf.. Fig. 75 : THD + N vs Frequency Fig. 76 : THD + N vs Frequency Cb =.µf RL = 8Ω, Vcc =.6V Gv = Pout = mw BW < 5kHz Cb = µf Cb =.µf RL = 8Ω, Vcc =.6V Gv = Pout = mw BW < 5kHz Cb = µf.. Fig. 77 : THD + N vs Frequency Fig. 78 : THD + N vs Frequency Cb =.µf Cb = µf RL = 8Ω, Vcc =.V Pout = 5mW BW < 5kHz Cb =.µf RL = 8Ω, Vcc =.V Pout = 75mW BW < 5kHz Cb = µf.. 8/3

19 Fig. 79 : THD + N vs Frequency Fig. 8 : THD + N vs Frequency Cb =.µf RL = 8Ω, Vcc =.V Gv = Pout = 5mW BW < 5kHz Cb =.µf Cb = µf RL = 8Ω, Vcc =.V Gv = Pout = 7mW BW < 5kHz Cb = µf.. Fig. 8 : THD + N vs Frequency Fig. 8 : THD + N vs Frequency RL = 6Ω, Vcc = 5V, Cb = µf BW < 5kHz RL = 6Ω, Vcc = 5V Gv =, Cb = µf BW < 5kHz Pout = 6mW. Pout = 3mW. Pout = 3mW Pout = 6mW.. Fig. 83 : THD + N vs Frequency Fig. 84 : THD + N vs Frequency. Pout = 7mW RL = 6Ω, Vcc = 3.3V, Cb = µf BW < 5kHz. RL = 6Ω, Vcc = 3.3V Gv = Cb = µf BW < 5kHz Pout = 7mW Pout = 35mW. Pout = 35mW 9/3

20 Fig. 85 : THD + N vs Frequency Fig. 86 : THD + N vs Frequency RL = 6Ω, Vcc =.6V Gv =, Cb = µf BW < 5kHz Pout = 6mW RL = 6Ω, Vcc =.6V, Cb = µf BW < 5kHz.. Pout = 8mW Pout = 8mW Pout = 6mW.. Fig. 87 : THD + N vs Frequency Fig. 88 : THD + N vs Frequency RL = 6Ω, Vcc =.V, Cb = µf BW < 5kHz RL = 6Ω, Vcc =.V Gv =, Cb = µf BW < 5kHz. Pout = 5 & mw. Pout = 5mW. Pout = mw. Fig. 89 : Signal to Noise Ratio vs Power Supply with Unweighted Filter (Hz to ) Fig. 9 :Signal to Noise Ratio Vs Power Supply with Unweighted Filter (Hz to ) 9 SNR (db) RL=6Ω RL=8Ω RL=4Ω SNR (db) 8 7 RL=6Ω RL=4Ω RL=8Ω 6 5. Cb = Cin = µf THD+N <.4% Vcc (V) 6 5. Gv = Cb = Cin = µf THD+N <.4% Vcc (V) /3

21 Fig. 9 : Signal to Noise Ratio vs Power Supply with Weighted Filter type A Fig. 9 : Signal to Noise Ratio vs Power Supply with Weighted Filter Type A SNR (db) 9 8 RL=6Ω RL=8Ω RL=4Ω SNR (db) 9 8 RL=6Ω RL=4Ω RL=8Ω 7 6. Cb = Cin = µf THD+N <.4% Vcc (V) 7 6. Gv = Cb = Cin = µf THD+N <.4% Vcc (V) Fig. 93 : Frequency Response Gain vs Cin, & Cfeed Fig. 94 : Current Consumption vs Power Supply Voltage (no load) Vstandby = Vcc Cfeed = 33pF 5 Gain (db) -5 - Cfeed = 68pF Cin = 47nF Cfeed =.nf Icc (ma) Cin = nf - Cin = 8nF Rin = Rfeed = kω Vcc (V) Fig. 95 : Current Consumption vs Standby Vcc = 5V Fig. 96 : Current Consumption vs Standby Vcc = 3.3V Icc (ma) 4 3 Icc (ma) 3 Vcc = 5V Vstandby (V) Vcc = 3.3V Vstandby (V) /3

22 Fig. 97 : Current Consumption vs Standby Vcc =.6V Fig. 98 : Current Consumption vs Standby Vcc =.V Icc (ma) 4 3 Icc (ma) 3 Vcc =.6V Vstandby (V) Vcc =.V Vstandby (V) Fig. 99 : Clipping Voltage vs Power Supply Voltage and Load Resistor Fig. :Clipping Voltage vs Power Supply Voltage and Load Resistor Vout & Vout Clipping Voltage High side (V) RL = 8Ω RL = 4Ω RL = 6Ω Power supply Voltage (V) Vout & Vout Clipping Voltage Low side (V) RL = 8Ω RL = 4Ω RL = 6Ω Power supply Voltage (V) Fig. : Vout+Vout Unweighted Noise Floor Fig. : Vout+Vout A-weighted Noise Floor Output Noise Voltage ( V) Vcc =.V to 5V, Tamb = 5 C Cb = Cin = F Input Grounded BW = Hz to (Unweighted) Standby mode Av = Av = Output Noise Voltage ( V) Vcc =.V to 5V, Tamb = 5 C Cb = Cin = F Input Grounded BW = Hz to (A-Weighted) Standby mode Av = Av = /3

23 APPLICATION INFORMATION Fig. 3 : Demoboard Schematic C R C Vcc S Vcc R S Vcc GND C6 + µ C7 n Neg. input P Pos input P R7.5k Vcc R3 C3 S8 Standby R4 C4 S5 Positive Input mode C5 R5 4 3 R6 Vin- Vin+ - + Bypass Standby Bias 6 Vcc - Av=- + Vout Vout 5 8 C9 + 47µ C + 47µ S6 OUT S3 GND S4 GND S7 D R8 PW ON k + C + C u C8 GND 7 TS489 Fig. 4 : SO8 & MiniSO8 Demoboard Components Side 3/3

24 Fig. 5 : SO8 & MiniSO8 Demoboard Top Solder Layer The output power is : ( Vout Pout = R RMS) L (W) For the same power supply voltage, the output power in BTL configuration is four times higher than the output power in single ended configuration. Gain In Typical Application Schematic (cf. page ) In flat region (no effect of Cin), the output voltage of the first stage is : Vout Rfeed = Vin (V) Rin For the second stage : Vout = -Vout (V) Fig. 6 : SO8 & MiniSO8 Demoboard Bottom Solder Layer The differential output voltage is Rfeed Vout Vout = Vin (V) Rin The differential gain named gain (Gv) for more convenient usage is : Vout Vout Gv = = Vin Rfeed Rin Remark : Vout is in phase with Vin and Vout is 8 phased with Vin. It means that the positive terminal of the loudspeaker should be connected to Vout and the negative to Vout. Low and high frequency response BTL Configuration Principle The TS489 is a monolithic power amplifier with a BTL output type. BTL (Bridge Tied Load) means that each end of the load are connected to two single ended output amplifiers. Thus, we have : Single ended output = Vout = Vout (V) Single ended output = Vout = -Vout (V) And Vout - Vout = Vout (V) In low frequency region, the effect of Cin starts. Cin with Rin forms a high pass filter with a -3dB cut off frequency. F CL = πrincin (Hz) In high frequency region, you can limit the bandwidth by adding a capacitor (Cfeed) in parallel on Rfeed. Its form a low pass filter with a -3dB cut off frequency. F CH = (Hz) π Rfeed Cfeed 4/3

25 Power dissipation and efficiency Hypothesis : Voltage and current in the load are sinusoidal (Vout and Iout) Supply voltage is a pure DC source (Vcc) Regarding the load we have : and and V Then, the average current delivered by the supply voltage is The power delivered by the supply voltage is Psupply = Vcc Icc AVG (W) Then, the power dissipated by the amplifier is Pdiss = Psupply - Pout (W) Pdiss = and the maximum value is obtained when Pdiss = P and its value is OUT P I Icc = V OUT = OUT = π AVG Vcc R PEAK V R sinωt (V) OUT L PEAK V R L V = πr L OUT P PEAK L OUT (A) Vcc Pdiss max = π R L (W) (A) P OUT (W) (W) The maximum theoretical value is reached when Vpeak = Vcc, so π 4 = 78.5% Decoupling of the circuit Two capacitors are needed to bypass properly the TS489. A power supply bypass capacitor Cs and a bias voltage bypass capacitor Cb. Cs has especially an influence on the THD+N in high frequency (above 7kHz) and indirectly on the power supply disturbances. With µf, you can expect similar THD+N performances like shown in the datasheet. If Cs is lower than µf, in high frequency increase THD+N and disturbances on the power supply rail are less filtered. To the contrary, if Cs is higher than µf, those disturbances on the power supply rail are more filtered. Cb has an influence on THD+N in lower frequency, but its function is critical on the final result of PSRR with input grounded in lower frequency. If Cb is lower than µf, THD+N increase in lower frequency (see THD+N vs frequency curves) and the PSRR worsens up If Cb is higher than µf, the benefit on THD+N in lower frequency is small but the benefit on PSRR is substantial (see PSRR vs. Cb curves). Note that Cin has a non-negligible effect on PSRR in lower frequency. Lower is its value, higher is the PSRR (see fig. 3). Pop and Click performance In order to have the best performances with the pop and click circuitry, the formula below must be follow : τin τ b Remark : This maximum value is only depending on power supply voltage and load values. The efficiency is the ratio between the output power and the power supply POUT πv η = = Psupply 4Vcc PEAK With and τ = ( Rin + Rfeed) Cin (s) in τb = 5kΩ Cb (s) 5/3

26 Power amplifier design examples Given : Load impedance : 8Ω Output % THD+N :.5W Input impedance : kω min. Input voltage peak to peak : Vpp Bandwidth frequency : Hz to (, -3dB) THD+N in Hz to Ambient temperature max = 5 C SO8 package First of all, we must calculate the minimum power supply voltage to obtain.5w into 8Ω. See curves in fig. 5, we can read 3.5V. Thus, the power supply voltage value min. will be 3.5V. Following the maximum power dissipation equation : Vcc Pdissmax = π R (W) with 3.5V we have Pdissmax=.3W. Refer to power derating curves (fig. 4), with.3w the maximum ambient temperature will be C. This last value could be higher if you follow the example layout shows on the demoboard (better dissipation). The gain of the amplifier in flat region will be : G V = V = We have Rin > kω. Let's take Rin = kω, then Rfeed = 8.5kΩ. We could use for Rfeed = 3kΩ in normalized value and the gain will be Gv = 6. In lower frequency we want Hz (-3dB cut off frequency). Then So, we could use for Cin a µf capacitor value that gives 6Hz. In Higher frequency we want (-3dB cut off frequency). The Gain Bandwidth Product of the TS489 is MHz typical and doesn't change when the amplifier delivers power into the load. L R P OUTPP L OUT V = INPP VINPP C = π Rin F IN = CL 795nF 5.65 The first amplifier has a gain of and the theoretical value of the -3dB cut of higher frequency is MHz/3 = 66kHz. We can keep this value or limiting the bandwidth by adding a capacitor Cfeed, in parallel on Rfeed. Then So, we could use for Cfeed a pf capacitor value that gives 4kHz. Now, we can choose the value of Cb with the constraint THD+N in Hz to Pout=.45W. If you refer to the closest THD+N vs frequency measurement : fig. 7 (Vcc=3.3V, Gv=), with Cb = µf, the THD+N vs frequency is always below.4%. As the behaviour is the same with Vcc = 5V (fig. 67), Vcc =.6V (fig. 67). As the gain for these measurements is higher (worst case), we can consider with Cb = µf, Vcc = 3.5V and Gv = 6, that the THD+N in Hz to range with Pout =.45W will be lower than.4%. In the following tables, you could find three another examples with values required for the demoboard. Remark : components with (*) marking are optional. Application n : Hz to bandwidth and 6dB gain BTL power amplifier. Components : Designator R k /.5W R4 k /.5W R6 Short Cicuit Part Type R7* (Vcc-Vf_led)/If_led R8 k /.5W C5 C Rfeed = Rin 47nF C6 µf 3 FEED = = π RFEED FCH 65pF 6/3

27 C7 C9 C Application n : Hz to bandwidth and db gain BTL power amplifier. Components : nf C µf S, S, S6, S7 S8 P Short Circuit Short Circuit mm insulated Plug.6mm pitch 3 pts connector.54mm pitch PCB Phono Jack D* Led 3mm U Designator TS489ID or TS489IS Part Type R k /.5W R4 k /.5W R6 Short Cicuit R7* (Vcc-Vf_led)/If_led R8 k /.5W C5 47nF C6 µf C7 C9 C nf C µf S, S, S6, S7 S8 P Short Circuit Short Circuit mm insulated Plug.6mm pitch 3 pts connector.54mm pitch PCB Phono Jack D* Led 3mm U Designator Part Type TS489ID or TS489IS Application n 3 : 5Hz to khz bandwidth and db gain BTL power amplifier. Components : Designator R 33k /.5W R Application n 4 : Differential inputs BTL power amplifier. In this configuration, we need to place these components : R, R4, R5, R6, R7, C4, C5, C. We have also : R4 = R5, R = R6, C4 = C5. The gain of the amplifier is: Short Circuit R4 k /.5W R6 Short Cicuit Part Type R7* (Vcc-Vf_led)/If_led R8 k /.5W C C5 47pF 5nF C6 µf C7 C9 C nf C µf S, S, S6, S7 S8 P Short Circuit Short Circuit mm insulated Plug.6mm pitch 3 pts connector.54mm pitch PCB Phono Jack D* Led 3mm U TS489ID or TS489IS GVDIFF = R R4 For Vcc=5V, a Hz to bandwidth and db gain BTL power amplifier you could follow the bill of material below. 7/3

28 Components : Designator Part Type R k /.5W R4 k /.5W R5 k /.5W R6 k /.5W R7* (Vcc-Vf_led)/If_led R8 k /.5W C4 C5 47nF 47nF C6 µf C7 C9 C nf Short Circuit Short Circuit C µf D* Led 3mm S, S, S6, S7 S8 mm insulated Plug.6mm pitch 3 pts connector.54mm pitch P, P PCB Phono Jack U TS489ID or TS489IS 8/3

29 Note on how to use the PSRR curves (page 8) We have finished a design and we have chosen for the components : How do we measure the PSRR? Fig. 8 : PSRR measurement schematic Rin=Rfeed=kΩ Cin=nF Cb=µF Now, on fig. 6, we can see the PSRR (input grounded) vs frequency curves. At 7Hz, we have a PSRR value of -36dB. In reality we want a value about -7dB. So, we need a gain of 34dB! Now, on fig. 5 we can see the effect of Cb on the PSRR (input grounded) vs. frequency. With Cb=µF, we can reach the -7dB value. Vripple Vcc Cin Rin Rg Ohms Cb 4 3 Vin+ + Bypass Standby Bias 6 GND Vcc 7 - Av=- + Vout 5 Vout 8 TS489 Rfeed Vin- - Vs- RL Vs+ The process to obtain the final curve (Cb=µF, Cin=nF, Rin=Rfeed=kΩ) is a simple transfer point by point on each frequency of the curve on fig. 6 to the curve on fig. 5. The measurement result is shown on the next figure. Fig. 7 : PSRR changes with Cb PSRR (db) Cin=nF Cb=µF Cin=nF Cb=µF Vcc = 5 &.V Rfeed = k, Rin = k Rg = Ω, RL = 8Ω Principle of operation We fixed the DC voltage supply (Vcc) We fixed the AC sinusoidal ripple voltage (Vripple) No bypass capacitor Cs is used The PSRR value for each frequency is : Rms(Vripple) PSRR(dB) = Log Rms(Vs Vs + ) Remark : The measure of the Rms voltage is not a Rms selective measure but a full range ( Hz to 5 khz) Rms measure. It means that we measure the effective Rms signal + the noise. -7 Note on PSRR measurement What is the PSRR? The PSRR is the Power Supply Rejection Ratio. It's a kind of SVR in a determined frequency range. The PSRR of a device, is the ratio between a power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. 9/3

30 PACKAGE MECHANICAL DATA SO-8 MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A A A B C D E e.7.5 H h L k 8 (max.) ddd..4 63/C 3/3

31 PACKAGE MECHANICAL DATA 3/3

32 PACKAGE MECHANICAL DATA Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 3 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom 3/3