LDRxxyy VERY LOW DROP DUAL VOLTAGE REGULATOR

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Christiana Paul
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1 VERY LOW DROP DUAL VOLTAGE REGULATOR OUTPUT CURRENT 1 UP TO 500mA OUTPUT CURRENT 2 UP TO 1.0A LOW DROPOUT VOLTAGE 1 I O =500mA) LOW DROPOUT VOLTAGE 2 I O =1A) VERY LOW SUPPLY CURRENT (TYP.50µA IN OFF MODE, 1.6mA MAX IN ON MODE) LOGIC-CONTROLLED ELECTRONIC SHUTDOWN OUTPUT VOLTAGE AVAILABILITY FOR EACH REGULATOR: 1.8V, 2.5V, 3.3V INTERNAL CURRENT AND THERMAL LIMIT STABLE WITH LOW VALUE (MIN 4.7µF) AND LOW E.S.R. OUTPUT CAPACITORS SUPPLY VOLTAGE REJECTION: 70dB (TYP.) TEMPERATURE RANGE (-40 C TO 125 C) DESCRIPTION The LDRxxyy is a Very Low Drop Dual Voltage Regulator available in PPAK for the version without inhibit and in SPAK-7L for the version with the shutdown feature. The very low drop-voltage SPAK-7L PPAK (0.5V) and the very low supply current make it particularly suitable for low noise and low power applications such as PDA, MICRODRIVE and other data storage applications while the used high voltage technology makes this device suitable for consumer applications such as MONITORS AND SET-TOP-BOX. For each V O a Shutdown Logic Control function is available (TTL compatible) to decrease the total power consumption. Figure 1: Block Diagram VI1 POWER 1 VO1 INH1 START UP 1 BAND GAP 1 DRIVER ERROR AMPLIFIER 1 THERMAL 1 THERMAL 2 INH2 START UP 2 BAND GAP ERROR AMPLIFIER 2 DRIVER 2 VI2 POWER 2 VO2 August 2004 Rev. 2 1/13

2 Table 1: Absolute Maximum Ratings Symbol Parameter Value Unit V I1 & V I2 DC Input Voltage -0.3 to 15 V INH Shutdown Voltage -0.3 to 15 V I O Output Current Internally Limited P TOT Power Dissipation Internally Limited T STG Storage Temperature Range -50 to +150 C T A Operating Ambient Temperature Range -40 to +125 C Absolute Maximum Rating are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 2: Thermal Data Symbol Parameter PPAK SPAK-7L Unit R THJ-C Junction to case thermal resistance 8 2 C/W Figure 2: Connection Diagram (top view) PPAK SPAK-7L Table 3: Pin Description Symbol Pin N for PPAK Table 4: Order Codes Pin N for SPAK-7L Name and Function GND 3 4 Ground pin V I1 2 2 Input 1 Supply Pin. Bypass with a 2.2µF capacitor to GND V I2 1 1 Input 2 Supply Pin. Bypass with a 2.2µF capacitor to GND V INH1 3 Enable 1 Pin. Internally connected to V I1 in the PPAK version V INH2 5 Enable 2 Pin. Internally connected to V I2 in the PPAK version V O1 4 6 Output 1 Pin. Bypass with a 4.7µF capacitor to GND Port V O2 5 7 Output 2 Pin. Bypass with a 4.7µF capacitor to GND Port N.C. Not Internally Connected 2/13 PART NUMBERS V O1 V O2 TYPE SPAK-7L PPAK 1.8 V 2.5 V LDR1825 LDR1825K7-R LDR1825PT-R 1.8 V 3.3 V LDR1833 LDR1833K7-R LDR1833PT-R 2.5 V 1.8 V LDR2518 LDR2518K7-R LDR2518PT-R 2.5 V 3.3 V LDR2533 LDR2533K7-R LDR2533PT-R 3.3 V 1.8 V LDR3318 LDR3318K7-R LDR3318PT-R 3.3 V 2.5 V LDR3325 LDR3325K7-R LDR3325PT-R

3 Table 5: Electrical Characteristics (V I1 = V O1 +2V, V I2 = V O2 +2V, V INH1 = V INH2 = 2.5V, C I1,2 = 2.2µF, C O1,2 = 4.7µF, I O1 = I O2 = 10mA, T A = -40 C to 125 C, unless otherwise specified. Typical values are referred at T A = 25 C) Symbol Parameter Test Conditions Min. Typ. Max. Unit V O1 Output Voltage 1-5 V NOM1 +5 %V V O2 Output Voltage 2-5 V NOM2 +5 %V V DROP1 Dropout Voltage 1 (1) I O1 = 500mA V V DROP2 Dropout Voltage 2 (1) I O2 = 1A V V O1 Line Regulation 1 V I1 = V O1 +2V to V O1 +7V, I O = 250mA mv V O2 Line Regulation 2 V I2 = V O2 +2V to V O2 +7V, I O = 500mA mv V O1 Load Regulation 1 V I1 = V O1 +2V, I O1 = 10 to 500mA 10 mv V O2 Load Regulation 2 V I2 = V O2 +2V, I O2 = 10mA to 1A 60 mv I STOT Total Supply Current I O1 = I O2 = NO LOAD 2 ma I S 1 Channel Supply Current NO LOAD 1 ma I QMAX Quiescent Current I O1 = 500mA, I O2 = 1A 30 ma I SC1 Short Circuit Current 1 T A = ma I SC2 Short Circuit Current 2 T A = A V INH-H Enable Voltage HIGH 2.4 V V INH-L Enable Voltage LOW 0.8 V I INH Enable Pin Current V INH = 5V 6 µa SVR Supply Voltage Rejection (2) V I1,2 = V O1,2 +3V ±1V, I O1,2 = 10 ma, f = 120Hz 70 db e N RMS Output Noise (2) Bandwidth of 10Hz to 100KHz %V O (1): This test is not performed for V O <2.5V. (2): Guaranteed by design, but not tested in production. Figure 3: Typical Application Circuit 3/13

4 TYPICAL CHARACTERISTICS (unless otherwise specified T j = 25 C) Figure 4: Dropout Voltage (V O1 ) vs Temperature Figure 7: Output Voltage (V O2 ) vs Temperature Figure 5: Dropout Voltage (V O2 ) vs Temperature Figure 8: Line Regulation (V O1 ) vs Temperature Figure 6: Output Voltage (V O1 ) vs Temperature Figure 9: Load Regulation (V O1 ) vs Temperature 4/13

5 Figure 10: Line Regulation (V O2 ) vs Temperature Figure 13: Short Circuit Current (V O2 ) vs Drop Voltage Figure 11: Load Regulation (V O2 ) vs Temperature Figure 14: Inhibit Voltage vs Temperature Figure 12: Short Circuit Current (V O1 ) vs Drop Voltage Figure 15: One Channel Inhibit Current vs Temperature 5/13

6 Figure 16: Supply Voltage Rejection vs (V O1 ) Temperature Figure 19: Supply Voltage Rejection (V O2 ) vs Frequency Figure 17: Supply Voltage Rejection vs (V O2 ) Temperature Figure 20: Maximum Total Quiescent Current vs Temperature Figure 18: Supply Voltage Rejection (V O1 ) vs Frequency Figure 21: Total Supply Current vs Temperature 6/13

7 Figure 22: Quiescent Current (V O1 ) vs Output Current Figure 25: Load Transient C I1,2 =1µF, C O1,2 =2.2µF, V INH1,2 =2.5V, V I1 =4.5V, V I2 =5.3V, I O1 =5mA to 0.5A, I O2 =5mA to 1A, t RISE =t FALL =4.2µs Figure 23: Quiescent Current (V O2 ) vs Output Current Figure 26: Line Transient V O1,2 C I1,2 =0, C O1,2 =2.2µF, V I1 =4.4 to 10.4V, V I2 =5.3 to 11.3V, I O1 =0.25A, I O2 =0.5A, t RISE =t FALL =4.4µs Figure 24: Thermal Protection vs V O1 Figure 27: Start up Transient V O1 V I1 =1.1 to 8.5V, V I2 =1.2 to 9.8V, I O1 =0.25A, I O2 =0.5A, t RISE =5µs 7/13

8 PPAK MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A A A B B C C D D E E e G G H L L L L E 8/13

9 SPAK-7L MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A A C C D D F G G H H H L L L M N V PO13F2/A 9/13

10 Tape & Reel SPAK-xL MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A C D N T Ao Bo Ko Po P /13

11 Tape & Reel DPAK-PPAK MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A C D N T Ao Bo Ko Po P /13

12 Table 6: Revision History Date Revision Description of Changes 03-Aug Typing correction on tables 1, 3, 5 and figures 3, 6, 10, 11, 14, 17, 22, /13

13 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 13/13

LD3985 SERIES ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REGULATORS LOW ESR CAPACITORS COMPATIBLE

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