Table 1. Order Codes Vref

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1 FEATURES TECHNOLOGY BI20II WIDE SUPPLY VOLTAGE RANGE (3. 2V) OUTPUT POWER: = %, R L = 8Ω, V CC = 7.V 44W Music = %, R L = 8Ω, V CC = 8.V SINGLE SUPPLY MINIMUM EXTERNAL COMPONENTS: NO SVR CAPACITOR NO BOOTSTRAP NO BOUCHEROT CELLS INTERNALLY FIXED GAIN STANDBY & MUTE FUNCTIONS SHORT CIRCUIT PROTECTION THERMAL OVERLOAD PROTECTION 33W DUAL BRIDGE AMPLIFIER Figure. Package Table. Order Codes Part Number TDA7266P PowerSSO24 (Slug Down) PRODUCT PREVIEW Package PowerSSO24 (Slug Down) 2 DESCRIPTION The TDA7266P is a dual bridge amplifier specially designed for LCD TV/Monitor, PC Motherboard, TV and Portable Audio applications. Figure 2. Test and Application Diagram V CC V C3 0.22µF OUT C 470µF C2 0nF C7 0nF STBY R3 K SGND 4 C4 µf C 0.22µF IN2 MUTE R4 K Vref OUT OUT2 C6 µf PWGND 24 9 OUT2 D03AU3A July 2004 REV. 2 /2 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.

2 Table 2. Absolute Maximum Ratings Symbol Parameter Value Unit V s Supply Voltage 20 V I O Output Peak Current (internally limited). A T op Operating Temperature 0 to 70 C T stg, T j Storage and Junction Temperature 40 to 0 C Figure 3. Pin Connection (Top view) PW GND 24 PW GND OUT 20 OUT2 OUT2 OUT 6 9 V S 7 8 V S IN 8 7 IN2 9 6 MUTE STBY 4 SGND 2 3 D03AU32 Table 3. Themal Data Symbol Parameters Value Unit R th jcase Thermal Resistance Junction to Case Typ.. C/W 2/2

3 Table 4. Electrical Characteristcs (Refer to test circuit; V CC = 7.V, R L = 8Ω, f = KHz, T amb = 2 C unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit V CC Supply Range 3. 2 V I q Total Quiescent Current 40 ma V OS Output Offset Voltage 20 mv P O Output Power THD % 3 W P O Output Music Power (*) 4 W THD Total Harmonic Distortion P O = W % P O = 0.W to 2W f = 0Hz to KHz % SVR Supply Voltage Rejection f = 0Hz, VR =0.V 40 6 db CT Crosstalk db A MUTE Mute Attenuation db T w Thermal Threshold 0 C G V Closed Loop Voltage Gain db G V Voltage Gain Matching 0. db R i Input Resistance 2 30 KΩ VT MUTE Mute Threshold for V CC > 6.4V; Vo = 30dB V for V CC < 6.4V; Vo = 30dB V CC /2 V CC /2 0.7 V CC /2 0. V VT STBY Stby Threshold V I STBY Stby Current V6 = GND 0 µa e N Total Output Voltage A Curve 0 µv (*) Measured on demoboard of figure 8 with gaussian noise signal which simulates Music/Speech programmes. 3/2

4 3 APPLICATIVE SUGGESTIONS 3. STANDBY AND MUTE FUNCTIONS 3.. (A) Microprocessor Application In order to avoid annoying "PopNoise" during TurnOn/Off transients, it is necessary to guarantee the right Stby and mute signals sequence.it is quite simple to obtain this function using a microprocessor (Fig. 4 and ). At first Stby signal (from µp) goes high and the voltage across the Stby terminal (Pin ) starts to increase exponentially. The external RC network is intended to turnon slowly the biasing circuits of the amplifier, this to avoid "POP" and "CLICK" on the outputs. When this voltage reaches the Stby threshold level, the amplifier is switchedon and the external capacitors in series to the input terminals (C, C3) start to charge. It's necessary to mantain the mute signal low until the capacitors are fully charged, this to avoid that the device goes in play mode causing a loud "Pop Noise" on the speakers. A delay of 0200ms between Stby and mute signals is suitable for a proper operation. Figure 4. Microprocessor Application VCC IN C 0.22µF C 470µF OUT C6 0nF STBY R K C2 µf µp SGND 4 IN2 C3 0.22µF Vref OUT OUT2 MUTE R2 K C4 µf 9 OUT2 PWGND 24 D03AU33 4/2

5 Figure. Microprocessor Driving Signals V S (V) 7. V IN (mv) V STBY pin V MUTE pin I q (ma) V OUT (V) OFF STBY MUTE PLAY MUTE STBY OFF D03AU3A 3..2 B) Low Cost Application In low cost applications where the µp is not present, the suggested circuit is shown in fig.6. The Stby and mute terminals are tied together and they are connected to the supply line via an external voltage divider. The device is switchedon/off from the supply line and the external capacitor C4 is intended to delay the Stby and mute threshold exceeding, avoiding "Popping" problems. So to avoid any popping or clicking sond, it is important to clock: a Correct Sequence: At turnon, the Standby must be removed at first, then the Mute must be released after a delay of about 0200ms. On the contrary at turnoff the Mute must be activated as first and then the Standby. With the values suggested in the Application circuit the right operation is guaranteed. b Correct Threshold Voltages: In order to avoid that due to the spread in the internal thresholds (see the above limits) a wrong external voltage causes uncertain commutations for the two functions we suggest to use the following values: Mute for Vcc>6.4V : VT = 2.3V Mute for Vcc<6.4V : VT = Vcc/2 Standby : VT = 0.8V /2

6 Figure 6. Standalone lowcost Application V CC R 24K IN C3 0.22µF STBY C 470µF OUT C2 0nF C7 0nF R2 47K C4 µf SGND 4 IN2 C 0.22µF 7 Vref 6 20 OUT OUT2 MUTE 9 OUT2 PWGND 24 D03AU34A Figure 7. Application Circuit V CC V JP R R2 IN C3 0.22µF SGND OUT C 470µF C2 0nF C7 0nF STBY R3 K IN2 C4 µf C 0.22µF Vref OUT OUT2 MUTE R4 K C6 µf PWGND 24 9 OUT2 D03AU 6/2

7 Figure 8. PCB Component Layout Figure 9. PCB Copper Top (Top view) Figure. PCB Copper Bottom (Top view) 7/2

4 PCB LAYOUT AND EXTERNAL COMPONENTS Regarding the PCB layout care must be taken for three main subjects: ) Signal and Power Gnd separation 2) Dissipating Copper Area 3) Filter Capacitors positioning

8 4 PCB LAYOUT AND EXTERNAL COMPONENTS Regarding the PCB layout care must be taken for three main subjects: ) Signal and Power Gnd separation 2) Dissipating Copper Area 3) Filter Capacitors positioning ) Signal and Power Gnd separation: To the Signal GND must be referred the Audio Input Signals, the Mute and Standby Voltages and the device PIN.4. This Gnd path must be as clean as possible in order to improve the device THDNoise and to avoid spurious oscillations across the speakers. The Power GND is directly connected to the Output power Stage transistors (Emitters) and is crossed by large amount of current, this path is also used in this device to dissipate the heating generated (no needs of external heatsinker). Referring to the typical application circuit, the separation between the two GND paths must be obtained connecting them separately (star routing) to the bulk Electrolithic capacitor C (470µF). Regarding the Power Gnd dimensioning we have to consider the Dissipated Power the Thermal Protection Threshold and the Package thermal Characteristics. 2) Dissipating Copper Area: Dissipated Power: The max dissipated power happens for a THD near % and is given by the formula: P dmax( W) 2 V CC = π 2Rl I q V CC 2 This gives for: Vcc = 7.V, Rl = 8Ω,Iq = 40mA a dissipated power of Pd = 3W. 2 Thermal Protection: The thermal protection threshold is placed at a junction temperature of 0 C. Package Thermal Characteristics: The thermal resistance Junction to Ambient obtainable with a GND copper Area of 3x3 cm and with 6 via holes (see picture) is about 2 C/W. This means that with the above mentioned max dissipated Power (Pd=3W) we can expect a 7 C, this gives a safety margin before the thermal protection intervention in the consumer environments where a 0 C ambient is specified as maximum Figure. 3)Filter Capacitors Positioning: The two Ceramic capacitors C2/C7 (0nF) must be placed as close as possible respectively to the two Vcc pins ( 7 8) in order to avoid the possibiltiy of oscillations arising on the output Audio signals. 8/2

9 TYPICAL CHARACTERISTICS (Referred to application circuit of figure 8 unless otherwise specified) Figure 2. Distortion vs Frequency THD(%) Vcc = 7.V Rl = 8 ohm Figure. Gain vs Frequency Level(dBr) Vcc = 7.V Rl = 8 ohm Pout = W 0. Pout = 0mW Pout = 2W k k 20k frequency (Hz) Figure 3. Distortion vs Output Power % Vs= 7.V Rl= 8 Ohm F= KHz 0.0 0m 200m 300m 400m00m 700m 2 3 W k k 0k frequency (Hz) Figure 6. Mute Attenuation vs Vpin. Attenuation (db) Vpin.(V) Figure 4. Distortion vs Output Power % Vs= 8.V 2 Rl= 8 Ohm F= KHz m 200m 300m 400m 600m 800m W Figure 7. StandBy attenuation vs Vpin Attenuation (db) Vpin. (V) 9/2

10 Figure 8. PowerSSO24 Mechanical Data & Package Dimensions DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A A a b c D () E () e e G G H h L N (max) X Y () D and E do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.mm (0.006 ) (2) No intrusion allowed inwards the leads. (3) Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side OUTLINE AND MECHANICAL DATA PowerSSO A /2

11 Table. Revision History Date Revision Description of Changes May 2004 First Issue July Electrical Characteristics: Deleted TYP. Value VCC /2

12 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners 2004 STMicroelectronics All rights reserved STMicroelectronics GROUP OF COMPANIES Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States 2/2

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) TDA7297D 10W+10W DUAL BRIDGE AMPLIFIER 1 FEATURES 2 DESCRIPTION

Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) TDA7297D 10W+10W DUAL BRIDGE AMPLIFIER 1 FEATURES 2 DESCRIPTION 0W0W DUAL BRIDGE AMPLIFIER FEATURES TECHNOLOGY BI0II WIDE SUPPLY VOLTAGE RANGE (6. 8V) OUTPUT POWER 00W @ THD = 0%, R L = 8Ω, V CC = 3V MINIMUM EXTERNAL COMPONENTS NO SVR CAPACITOR NO BOOTSTRAP NO BOUCHEROT