Silicon Detector Readout

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1 IPM-HEPHY Detector School Silicon Detector Readout 14 June 2012 Markus Friedl (HEPHY)

2 Contents Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 2

3 Example: CMS Experiment at CERN Tracker (Silicon Strip & Pixel Detectors) 3

4 CMS Tracker Silicon Strip Sensor Front-End Electronics 4

5 Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 5

6 Various CMS Tracker Modules Electronics Sensors 6

(2004) Typically 300µm thick, strip pitch 50.

7 Silicon Strip Detectors Wire bond CMS Test Sensor with various geometries (1998) Belle Sensor with 45 strips (2004) Typically 300µm thick, strip pitch µm Reverse bias voltage for full depletion V Connection by wire bonds 7

8 Silicon Pixel Detectors CMS Pixel Readout Scheme CMS Pixel Sensor ATLAS Pixel Sensor Pixels can be square (CMS) or oblong (ATLAS) Structure size similar to strip detectors, but N 2 channels Connection by bump bonds 8

9 Principle of Operation charged particle track Front-end amplifier + E p -implant n-type bulk n + -implant p-n junction is operated at reverse bias to drain free carriers Traversing charged particle creates electron-hole pairs Carriers drift towards electrodes in the electric field Moving carriers induce current in the circuit current source 9

10 Equivalent Circuit of the Detector I C det Current source with capacitor in parallel Applies to many types of detectors, not only silicon Example: wire chamber Coaxial capacitor configuration Moving charges induce current Example: photomultiplier tube Small plates Charge (current) is amplified in each stage 10

11 Comparison: Voltage vs. Current Source Property Voltage Source Current Source IDEAL Voltage constant + anything Current anything V constant Idle (no power) Open (I=0) Shorted (V=0) I Property Voltage Source Current Source REAL (Linear) equivalent circuit + V R V Resistor causes Internal voltage drop Internal current drop I R I Conversion Norton-Thevenin equivalent: R V = R I ; V = I R V/I Examples Battery Wall plug (AC) Detector NIM module outputs 11

12 Moving Charges 12

13 Ramo s Theorem (1939) Moving charges between inside electric field (e.g. parallel plates) induces current in electrodes i = E q v Current is proportional to electric field E, (moving) charge q and velocity v of the charge It doesn t matter if the charges eventually reach the electrodes or not, only motion counts Fully valid for parallel plate capacitor configuration (large area diode) A bit more complicated for strip detectors more later 13

14 A Bit of Theory + Space charge density is given by doping Electric field is calculated by Poisson s equation Potential is found by integration of field 0 ρ en E E max n + n-type bulk p + D x x Shown here: full depletion = space charge just extends over full detector ϕ -V depl x x 14

15 Bias Voltage and Depletion In reality, the electric field is imposed by applied bias voltage What happens if V bias < V depl? Electric field does not cover full bulk Only part of detector contributes to charge collection lower efficiency Do not operate a detector like that What happens if V bias > V depl? Linear offset is added to electric field Field tends to become more flat Faster charge collection (Ramo) Limited by breakdown voltage E E x x 15

16 Induced Currents (1) i [na] Detector Currents -- E lectrons and Holes Contributions D=300µm, r=4kωcm, V=79/158V V=V depl i [na] V=2 V depl isum time [ns] ie ih time [ns] 16

17 Induced Currents (2) Typical silicon detector (D=300µm) Very low (<1µA), very short (~20ns) Different contributions from moving charges Electrons have higher mobility, thus faster Holes with lower mobility are slower Exponential curves with (theoretically) infinite tail at V= V depl Almost triangular shapes at V= 2 V depl due to flatter field 17

18 Induced Currents (3) Both electrons and holes contribute to overall current, but cannot be distinguished in reality Integral over time (area under curve) is the collected charge If all charges reach electrodes, this is identical to the number of created pairs i dt 3.6 fc e for a 300µm thick detector For comparison: ~10 10 e every 20ns in a 25W bulb (230VAC) In a simple parallel plate geometry, contributions of electrons and holes are equal However, it s not that simple in a strip detector 18

19 Induced Current Measurement Quite difficult due to noise constraints Detector Currents -- E lectrons and Holes Contributions D=300µm, r=4kωcm, V=79/158V isum V=V depl Single shot i [na] Averaged time [ns] Every amplifier has a limited bandwidth and thus rise time Nonetheless, exponential decay is clearly visible 19

20 Strip Detector Case Ramo theorem still holds, but with some modifications Why? Charge movement is determined by electric field (which is approximately the same as for the parallel plate case) Induced currents are calculated by (virtual) weighting field Now the moving charges influence a current onto several strips depending on the geometry and distance How to calculate weighting field? Electrode under consideration is held at unity potential, all other electrodes at zero 20

21 Strip Detector Simulation (1) 300 µm thick, 50 µm pitch, n-bulk, p-strips, V bias =1.6 x V depl Drift Potential & Field Linear color scale! 21

22 Strip Detector Simulation (2) 300 µm thick, 50 µm pitch, n-bulk, p-strips, V bias =1.6 x V depl Weighting Potential & Field Nonlinear color scale! 22

23 Strip Detector Simulation (3) 300 µm thick, 50 µm pitch, n-bulk, p-strips, V bias =1.6 x V depl Induced currents sum h + e - Integrated currents: Q e- = 3338 e Q h+ = e Q sum = e Measured charge is dominated by holes: p=50µm p=75µm p=120µm p=500µm 23

24 Strip Detector Case Due to the very nonlinear weighting field, the charges which drift towards the electrode largely dominate the overall induced current Doesn t seem very relevant, but it actually has practical implications Lorentz shift 24

25 Lorentz Shift In a magnetic field, charge movement is deflected due to Lorentz force which depends on the carrier mobility Resulting in an angle (approximately ~12 for e, ~4 for h at 1.8T) and spreading of signals over several strips Particle from IP h + e - B z n-side short strips along r-phi +HV p-side long strips along z -HV 25

26 Lorentz Shift Compensation e - h + n-side short strips along r-phi +HV p-side long strips along z -HV h + e - Particle from IP B z Particle from IP B z B z 26

27 Silicon Detector Summary Various Geometries: (Diode), strips, pixels Detector is a current source capacitance p-n junction operated under reverse bias voltage > V depl Charged particle creates electron-hole pairs Carrier motion in the electric field induces current on electrodes Signal is typically <1µA, ~20ns Both electrons and holes contribute to induced current In a strip detector, current is mostly generated by charges which move towards the electrode Deflection of carriers in a magnetic field (Lorentz shift) 27

28 Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 28

29 Front-End Amplifier Principle I in V out Preamplifier (Integrator) Shaper (Filter) Located close to the sensor First stage: Integrator Detector current charge Second stage: Filter Limit bandwidth to reduce noise 29

30 Shaper Bandwidth Reduction Example: APV25 front-end amplifier (CMS) AVG Noise APV Amplitude [a.u.] Nosie [ADC] Frequency 0 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 Frequency [Hz] Simulation Measurement 30

31 Example: VA2 Chip Input Stage VA2 is a general-purpose front-end amplifier chip with 128 inputs and multiplexed output Slow shaper in the µs range low noise 31

32 Shaper Output Tp~2µs Amplitude VA2 General purpose Tp~50ns Time Amplitude APV25 CMS Particle hit Time T p shaping time (or peaking time) Faster shaping can be a necessity of the experiment to distinguish subsequent events, but also implies larger noise 32

33 Low-Noise Amplifiers Nearly all front-end chips are called low-noise General feature of the integrator+shaper combination Noise is typically given by ENC (equivalent noise charge) referred to the input ENC = a + b C det (a,b...const, C det...detector capacitance) Examples: T p [ns] ENC [e] VA2 (~1993) / pf APV25 (CMS, 1999) / pf How can noise depend on the detector capacitance? 33

34 Simplified Noise Model v s I C det i p Amplifier noise, projected to the input Amplifier noise is projected to voltage noise source and current noise source at input Integrator measures charge (integrated current) Superposition analysis (one by one, other voltage sources are closed, other current sources are open; very simplified): Q n = i p dt + C det V s = a + b C det = ENC 34

Full Chip Example: APV25 (CMS) For each of the 128 channels MUX gain inverter pipeline 128:1 MUX Differential current output amp preamp shaper APSP S/H Shaping time:

35 Full Chip Example: APV25 (CMS) For each of the 128 channels MUX gain inverter pipeline 128:1 MUX Differential current output amp preamp shaper APSP S/H Shaping time: 50ns, sampling: 40MHz Analog pipeline (192 cells) to store data until trigger arrives, optional APSP filter, 128:1 multiplexer, differential output driver 8.1mm mm

36 APV25 in Action Sensor Pitch Adapter APV25 Bond wires Hybrid 36

37 Shaper Output Sampling Usually, shaper output is sampled once at the peak Then those values are multiplexed (1:128) to the output Peak sample Amplitude Particle hit The timing is given by a constant offset from the particle hit (as supplied by an external trigger, e.g. scintillator) What happens if there are several particles with different timing? 37 Time

38 Pile-up Events Strip detector measurement in a high intensity beam Trigger hit ambiguities and non-peak sampling can occur pileups Trigger from this particle Also returns several other samples > 0! 38

39 How to Avoid Such Ambiguities? Better timing information implies more data, more energy and/or a higher noise figure Faster Shaping = narrower output pulses Limited by noise performance On-chip pulse shape processing (APV25) Deconvolution filter which processes samples and essentially narrows down the output to a single bunch crossing Off-chip data processing Using multiple subsequent samples and apply a pulse shape fit 39

40 Hit Time Finding Shaper output curve is well known with two parameters Peak amplitude, peak timing Event-by-event fit of shaping curve determines those two Timing resolution of ~3ns (RMS) measured with APV25 Signal [e] strips= clwidth=4 tmax=89.25 ns amp=34775 e chi2/ndf=5.695e+00 Data above threshold Data below threshold IntCal fit entries [] (cal. fit (spline) - TDC) p side h_tdc_cal_diff_0_1_py Entries Mean RMS Underflow 0 Overflow 0 2 c / ndf / 97 Constant ± 5.3 Mean 1.568e-09 ± 1.900e-02 Sigma 2.16 ± Threshold Time [ns] tpeak_cal-tpeak_tdc [ns] 40

41 Occupancy Reduction Belle SVD2 VA1TA Tp~800ns Belle Belle II: 40 x increase in luminosity Threshold Time over threshold ~ 2000ns (measured) Belle II SVD APV25 Tp~50ns Threshold Gain ~12.5 Belle II SVD with Hit time finding Time over threshold ~ 160ns (measured) Pulse shape processing RMS(tmax)~3ns Sensitive time window ~ 20ns Gain ~8 Total gain ~100 Markus Friedl (HEPHY Vienna): Status of SVD 12 November

42 Front-End Amplifier Summary Integrated circuits with typically 128 channels 2 stages: Preamplifier (integrator: current charge) Shaper (band-pass filter to reduce noise) Noise is referred to input and expressed as charge: ENC = a + b C det (a,b...const, C det...detector capacitance) Shaper bandwidth determined speed and noise Fast large noise; slow low noise Required speed is usually defined by the experiment Slow shaping and pile-up can lead to ambiguities Tricks to circumvent speed limitation, e.g. hit time finding 42

43 Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 43

44 Why? Detector front-end is usually quite crowded Radiation environment does not allow commercial electronics Material budget should be as low as possible Power consumption as well (requires cooling = material) Thus, only inevitable electronics is put at the front-end Everything else is conveniently located in a separate room outside the detector, traditionally called counting house Allows access during machine and detector operation 44

45 Example: CMS Experiment Electronics hall is almost as big as experimental cavern Signal distance up to 100m Huge amount of signal transmission lines Electronics cavern Experimental cavern 45

46 Generic Transmission Chain < 2m up to 100m Front-end Repeater Signal directions Readout (large amount): front-end to back-end, analog or digital Controls (small amount): back-end to front-end, digital (clock, trigger, settings) Usually, the front-end chips cannot drive the full path Repeater (driver/receiver) is needed to amplify signals Back-end 46

47 Excursion: Electrical Signal Transmission V S R S R L Single-ended against GND Huge ground loop GND compensation V S R S R L Single-ended in coaxial cable No ground loop GND compensation (from APV) EL pF 50Ω 50Ω 150pF 30m CAT7 cable 100Ω ADC daughter board (~100MHz bandwidth) (to PC) Differential twisted pair (+shield) Largely immune 47

48 Cable Bandwidth Every cable has a finite bandwidth / damping Nonlinear attenuation with rising frequency Example: CAT7 network cable (shielded twisted pairs) Significant especially for analog signal transmission Normalized loss [db] Theory Measurement 30m CAT7 Transfer Function Frequency [MHz] 48

49 Alternative: Optical Fiber Fibers have extremely high bandwidth and very little loss Also automatically provide electrical isolation between sender and receiver sides However: requires conversion on both ends, which makes an optical link more expensive than a cable Best suitable for long-haul, high-speed digital data transmission such as telecom Nonetheless also often used in HEP experiments Optical transmission usually implies digital signals with NRZ coding (pure AC signal with only very short DC sequences) 49

50 Comparison: Copper vs. Optical Fiber Property Copper Cable Optical Fiber Cable rigid delicate (e.g. radius) Connectors huge variety few standards Size/weight large small Bandwidth limited high Loss high low Driver + receiver cheap expensive Level isolation no yes 50

51 Example: CMS Tracker (1) Optical fiber required because of material budget Detector Module Clock & Trigger Reset Control (I2C) Analog Optohybrid LLD 1 MU-sMU Patch Panel MFS Patch Panel Analog Receiver DAQ Interface Data Processing TTCrx FED Analog Optical Link Parameters 37,000 channels 100m fiber length 1310nm infrared light Step-index single-mode fiber Intensity modulation 40MHz readout speed I2C control interface Experimental Cavern: Radiation Zone Counting Room Exceptional case: analog optical transmission Special requirements for linearity, gain stability and noise 51

52 Example: CMS Tracker (2) Analog Optohybrid MU-sMU Connection MFS Connection Rugged Multi-Ribbon Cable Analog Receiver ASIC Analog Rx Module Laser Transmitter Several components are customized and thus expensive O(10000) are small quantities for industry Estimated cost per link: ~150 (cf. ~15 with cable) 52

Example: Belle II Silicon Vertex Detector Analog APV25 readout is through

OC Finesse Transmitter Board (FTB) Unified optical data link (>20m) COPPER

53 Example: Belle II Silicon Vertex Detector Analog APV25 readout is through copper cable to FADCs Junction box provides LV to front-end APV25 drives 12m cables! 1748 APV25 chips ~2m copper cable Junction box ~10m copper cable FA DC +P R OC Finesse Transmitter Board (FTB) Unified optical data link (>20m) COPPER Front-end hybrids Rad-hard DC/DC converters Analog level translation, data sparsification and hit time reconstruction Unified Belle II DAQ system 53

54 Example: Belle II Silicon Vertex Detector Using same APV25 chip as in CMS, but much shorter distance no optical link required Analog signals are attenuated in long copper cable First attempt was an analog equalizer chip (enhancing higher frequencies) with moderate success Later tried purely digital filter after digitization Perfect regeneration with digital signal processing (FIR filter) at the back-end inside an FPGA Multiplication of 8 consecutive samples with 8 filter coefficients and summing in real-time (40 MHz) 54

filter with 8 coefficients operating continuously at 40MHz

55 Example: Belle II Silicon Vertex Detector Optimized channel Non-optimized channel Raw APV25 output without FIR FIR filter with 8 coefficients operating continuously at 40MHz Removes cable loss and reflections due to imperfect termination! 55

56 Signal Transmission Summary Signals of large number of readout channels to be transmitted to back-end for data processing Options: copper cable or optical fiber Copper is much cheaper, but has frequency-dependent loss Can be compensated e.g. with digital FIR filter at back-end Optical links are more complicated to handle Usually digital with NRZ coding Exception: CMS Tracker uses analog optical links 56

57 Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 57

58 Purpose of the Back-End Perform all the steps which can t be done in the front-end Front-end ADC FPGA DAQ Readout chain: Receiver (electrical or optical), digitization (if analog input), data processing and reduction in FPGA (field programmable gate array), output to DAQ (data acquisition) Receiver for clock, trigger and controls (centrally distributed) 58

59 Example: CMS-Pixel-FED FED means Front End Driver (misleading) Contains all the elements mentioned before Analog optical receivers ADCs FPGAs CLK, Trigger FPGAs FPGA To DAQ 59

60 Boards and Crates Such boards are typically built according to a certain (industrial) standard bus system Standard : VME (Versa Module Eurocard), size 9U Obsolete: CAMAC, Fastbus Modern: µtca All those standards describe Geometry of modules Electrical interface, power supply Bus system for communication with crate controller & PC Organized in crates and racks 60

61 VME (9U) Crates Empty crate as sold by industry Belle I Silicon Vertex Detector (cable input) CMS Pixel-FED (optical input) 61

62 What s an FPGA? FPGA is a huge array of logical gates which can be combined according to the user s need Programming by software using basic gates & library blocks e.g. and, adder, latch,, CPU core Either by schematics or by VHDL programming language 62

O(100MHz) O(1GHz) I/O lines O(1000) 64 Best suitable for At the back-end

63 Comparison: FPGA vs. CPU Property FPGA CPU Parallelism any a few cores Speed (clock) O(100MHz) O(1GHz) I/O lines O(1000) 64 Best suitable for At the back-end Fast, simple, massive parallel processing First low-level data reduction Complex, serial programs High-level data processing (DAQ) 63

64 Example: APV25 Output Data Stream Amplitude [ADC] header Hit data Data frame idle Strip data (pedestals) Time [25ns] 64

65 Strip Data Composition Analog signal output of one event is a multiplexed stream of 128 data values, but not just the actual strip signal ADC i = S i + N i + P i + CMN i strip number ADC i measured amplitude in ADC units S i particle signal N i noise (random fluctuations) P i pedestal (zero value; individual for each strip) CMN common mode noise (common to all strips in one event) Pedestal and noise can be measured and saved for each channel, CMN is removed event-by-event 65

66 How to Process Strip Data? ADC ADC ADC (a) (b) (c) Raw data strip Pedestal subtracted strip After common mode correction strip Data stream with individual pedestals (dots) Dominated by pedestal variation 66 Signal Pedestals subtracted, common mode noise and individual strip noise remains After commom mode correction, average is at zero with random noise excursions for each strip Next: Apply hit threshold

67 Typical Tasks for Silicon Strip Detector Digitization Frame Detection R eordering Pedes tal S ubtraction CMC (2-pass) Hit Finding Time Finding FPGA ADC ADC converts data to digital Find and extract strip data Put the strip data in natural order (needed if entangled, e.g. APV25) Subtract zero value for each strip Remove common-mode noise (appears on all strips in common) Apply hit threshold (zero suppression, sparsification) = keep only hit data Optional post-processing (e.g. APV25) 67

68 FPGA Limits Simple state machine, but no complex programming (instruction list) as with a CPU Typically integer arithmetic Made for fast I/O and throughput; internal memory is limited Ideal for first stage of data processing O(10) times more throughput than a state-of-the-art CPU More complex operations at a later stage with reduced data are performed on CPU farms (DAQ) 68

69 Back-End Signal Processing Summary Performs digitization, data processing (reduction) and output to subsequent DAQ (computer farm) stage Pedestal subtraction, common mode correction, zero suppression Boards following a bus module standard E.g. VME (9U) Organized in crates and racks Typically uses FPGAs (field programmable logic arrays) Ideal for low-level massive parallel processing More powerful than CPUs for such tasks Complex calculations are done in subsequent computer farm 69

70 Silicon Detector Front-End Amplifier Signal Transmission Back-End Signal Processing Summary 70

71 Thank you for your attention! 71

Readout Electronics. P. Fischer, Heidelberg University. Silicon Detectors - Readout Electronics P. Fischer, ziti, Uni Heidelberg, page 1

Readout Electronics. P. Fischer, Heidelberg University. Silicon Detectors - Readout Electronics P. Fischer, ziti, Uni Heidelberg, page 1 Readout Electronics P. Fischer, Heidelberg University Silicon Detectors - Readout Electronics P. Fischer, ziti, Uni Heidelberg, page 1 We will treat the following questions: 1. How is the sensor modeled?