Low Charge Injection, 8-Channel, High Voltage, Enhanced Analog Switch with Bleed Resistors. Level Shifters. Latches D LE CL D LE CL D LE CL D LE CL

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1 Supertex inc. HV2301 Low Charge Injection, 8-Channel, High Voltage, Enhanced Analog Switch with Bleed Resistors Features HVCMOS technology for high performance Integrated bleed resistors on the outputs 8 Channels of high voltage analog switch 3.3 or 5.0V CMOS input logic level 20MHz data shift clock frequency Very low quiescent power dissipation (-10µA) Low parasitic capacitance C to 50MHz analog signal frequency -60dB typical off-isolation at 5MHz CMOS logic circuitry for low power Excellent noise immunity Cascadable serial data register with latches Flexible operating supply voltages Applications Medical ultrasound imaging NT metal flaw detection Piezoelectric transducer drivers Inkjet printer heads Optical MEMS modules General escription The Supertex HV2301 is a low charge injection, 8-channel, high voltage analog switch integrated circuit (IC) with bleed resistors. The device can be used in applications requiring high voltage switching, controlled by low voltage control signals, such as medical ultrasound imaging, piezoelectric transducer driver, and printers. The built-in bleed resistors eliminate voltage built up on capacitive loads such as piezoelectric transducers. The HV2301 is an enhanced version of the HV232. Input data is shifted into an 8-bit shift register that can then be retained in an 8-bit latch. To reduce any possible clock feedthrough noise, the latch enable bar should be left high until all bits are clocked in. ata is clocked in during the rising edge of the clock. Using HVCMOS technology, this device combines high voltage bilateral MOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., / : +40V/-160V, +100V/-100V, and +160V/- 40V. Block iagram Latches Level Shifters Output Switches SW0 K SW1 IN 8-Bit Shift Register SW2 OUT SW6 SW7 R

2 Ordering Information Package Options evice 48-Lead LQFP 7.00x7.00mm body 1.60mm height (max) 0.50mm pitch 28-Lead PLCC.453x.453in body.180in height (max).050in pitch HV2301 HV2301FG-G HV2301PJ-G -G indicates the part is RoHS compliant (Green) Absolute Maximum Ratings Parameter Value Pin Configuration 48 1 V logic supply -0. to +7V - differential supply 220V positive supply -0. to +200V negative supply +0. to -200V Logic input voltage -0. to V +0.3V Analog signal range to 48-Lead LQFP (FG) (top view) Peak analog signal current/channel 3.0A Storage temperature -65 C to 150 C Power dissipation: 48-Lead LQFP 28-Lead PLCC 1.0W 1.2W Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Operating Conditions Sym Parameter Value V Logic power supply voltage 3.0V to 5. Positive high voltage supply 40V to +200V Negative high voltage supply -40V to -160V V IH High level input voltage 0.9V to V V IL Low-level input voltage 0V to 0.1V Analog signal voltage peak-to-peak +10V to -10V T A Operating free air temperature 0 O C to 70 O C Notes: 1. Power up/down sequence is arbtrary except must be powered-up first and powered down last. 2. must be or floating during power up/down transition. 3. Rise and fall times of power supplies V,, and should not be less than 1.0msec. Product Marking Top Marking YYWW HV2301FG LLLLLLLLL Bottom Marking CCCCCCCC AAA Top Marking YYWW AAA HV2301PJ LLLLLLLLLL Bottom Marking CCCCCCCCCCC 28-Lead PLCC (PJ) (top view) YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler I* = Green Packaging *May be part of top marking Package may or may not include the following marks: Si or 48-Lead LQFP (FG) YY = Year Sealed WW = Week Sealed L = Lot Number A = Assembler I C = Country of Origin* = Green Packaging *May be part of top marking Package may or may not include the following marks: Si or 28-Lead PLCC (PJ) 2

3 C Electrical Characteristics (Over operating conditions unless otherwise specified ) Sym Parameter 0 O C +25 O C +70 O C Min Max Min Typ Max Min Max Units Conditions I SIG I SIG = 200mA = +40V = -160V R ONS Small signal switch on-resistance I SIG Ω I SIG = 200mA = +100V = -100V ΔR ONS Small signal switch on-resistance matching I SIG I SIG = 200mA = +160V = -40V % I SIG, = +100V, = - 100V R ONL Large signal switch on-resistance Ω = -10V, I SIG = 1.0A R INT Value of output bleed resistance KΩ Output switch to I RINT = 0.5mA I SOL Switch off leakage per switch μa = -10V, +10V V OS C offset switch on mv C offset switch off mv No load I PPQ Quiescent supply current μa All switches off I NNQ Quiescent supply current μa All switches off I PPQ Quiescent supply current μa All switches on, I SW I NNQ Quiescent supply current μa All switches on, I SW I SW Switch output peak current A duty cycly < 0.1% f SW Output switching frequency khz uty cycle = I PP I NN Average supply current Average supply curent ma ma = +40V = -160V = +100V = -100V = +160V = -40V = +40V = -160V = +100V = -100V = +160V = -40V All output switches are turning on and off at 50kHz with no load All output switches are turning on and off at 50kHz with no load I Average V supply current ma f K = 5.0MHz, V I Q Quiescent V supply current μa All logic inputs are static I SOR ata out source current ma = V -0.7V I SINK ata out sink current ma = 0.7V C IN Logic input capacitance pf --- 3

4 AC Electrical Characteristics (Over recommended operating conditions: V, t R = t F 5ns, duty cycle, C LOA = 20pF unless otherwise specified) Sym Parameter 0 O C +25 O C +70 O C Min Max Min Typ Max Min Max Units t S Set up time before rises ns --- Conditions t W t O Time width of Clock delay time to data out V = 3.0V ns V V = 3.0V ns V t W Time width of ns --- t SU Set up time data to clock V = 3.0V ns V t H Hold time data from clock ns V = 3.0 or 5.0V f K Clock frequency V = 3.0V MHz V t R, t F Clock rise and fall times ns --- t ON Turn on time μs = -10V, R LOA = 10kΩ t OFF Turn off time μs = -10V, R LOA = 10kΩ = +40V, = -160V dv/dt K O Maximun slew rate Off isolation V/ns = +100V, = -100V = +160V, = -40V f = 5.0MHz, 1kΩ/15pF load db f = 5.0MHz, 50Ω load K CR Switch crosstalk db f = 5.0MHz, 50Ω load I I Output switch isolation diode current ma 300ns pulse width, 2.0% duty cycle C SG(OFF) Off capacitance SW to pf 0V, f = 1.0MHz C SG(ON) On capacitance SW to pf 0V, f = 1.0MHz +V SPK V SPK = +40V, = -160V, R LOA = 50Ω +V SPK V Output voltage spike m = +100V, = -100V, -V R LOA = 50Ω SPK V SPK = +160V, = -40V, -V SPK R LOA = 50Ω = +40V, = -160V, = 0V QC Charge injection pc = +100V, = -100V, = 0V = +160V, = -40V, = 0V 4

5 Truth Table R SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 X X X X X X X X H L Hold Previous State X X X X X X X X X H All Switches Off Notes: 1. The eight switches operate independently. 2. Serial data is clocked in on the L to H transition of the K. 3. The switches go to a state retaining their present condition at the rising edge of. When is low the shift register data flow through the latch. 4. OUT is high when data in the shift register 7 is high. 5. Shift register clocking has no effect on the switch states if is high. 6. The R clear input overrides all other inputs. Typical Waveforms N+1 N N-1 ATA IN t W t S OCK t SU t h t O ATA OUT t OFF t ON VOUT (typ) OFF ON 90% 10% R t W 5

6 Test Circuits - 10V - 10V I SOL R L 10kΩ Open Open Switch OFF Leakage C Offset ON/OFF T ON /T OFF Test Circuit V IN = 10V P V IN = 10 VP R L I I 50Ω NC 50Ω K O = 20Log V IN OFF Isolation Isolation iode Current K CR = 20Log V IN Crosstalk +VSPK 1000pF VSPK R L 50Ω 1kΩ Q = 1000pF x Charge Injection Output Voltage Spike 6

7 Pin Configuration 48-Lead LQFP (FG) Pin # Pin Name Pin # Pin Name 1 SW NC 26 NC 3 SW NC 28 5 SW NC 30 NC 7 NC 31 NC 8 SW3 32 NC 9 NC 33 IN 10 SW3 34 K 11 NC SW2 36 R 13 NC 37 OUT 14 SW2 38 NC 15 NC 39 SW7 16 SW1 40 NC 17 NC 41 SW7 18 SW1 42 NC 19 NC 43 SW6 20 SW0 44 NC 21 NC 45 SW6 22 SW0 46 NC 23 NC 47 SW NC Pin Configuration 28-Lead PLCC (PJ) Pin # Pin Name Pin # Pin Name 1 SW3 15 NC 2 SW3 16 IN 3 SW2 17 K 4 SW SW1 19 R 6 SW1 20 OUT 7 SW0 21 SW7 8 SW0 22 SW7 9 NC 23 SW SW SW SW SW SW4 7

8 48-Lead LQFP Package Outline (FG) 7.00x7.00mm body, 1.60mm height (max), 0.50mm pitch 1 E Note 1 (Index Area 1/4 x E1/4) E b e Top View View B L2 Gauge A A2 Seating L L1 θ Seating A1 Side View View B Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol A A1 A2 b 1 E E1 e L L1 L2 θ imension (mm) MIN 1.40* * 6.80* 8.80* 6.80* O NOM BSC REF BSC 3.5 O MAX * 7.20* 9.20* 7.20* O JEEC Registration MS-026, Variation BBC, Issue, Jan * This dimension is not specified in the JEEC drawing. rawings are not to scale. Supertex oc. #: SP-48LQFPFG Version,

9 28-Lead PLCC Package Outline (PJ).453x.453in. body,.180in. height (max),.050in. pitch.048/.042 x 45 O /.042 x 45 O.150 MAX.075 MAX Note 1 (Index Area) E1 E Note 2.020max (3 Places) Top View Vertical Side View View A A A1 A2 Base.020 MIN b1 e Seating b R Horizontal Side View View A Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary. imension (inches) Symbol A A1 A2 b b1 1 E E1 e R MIN NOM BSC.035 MAX JEEC Registration MS-018, Variation AB, Issue A, June, rawings not to scale. Supertex oc. #: SP-28PLCCPJ, Version B (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http// Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. oc.# SFP - HV2301 A Supertex inc Bordeaux rive, Sunnyvale, CA Tel: