Supertex inc. TN2510. N-Channel Enhancement-Mode Vertical DMOS FET. Features. General Description. Applications. Ordering Information.

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1 TN51 N-Channel Enhancement-Mode Vertical DMOS FET Features Low threshold (.V max.) High input impedance Low input capacitance (15pF max.) Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage Applications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Ordering Information Part Number Package Option Packing TN51N-G TO-3AA (SOT-9) /Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Absolute Maximum Ratings Parameter Value Drain-to-source voltage BS Drain-to-gate voltage BV DGS Gate-to-source voltage ±V Operating and storage temperature -55 O C to +15 O C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package TO-3AA (SOT-9) θ ja 133 O C/W Note: Mounted on FR5 Board, 5mm x 5mm x 1.57mm General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Product Summary BS /BV DGS (max) Pin Configuration DRAIN Product Marking (ON) (min) SOURCE DRAIN GATE TO-3AA (SOT-9) (th) (max) 1V 1.5Ω 3.A.V TN5AW W = Code for week sealed = Green Packaging Package may or may not include the following marks: Si or TO-3AA (SOT-9) Doc.# DSFP-TN51 A113

2 Thermal Characteristics Package (continuous) Notes: (continuous) is limited by max rated T j. Mounted on FR5 Board, 5mm x 5mm x 1.57mm. (pulsed) Electrical Characteristics ( unless otherwise specified) Power TO-3AA (SOT-9) 73mA 5.A 1.W 73mA 5.A TN51 Sym Parameter Min Typ Max Units Conditions BS Drain-to-source breakdown voltage V = V, =.ma (th) Gate threshold voltage. -. V =, = 1.mA Δ(th) Change in (th) with temperature mv/ O C =, = 1.mA I GSS Gate body leakage na = ± V, = V µa = V, = Max Rating SS Zero gate voltage drain current V ma DS =. Max Rating, = V, = 15 C (ON) On-state drain current V A GS = 5.V, = 1V, = 3.V, = 5mA Static drain-to-source on-state resistance Ω =.5V, = 75mA = 1V, = 75mA Δ Change in with temperature %/ O C = 1V, = 75mA G FS Forward transductance - mmho, = 1.A C ISS Input capacitance = V, C OSS Common source output capacitance pf, C RSS Reverse transfer capacitance f = 1.MHz t d(on) Turn-on delay time t V DD, r Rise time ns = 1.5A, t d(off) Turn-off delay time - - R GEN = 5Ω t f Fall time V SD Diode forward voltage drop V = V, I SD = 1.5A t rr Reverse recovery time ns = V, I SD = 1.5A Notes: 1. All D.C. parameters 1% tested at 5 O C unless otherwise stated. (Pulse test: 3µs pulse, % duty cycle.). All A.C. parameters sample tested. Switching Waveforms and Test Circuit R RM INPUT 1V V 1% 9% Pulse Generator VDD R L OUTPUT t (ON) t (OFF) R GEN t d(on) t r t d(off) t f VDD OUTPUT 1% 1% INPUT D.U.T. V 9% 9% Doc.# DSFP-TN51 A113

3 TN51 Typical Performance Curves 1 Output Characteristics 1 Saturation Characteristics.... = 1V V V.. = 1V V V.. V V 3V 3V Transconductance vs. Drain Current Power Dissipation vs. Ambient Temperature. TO-3AA G FS (siemens) 1.. = -55 O C P D (watts) 1.. = 15 O C Maximum Rated Safe Operating Area 1 1. Thermal Response Characteristics TO-3AA (DC) T C TO-3AA (pulsed) Thermal Resistance.... TO-9 T C P D =.55W t P (seconds) Doc.# DSFP-TN51 A113 3

4 TN51 Typical Performance Curves (cont.) 1.1 BS Variation with Temperature 1 On-Resistance vs. Drain Current = 5.V BS 1. (Ω) = 1V T J 1 1 Transfer Characteristics = -55 O C V (th) and R DS Variation with Temperature C (picofarads) 1 Capacitance vs. Drain-to-Source Voltage O C 15 O C f = 1MHz C ISS C OSS (th) V 1.mA T J 1 Gate Drive Dynamic Characteristics = 1V = V 19pF 5 C RSS 7pF Q G (nanocoulombs) Doc.# DSFP-TN51 A113

5 3-Lead TO-3AA (SOT-9) Package Outline (N) TN51 D D1 C E H E1 L 1 3 b e e1 b1 A Top View Side View Dimensions (mm) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 13 All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TN51 A113 Symbol A b b1 C D D1 E E1 e e1 H L MIN NOM BSC BSC - - MAX JEDEC Registration TO-3, Variation AA, Issue C, July 19. This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO3AAN, Version F Bordeaux Drive, Sunnyvale, CA 99 Tel: --