Supertex inc. TN0604. N-Channel Enhancement-Mode Vertical DMOS FET. Features. General Description. Applications. Ordering Information.

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1 TN64 N-Channel Enhancement-Mode ertical DMOS FET Features Low threshold (1.6 max.) High input impedance Low input capacitance (14pF typical) Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage Applications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches Ordering Information Part Number Package Option Packing TN64N3-G 1/Bag TN64N3-G P2 TN64N3-G P3 TN64N3-G P5 TN64N3-G P13 TN64N3-G P14 2/Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Absolute Maximum Ratings Parameter alue Drain-to-source voltage BS Drain-to-gate voltage B DGS Gate-to-source voltage ±2 Operating and storage temperature -55 O C to +15 O C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Product Summary BS /B DGS Pin Configuration Product Marking SiTN 64 YYWW (max) SOURCE DRAIN (ON) (min) GATE YY = Year Sealed WW = Week Sealed = Green Packaging Package may or may not include the following marks: Si or (th) (max) 4.75Ω 4.A 1.6 Typical Thermal Resistance Package θ ja 132 O C/W Doc.# DSFP-TN64 D8813

2 Thermal Characteristics Electrical Characteristics ( unless otherwise specified) Sym Parameter Min Typ Max Units Conditions TN64 Package Power Dissipation (continuous) R RM.7A 4.6A.74W.7A 4.6A Notes: (continuous) is limited by max rated T j. BS Drain-to-source breakdown voltage =, = 2.mA (th) Gate threshold voltage =, = ma Δ(th) Change in (th) with temperature m/ O C =, = ma I GSS Gate body leakage na = ± 2, = µa =, = Max Rating SS Zero gate voltage drain current - - ma DS =.8 Max Rating, =, = 125 C (ON) On-state drain current A GS = 5., = = 1, = 2 Static drain-to-source on-state resistance Ω GS = 5., =.75A = 1, Δ Change in with temperature %/ O C = 1, G FS Forward transductance mmho = 2, C ISS Input capacitance =, C OSS Common source output capacitance pf = 2, C RSS Reverse transfer capacitance f = MHz t d(on) Turn-on delay time DD = 2, t r Rise time ns =.5A, t d(off) Turn-off delay time R GEN = 25Ω t f Fall time SD Diode forward voltage drop =, I SD t rr Reverse recovery time ns =, I SD = A Notes: 1. All D.C. parameters 1% tested at 25 O C unless otherwise stated. (Pulse test: 3µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit INPUT 1 1% 9% Pulse Generator DD R L OUTPUT t (ON) t (OFF) R GEN t d(on) t r t d(off) t f DD OUTPUT 1% 1% INPUT D.U.T. 9% 9% Doc.# DSFP-TN64 D8813 2

3 TN64 Typical Performance Curves 1 Output Characteristics 1 Saturation Characteristics = = Transconductance vs. Drain Current 2. = 25 Power Dissipation vs. Ambient Temperature 2. G FS (siemens) = -55 O C 25 O C 125 O C P D (watts) ( O C) 1 Maximum Rated Safe Operating Area Thermal Response Characteristics (pulsed) (DC).1 T C Thermal Resistance t P (seconds) P D = W T C Doc.# DSFP-TN64 D8813 3

4 TN64 Typical Performance Curves (cont.) 1.1 BS ariation with Temperature 2. On-Resistance vs. Drain Current = 5. BS (ohms) = T j ( O C) 1 Transfer Characteristics = 25 (th) and R DS ariation with Temperature O C 125 O C = -55 O C (th) R 1.5A T j ( O C) Capacitance vs. Drain-to-Source oltage 2 f = MHz Gate Drive Dynamic Characteristics = 1 C (picofarads) 1 C ISS pf = 4 17 pf 5 C OSS 2. C RSS Q G (nanocoulombs) Doc.# DSFP-TN64 D8813 4

5 3-Lead Package Outline (N3) TN64 D Seating Plane A L e1 e Front iew b c Side iew E1 1 3 E 2 Bottom iew Dimensions (inches) Symbol A b c D E E1 e e1 L MIN NOM MAX * JEDEC Registration. * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, ersion E419. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 213 All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TN64 D Bordeaux Drive, Sunnyvale, CA 9489 Tel:

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