Low Charge Injection 24-Channel SPST High Voltage Analog Switch with Bleed Resistors. Level Shifters. Latches D LE CLR D LE CLR D LE CLR D LE CLR

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1 Low Charge Injection 24-Channel SPST High Voltage nalog Switch with Bleed Resistors Features 24 Channels of high voltage analog switch Integrated bleed resistors on the outputs 3.3 or 5.0V CMOS input logic level 24 Channel SPST configuration 20MHz data shift clock frequency HVCMOS technology for high performance Very low quiescent power dissipation - (10µ) Low parasitic capacitance C to 50MHz analog signal frequency -60dB typical OFF-isolation at 5.0MHz CMOS logic circuitry for low power xcellent noise immunity Cascadable serial data register with latches Flexible operating supply voltages pplications Medical ultrasound imaging Piezoelectric transducer drivers Inkjet printer heads Optical MMS modules General escription The Supertex is a low charge injection, 24-channel high voltage analog switch integrated circuit (IC) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as medical ultrasound imaging, piezoelectric transducer drivers, and printers. The bleed resistors eliminate voltage built up on capacitive loads such as piezoelectric transducers. Input data is shifted into a 24-bit shift register that can then be retained in a 24-bit latch. To reduce any possible clock feed through noise, the latch enable bar should be left high until all bits are clocked in. ata are clocked in during the rising edge of the clock. Using HVCMOS technology, this device combines high voltage bilateral MOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. The device is suitable for various combinations of high voltage supplies, e.g., / : +40V/-160V, +100V/-100V, and +160V/- 40V. Block iagram Latches Level Shifters Output Switches SW0 CLK SW1 IN 24-Bit Shift Register SW2 OUT SW22 SW23 R oc.# SFP-

2 Ordering Information Part Number Package Packing L-G 64-Pad LFG 260/Tray LB-G 64-Ball LFG 260/Tray -G indicates package is RoHS compliant ( Green ) Configuration B C F G H J K bsolute Maximum Ratings Parameter V logic supply - differential supply Value -0. to V positive supply -0. to +200V negative supply +0. to -200V Logic input voltage -0. to V +0.3V nalog signal range to Peak analog signal current/channel 2.0 Storage temperature -65 C to 150 C Power dissipation 1.0W bsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. ll voltages are referenced to device ground. Typical Thermal Resistance Package 64-Pad LFG 64-Ball LFG θ ja 36 O C/W 37 O C/W Product Marking 64-Lead LFG (L/LB) (top view) L LLLLLLLLL YYWW CCC Package may or may not include the following marks: Si or 64-Pad LFG (L) LB LLLLLLLLL YYWW CCC L = Lot Number YY = Year Sealed WW = Week Sealed = ssembler I C = Country of Origin = Green Packaging L = Lot Number YY = Year Sealed WW = Week Sealed = ssembler I C = Country of Origin = Green Packaging Package may or may not include the following marks: Si or 64-Ball LFG (LB) Recommended Operating Conditions Sym Parameter Value V Logic power supply voltage 3.0V to 5. Positive high voltage supply +40V to +200V Negative high voltage supply -40V to -160V V IH High level input voltage 0.9V to V V IL Low level input voltage 0V to 0.1V nalog signal voltage peak-to-peak +10V to -10V T Operating free air temperature 0 O C to 70 O C Notes: 1. Power up/down sequence is arbitrary except must be powered-up first and powered-down last. 2. must be or floating during power up/down transition. 3. Rise and fall times of power supplies V,, and should not be less than 1.0msec. oc.# SFP- 2

3 C lectrical Characteristics (Over recommended operating conditions unless otherwise specified ) Sym Parameter 0 O C +25 O C +70 O C Min Max Min Typ Max Min Max Unit Conditions I SIG = 5.0m I SIG = 200m = +40V, R ONS Small signal switch ON-resistance I SIG = 5.0m = +100V, Ω I SIG = 200m ΔR ONS R ONL R INT I SOL Small signal switch ON-resistance matching Large signal switch ON-resistance Output switch shunt resistance Switch OFF-leakage per switch I SIG = 5.0m = +160V, I SIG = 200m % I = 5.0m, SIG = +100V, Ω = -10V, I SIG = KΩ Output switch to R I RINT = 0.5m μ = -10V, +10V C offset switch OFF V OS C offset switch ON I PPQ Quiescent supply current I NNQ Quiescent supply current I PPQ Quiescent supply current I NNQ Quiescent supply current mv μ μ No load ll switches OFF ll switches ON, I SW = 5.0m I SW Switch output peak current duty cycle < 0.1% f SW Output switching frequency khz uty cycle = I PP I NN verage supply current verage supply current m m = +40V, = +100V, = +160V, = +40V, = +100V, = +160V, ll output switches are turning ON and OFF at 50kHz with no load ll output switches are turning ON and OFF at 50kHz with no load I verage V supply current m f CLK = 5.0MHz, V I Q Quiescent V supply current μ ll logic inputs are static I SOR ata out source current m = V -0.7V I SINK ata out sink current m = 0.7V C IN Logic input capacitance pf --- * See Test Circuits on page 5 oc.# SFP- 3

4 C lectrical Characteristics (Over recommended operating conditions unless otherwise specified) Sym Parameter 0 O C +25 O C +70 O C Min Max Min Typ Max Min Max t S Set up time before rises ns --- t W t O Time width of Clock delay time to data out Unit Conditions V ns V V ns V t W Time width of ns --- t SU t H f CLK Set up time data to clock Hold time data from clock Clock frequency V ns V V ns V V MHz V t R, t F Clock rise and fall times ns --- t ON Turn ON time t OFF Turn OFF time dv/dt Maximum slew rate μs = -10V, R LO = 10kΩ = +40V, V/ns = +100V, = +160V, K O f = 5.0MHz, OFF isolation db 1.0KΩ//15pF load f = 5.0MHz, 50Ω load K CR Switch crosstalk db f = 5.0MHz, 50Ω load Output switch isolation diode I I m current C SG(OFF) OFF capacitance SW to pf C SG(ON) ON capacitance SW to V SPK V SPK ns pulse width, 2.0% duty cycle = 0V, f = 1.0MHz = +40V, R LO = 50Ω +V SPK Output voltage spike V m = +100V, -V (per switch) R LO = 50Ω SPK V SPK = +160V, -V SPK R LO = 50Ω QC Charge injection (per switch) * See Test Circuits on page = +40V, pc = +100V, = +160V, oc.# SFP- 4

5 Test Circuits -10V R LO 10kΩ -10V I SOL Open Open R R R Switch Off Leakage per Switch C Offset Switch ON/OFF T ON /T OFF Test Circuit V IN V IN R LO I I 50Ω NC 50Ω R R R K O = 20Log V IN OFF Isolation Output Switch Isolation iode Current K CR = 20Log V IN Switch Crosstalk Δ +V SPK 1000pF V SPK R LO 50Ω R 1kΩ R Q = 1000pF x Δ Charge Injection Output Voltage Spike oc.# SFP- 5

6 Truth Table Logic Timing Waveforms SW0 SW1... SW15 SW16... SW23 L L L OFF H L L ON L L L - OFF H L L - ON L - - L L - - OFF H - - L L - - ON L - L L OFF H - L L ON L L L OFF H L L ON X X X X X X X H L HOL PRVIOUS STT X X X X X X X X H LL SWITCHS OFF Notes: 1. The 24 switches operate independently. 2. Serial data is clocked in on the L to H transition of the CLK. 3. ll 24 switches go to a state retaining their latched condition at the rising edge of. When is low the shift registers data flow through the latch. 4. OUT is high when data in the register 23 is high. 5. Shift registers clocking has no effect on the switch states if is high. 6. The clear input overrides all other inputs. - N + 1 N N - 1 T IN IN t W t S CLOCK t SU t h t O T OUT OUT (typ) OFF ON t OFF 90% t ON 10% t WCL oc.# SFP- 6

7 7 oc.# SFP- escription - 64-Pad LFG (L) 1 SW22B 2 3 SW21B 4 SW20B 5 SW19B 6 SW18B 7 SW17B 8 SW16B 9 SW15B 10 SW15 B1 SW23B B2 SW23 B3 SW22 B4 SW21 B5 SW20 B6 SW19 B7 SW18 B8 SW17 B9 SW16 B10 SW14B C1 N/C C2 C9 SW14 C10 SW13B 1 2 R 9 10 SW CLK 9 SW12B 10 SW12 F1 F2 F9 SW11B F10 SW11 G1 IN G2 OUT G9 SW10B G10 H1 R H2 H9 SW10 H10 SW9B J1 SW0 J2 SW0B J3 SW1B J4 SW2B J5 SW3B J6 SW4B J7 SW5B J8 SW6B J9 SW7B J10 SW9 K1 SW1 K2 K3 SW2 K4 SW3 K5 SW4 K6 SW5 K7 SW6 K8 SW7 K9 SW8 K10 SW8B Ball escription - 64-Ball LFG (LB) 1 SW22B 2 3 SW21B 4 SW20B 5 SW19B 6 SW18B 7 SW17B 8 SW16B 9 SW15B 10 SW15 B1 SW23B B2 SW23 B3 SW22 B4 SW21 B5 SW20 B6 SW19 B7 SW18 B8 SW17 B9 SW16 B10 SW14B C1 N/C C2 C9 SW14 C10 SW13B 1 2 R 9 10 SW CLK 9 SW12B 10 SW12 F1 F2 F9 SW11B F10 SW11 G1 IN G2 OUT G9 SW10B G10 H1 R H2 H9 SW10 H10 SW9B J1 SW0 J2 SW0B J3 SW1B J4 SW2B J5 SW3B J6 SW4B J7 SW5B J8 SW6B J9 SW7B J10 SW9 K1 SW1 K2 K3 SW2 K4 SW3 K5 SW4 K6 SW5 K7 SW6 K8 SW7 K9 SW8 K10 SW8B

8 64-Pad LFG Package Outline (L) 7.00x7.00mm body, 0.85mm height (max), 0.65mm pitch Note 1 (Pad 1 Index rea /4 x /4) e B C 1 F G H J K Top View View B Bottom View e Seating Plane Φb Side View View B Notes: 1. Pad 1 identifier must be located in the index area indicated. Pad 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. imension (mm) Symbol b 1 1 e MIN NOM MX rawings not to scale. Supertex oc. #: SP-64LFGL, Version oc.# SFP- 8

9 64-Ball LFG Package Outline (LB) 7.00x7.00mm body, 1.00mm height (max), 0.65mm pitch Note 1 (Pad 1 Index rea /4 x /4) e B C 1 F G H J K Top View View B Bottom View e Side View View 1 Seating Plane Φb View View B Notes: 1. Ball 1 identifier must be located in the index area indicated. Ball 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. imension (mm) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 2012 ll rights reserved. Unauthorized use or reproduction is prohibited. oc.# SFP- Symbol 1 b 1 1 e MIN NOM MX rawings not to scale. Supertex oc. #: SP-64LFGLB, Version Bordeaux rive, Sunnyvale, C Tel: