BR24Axxx-WM (1K 2K 4K 8K 16K 32K 64K)

Transcription

1 Datasheet erial EEPOM eries utomotive EEPOM 5 Operation I 2 BU EEPOM (2-Wire) B24xxx-WM ( ) General Description B24xxx-WM is a serial EEPOM of I 2 BU interface method. Features ompletely conforming to the world standard I 2 BU. ll controls available by 2 ports of serial clock (L) and serial data (D) Wide temperature range -4 to +5 Other devices than EEPOM can be connected to the same port, saving microcontroller port 2.5V to 5.5V single power source operation most suitable for battery use Page write mode useful for initial value write at factory shipment uto erase and auto end function at data rewrite Low current consumption t write operation (5V) :.2m (yp.) * t read operation (5V) :.2m (yp.) t standby condition (5V) :.μ (yp.) Write mistake prevention function Write (write protect) function added Write mistake prevention function at low voltage Data rewrite up to,, times(a 25 ) Data kept for 4 years(a 25 ) Noise filter built in L / D terminal hipment data all address FFh * B2432-WM, B2464-WM :.5m E-Q Qualified Packages W(yp.) x D(yp.) x H(Max.) OP8 5.mm x 6.2mm x.7mm OP- J8 4.9mm x 6.mm x.65mm MOP8 2.9mm x 4.mm x.9mm Page write Number of Pages 8Byte 6Byte 32Byte Product number B24-WM B242-WM B244-WM B248-WM B246-WM B2432-WM B2464-WM B24xxx-WM apacity Bit format ype Power source voltage OP8 OP-J8 MOP8 bit 28 8 B24-WM 2.5V to 5.5V 2bit B242-WM 2.5V to 5.5V 4bit 52 8 B244-WM 2.5V to 5.5V 8bit 8 B248-WM 2.5V to 5.5V 6bit 2 8 B246-WM 2.5V to 5.5V 32bit 4 8 B2432-WM 2.5V to 5.5V 64bit 8 8 B2464-WM 2.5V to 5.5V Product structure: ilicon monolithic integrated circuit his product is not designed protection against radioactive rays 22 OHM o., Ltd. ll rights reserved. Z22 4 /28 Z22-G Jan.28 ev.3

2 B24xxx-WM ( ) bsolute Maximum atings (a=25 ) Parameter ymbol atings Unit emarks upply Voltage V -.3 to +6.5 V.45 (OP8) When using at a=25 or higher 4.5mW to be reduced per. Power Dissipation Pd.45 (OP-J8) W When using at a=25 or higher 4.5mW to be reduced per..3 (MOP8) When using at a=25 or higher 3.mW to be reduced per. torage emperature stg -65 to +25 Operating emperature opr -4 to +5 erminal Voltage -.3 to V +. V Memory cell characteristics (V=2.5V to 5.5V) Parameter Limits Min. yp. Max Unit onditions Number of data rewrite times *,, - - a 25 imes, - - a 5 Data hold years * a 25 Years - - a 5 hipment data all address FFh *Not % EED ecommended Operating atings Parameter ymbol atings Unit Power source voltage V 2.5 to 5.5 V Input voltage V IN to V Electrical characteristics (Unless otherwise specified, a=-4 to +5, V=2.5V to 5.5V) Parameter ymbol Limits Min. yp. Max. Unit onditions HIGH input voltage VIH.7 V - - V LOW input voltage VIL V V LOW output voltage VOL V IOL=3.m (D) Input leak current ILI - - μ VIN=V to V Output leak current ILO - - μ VOU=V to V, (D) urrent consumption 2. I - - V m =5.5V,fL=4kHz, tw=5ms, 3. *2 Byte write, Page write V I m =5.5V,fL=4kHz andom read, current read, sequential read tandby current IB μ V =5.5V, D L= V,, 2=GND, WP=GND * B24/2/4/8/6-WM, *2 B2432/64-WM 22 OHM o., Ltd. ll rights reserved. Z22 5 2/28 Z22-G Jan.28 ev.3

3 B24xxx-WM ( ) Operating timing characteristics (Unless otherwise specified, a=-4 to +5, V=2.5V to 5.5V) Parameter ymbol F-MODE 2.5V V 5.5V NDD-MODE 2.5V V 5.5V Unit Min. yp. Max. Min. yp. Max. L frequency fl khz Data clock HIGH time thigh μs Data clock LOW time tlow μs D, L rise time * t μs D, L fall time * tf μs tart condition hold time thd: μs tart condition setup time tu: μs Input data hold time thd:d ns Input data setup time tu:d ns Output data delay time tpd μs Output data hold time tdh μs top condition setup time tu:o μs Bus release time before transfer start tbuf μs Internal write cycle time tw ms Noise removal valid period (D, L terminal) ti μs WP hold time thd:wp ns WP setup time tu:wp μs WP valid time thigh:wp μs * Not % tested F-MODE and NDD-MODE F-MODE and NDD-MODE are of same operations, and mode is changed. hey are distinguished by operating speeds. khz operation is called NDD-MODE, and 4kHz operation is called F-MODE. his operating frequency is the maximum operating frequency, so khz clock may be used in F-MODE. t V =2.5V to 5.5V, 4kHz, namely, operation is made in FMODE. (Operation is made also in NDD-MODE.) ync Data Input / Output iming t tf thigh L D (input) ( 入力 ) thd: tu:d tlow thd:d tbuf tpd tdh L D tu: thd: tu:o D (output) ( 出力 ) BI OP BI Input read at the rise edge of L Data output in sync with the fall of L Figure -(a) ync data input / output timing L Figure -(b) tart-stop bit timing L D() D(n) D D D D D Write data tw WP tw ストップコンディション top condition (n-th address) top condition tart condition Figure -(c) Write cycle timing tu:wp Figure -(d) WP timing at write execution thd:wp L D() D(n) D D D thigh:wp tw WP t write execution, in the area from the D taken clock rise of the first D(), to tw, set WP= LOW. By setting WP HIGH in the area, write can be cancelled. When it is set WP= HIGH during tw, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again. Figure -(e) WP timing at write cancel 22 OHM o., Ltd. ll rights reserved. Z22 5 3/28 Z22-G Jan.28 ev.3

4 B24xxx-WM ( ) Block Diagram *2 bit to 64bit EEPOM array 8 Vcc * 7bit bit 8bit 2bit 9bit 3bit bit 8bit *2 2 ddress decoder 7bit bit * 8bit 2bit 9bit 3bit bit lave - word address register Data register 7 WP *2 2 3 ontrol circuit OP 6 L GND 4 High voltage generating circuit Power source voltage detection 5 D * 7bit : B24-WM 8bit : B242-WM 9bit : B244-WM bit : B248-WM bit : B246-WM 2bit : B2432-WM 3bit : B2464-WM * 2 =N.. : B244-WM, =N.. : B248-WM, = N.. 2=Don t Use : B246-WM Pin onfiguration (OP VIEW) 8 Vcc B24-WM B242-WM B244-WM B248-WM B246-WM B2432-WM B2464-WM 7 6 WP L GND 4 5 D Pin Descriptions erminal name Input / output Function B24-WM B242-WM B244-WM B248-WM B246-WM B2432-WM B2464-WM Input lave address setting Not connected lave address setting Input lave address setting Not connected lave address setting 2 Input lave address setting Not used lave address setting GND - eference voltage of all input / output, V D Input / output lave and word address, erial data input serial data output L Input erial clock input WP Input Write protect terminal Vcc - onnect the power source. 22 OHM o., Ltd. ll rights reserved. Z22 5 4/28 Z22-G Jan.28 ev.3

5 B24xxx-WM ( ) ypical Performance urves (he following values are yp. ones.) VIH[V] PE a=5 a=-4 a=25 VIL[V] a=5 a=-4 a=25 PE Figure 2. H input voltage VIH,2 (L,D,WP) Figure 3. L input voltagevil,2 (L,D,WP).2.8. PE E VOL[V] PE a=5 a=25 a=-4 ILI[μ] a=5 a=25 a= IOL[m] Figure 4. L output voltage VOL-IOL (V =2.5V) Figure 5. Input leak current ILI (L,WP) 22 OHM o., Ltd. ll rights reserved. Z22 5 5/28 Z22-G Jan.28 ev.3

6 B24xxx-WM ( ) ypical Performance urves ontinued ILO[μ] PE a=5 a=25 a=-4 I[m] [B24/2/4/8/6-WM] fl=4khz D=h PE a=25 a=5 a= Figure 6. Output leak current ILO(D) Figure 7. urrent consumption at WIE operation I (fl=4khz) I[m] fl=4khz D=h [B2432/64-WM] PE I2[m] fl=4khz D=h PE a=5 a=25..5 a=25 a=5 a=-4.2. a= Figure 8. urrent consumption at WIE operation I (fl=4khz) Figure 9. urrent consumption at ED operation I2 (fl=4khz) 22 OHM o., Ltd. ll rights reserved. Z22 5 6/28 Z22-G Jan.28 ev.3

7 B24xxx-WM ( ) ypical Performance urves ontinued [B24/2/4/8/6-WM] fl=khz D=h PE fl=khz D=h [B2432/64-WM] PE I[m].5. I[m] a=25 a=5 a=-4..5 a=25 a=5 a= Figure. urrent consumption at WIE operation I (fl=khz) Figure. urrent consumption at WIE operation I (fl=khz) I2[m] PE fl=khz D=h a=25 a=5 a=-4 IB[μ] PE a=5 a=-4 a= Figure 2. urrent consumption at ED operation I2 (fl=khz) Figure 3. tandby current IB 22 OHM o., Ltd. ll rights reserved. Z22 5 7/28 Z22-G Jan.28 ev.3

8 B24xxx-WM ( ) ypical Performance urves ontinued 5 fl[khz] a=5 a=25 a=-4 PE2 PE thigh [μs] PE2 a=-4 a=25 a=5 PE Figure 4. L frequency fl Figure 5. Data clock "H" time thigh PE2 4 PE2 tlow[μs] 3 2 a=5 a=25 a=-4 PE thd:[μs] 3 2 a=5 a=25 a=-4 PE Figure 6. Data clock "L" time tlow Figure 7. tart condition hold time thd: 22 OHM o., Ltd. ll rights reserved. Z22 5 8/28 Z22-G Jan.28 ev.3

9 B24xxx-WM ( ) ypical Performance urves ontinued 6 5 tu:[μs] a=-4 a=25 a=5 PE2 PE thd:d(high)[ns] PE, 2 a=-4 a=25 a= Figure 8. tart condition setup time tu: Figure 9. Input data hold time thd:d(high) 5 3 thd:d(low)[ns] PE, 2 a=5 a=25 a=-4 tu:d(high)[ns] 2 - PE2 PE a=5 a=25 a= Figure 2. Input data hold time thd:d(low) Figure 2. Input data setup time tu:d(high) 22 OHM o., Ltd. ll rights reserved. Z22 5 9/28 Z22-G Jan.28 ev.3

10 B24xxx-WM ( ) ypical Performance urves ontinued 3 4 tu:d(low)[ns] 2 - PE2 a=25 PE a=5 a=-4 tpd[μs] 3 2 a=5 a=25 a=-4 PE2 PE2 PE PE Figure 22. Input data setup time tu:d(low) Figure 23. Output data delay time tpd PE2 4 PE2 tpd[μs] 2 a=-4 a=25 a=5 PE2 PE tbuf[μs] 3 2 a=-4 a=25 a=5 PE PE Figure 24. Output data delay time tpd Figure 25. Bus release time before transfer start tbuf 22 OHM o., Ltd. ll rights reserved. Z22 5 /28 Z22-G Jan.28 ev.3

11 B24xxx-WM ( ) ypical Performance urves ontinued PE, 2.5 tw[ms] a=-4 a=5 a=25 ti(l H)[μs] a=-4 a=25 a=5 PE, Figure 26. Internal write cycle time tw Figure 27. Noise removal valid time ti(l H) ti(l L)[μs] a=25 PE a=-4 a=5 ti(d H)[μs] a=25 PE, 2 a=5 a= Figure 28. Noise removal valid time ti(l L) Figure 29. Noise removal valid time ti(d H) 22 OHM o., Ltd. ll rights reserved. Z22 5 /28 Z22-G Jan.28 ev.3

12 B24xxx-WM ( ) ypical Performance urves ontinued.6.2 ti(d L)[μs] a=25 PE a=-4 a=5 tu:wp[μs] PE, 2 a=25 a=5 a= Figure 3. Noise removal valid time ti(d L) Figure 3. WP setup time tu:wp.2 thigh:wp[μs].8.6 PE, a=-4 a=25 a= Figure 32. WP valid time thigh:wp 22 OHM o., Ltd. ll rights reserved. Z22 5 2/28 Z22-G Jan.28 ev.3

13 B24xxx-WM ( ) I 2 BU ommunication I 2 BU data communication I 2 BU data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long, and acknowledge is always required after each byte. I 2 BU carries out data transmission with plural devices connected by 2 communication lines of serial data (D) and serial clock (L). mong devices, there are master that generates clock and control communication start and end, and slave that is controlled by address peculiar to devices. EEPOM becomes slave. nd the device that outputs data to bus during data communication is called transmitter, and the device that receives data is called receiver. D L DDE /W condition D Figure 33. Data transfer timing tart condition (tart bit recognition) Before executing each command, start condition (start bit) where D goes from 'HIGH' down to 'LOW' when L is 'HIGH' is necessary. his I always detects whether D and L are in start condition (start bit) or not, therefore, unless this confdition is satisfied, any command is executed. top condition (stop bit recongnition) Each command can be ended by D rising from 'LOW' to 'HIGH' when stop condition (stop bit), namely, L is 'HIGH' cknowledge () signal his acknowledge () signal is a software rule to show whether data transfer has been made normally or not. In master and slave, the device (μ-om at slave address input of write command, read command, and this I at data output of readcommand) at the transmitter (sending) side releases the bus after output of 8bit data. he device (this I at slave address input of write command, read command, and μ-om at data output of read command) at the receiver (receiving) side sets D 'LOW' during 9 clock cycles, and outputs acknowledge signal ( signal) showing that it has received the 8bit data. his I, after recognizing start condition and slave address (8bit), outputs acknowledge signal ( signal) 'LOW'. Each write operation outputs acknowledge signal ( signal) 'LOW', at receiving 8bit data (word address and write data). Each read operation outputs 8bit data (read data), and detects acknowledge signal ( signal) 'LOW'. When acknowledge signal ( signal) is detected, and stop condition is not sent from the master (μ-om) side, this I continues data output. When acknowledge signal ( signal) is not detected, this I stops data transfer, and recognizes stop condition (stop bit), and ends read operation. nd this I gets in status. Device addressing Output slave address after start condition from master. he significant 4 bits of slave address are used for recognizing a device type. he device code of this I is fixed to ''. Next slave addresses (2 --- device address) are for selecting devices, and plural ones can be used on a same bus according to the number of device addresses. he most insignificant bit (/W --- ED / WIE) of slave address is used for designating write or read operation, and is as shown below. etting / W to write (setting to word address setting of random read) etting / W to read D P OP condition ype lave address Maximum number of connected buses B24-WM 2 /W 8 B242-WM 2 /W 8 B244-WM 2 P /W 4 B248-WM 2 P P /W 2 B246-WM P2 P P /W B2432-WM 2 /W 8 B2464-WM 2 /W 8 P, P to P2 are page select bits. Note) Up to 4 units B244-WM, up to 2 units of B248-WM, and one unit of B246-WM can be connected. Device address is set by 'H' and 'L' of each pin of,, and 2. 2 GND B24-WM B242-WM B244-WM B248-WM B246-WM B2432-WM B2464-WM Vcc WP L D 22 OHM o., Ltd. ll rights reserved. Z22 5 3/28 Z22-G Jan.28 ev.3

14 B24xxx-WM ( ) Write ommand Write cycle rbitrary data is written to EEPOM. When to write only byte, byte write is normally used, and when to write continuous data of 2 bytes or more, simultaneous write is possible by page write cycle. he maximum number of write bytes is specified per device of each capacity. Up to 32 arbitrary bytes can be written. (In the case of B2432 / 64-WM) LVE DDE W I E WOD DDE D O P D LINE 2 Note) / W W 7 * W D7 D * s for W7, B24-WM becomes Don t care. Figure 34. Byte write cycle (B24/2/4/8/6-WM) LVE DDE W I E st WOD DDE 2nd WOD DDE D O P D LINE 2 Note) / W * W W * * 2 * W D7 D * s for W2, B2432-WM becomes Don t care. D LINE D LINE Figure 35. Byte write cycle (B2432/64-WM) LVE DDE 2 W I E W 7 Note) / * W WOD DDE(n) W D7 D(n) D *2 D(n+5) Figure 36. Page write cycle (B24/2/4/8/6-WM) LVE DDE 2 W I E Note) / W st WOD DDE(n) * * * W 2 * W 2nd WOD DDE(n) W D7 D(n) D D D(n+3) D O P O P * s for W7, B24-WM becomes Don t care. *2 s for B24/2-WM become (n+7). * s for W2, B2432-WM becomes Don t care. Figure 37. Page write cycle (B2432/64-WM) Data is written to the address designated by word address (n-th address) By issuing stop bit after 8bit data input, write to memory cell inside starts. When internal write is started, command is not accepted for tw (5ms at maximum). By page write cycle, the following can be written in bulk : Up to 8 bytes ( B24-WM, B242-WM) : Up to 6bytes (B244-WM, B248-WM,B246-WM) : Up to 32bytes (B2432-WM, B2464-WM nd when data of the maximum bytes or higher is sent, data from the first byte is overwritten. (efer to "Internal address increment" in Page 5.) s for page write cycle of B24-WM and B242-WM, after the significant 5 bits (4 significant bits in B24-WM) of word address are designated arbitrarily, and as for page write command of B244-WM, B248-WM, and B246-WM, after page select bit (P) of slave address is designated arbitrarily, by continuing data input of 2 bytes or more, the address of insignificant 4 bits (insignificant 3 bit in B24-WM, and B242-WM) is incremented internally, and data up to 6 bytes (up to 8 bytes in B24-WM and B242-WM) can be written. s for page write cycle of B2432-WM and B2464-WM, after the significant 7 bits (in the case of B2432-WM) of word address, or the significant 8 bits (in the case of B2464-WM) of word address are designated arbitrarily, by continuing data input of 2 byte or more, the address of insignificant 5 bits is incremented internally, and data up to 32 bytes can be written. Note) * *2 *3 2 * In B246-WM, 2 becomes P2. *2 In B248-WM, B246-WM, become P. *3 In B244-WM, becomes P, and in B248-WM and B246-WM, becomes P. Figure 38. Difference of slave address of each type 22 OHM o., Ltd. ll rights reserved. Z22 5 4/28 Z22-G Jan.28 ev.3

15 B24xxx-WM ( ) Notes on write cycle continuous input t OP (stop bit), write starts. LVE DDE W I E WOD DDE(n) D(n) *2 D(n+7) *3 O P D LINE 2 * W 7 W D7 D D Note) / W Next command Note) Figure 39. Page write cycle tw(maximum : 5ms) ommand is not accepted for this period. * B24-WM becomes Don t care. *2 B244-WM, B248-W, and B246-WM become (n+5). *3 B2432-WM and B2464-WM become (n+3). * *2 *3 2 Figure 4. Difference of each type of slave address * In B246-WM, 2 becomes P2. *2 In B248-WM, B246-WM, become P. *3 In B244-WM, becomes P, and in B248-WM and in B246-WM, becomes P. Notes on page write cycle List of numbers of page write Number of Pages 8Byte 6Byte 32Byte Product number B24-WM B242-WM B244-WM B248-WM B246-WM B2432-WM B2464-WM he above numbers are maximum bytes for respective types. ny bytes below these can be written. In the case B242-WM, page=8bytes, but the page write cycle write time is 5ms at maximum for 8byte bulk write. It does not stand 5ms at maximum 8byte=4ms(Max.). Internal address increment Page write mode (in the case of B242-WM) W W4 W3 W2 W W Increment 6h ignificant bit is fixed. No digit up For example, when it is started from address 6h, therefore, increment is made as below, 6h 7h h h ---, which please note. *6h 6 in hexadecimal, therefore, becomes a binary number. Write protect (WP) terminal Write protect (WP) function When WP terminal is set V (H level), data rewrite of all addresses is prohibited. When it is set GND (L level), data rewrite of all address is enabled. Be sure to connect this terminal to V or GND, or control it to H level or L level. Do not use it open. t extremely low voltage at power ON / OFF, by setting the WP terminal 'H', mistake write can be prevented. During tw, set the WP terminal always to 'L'. If it is set 'H', write is forcibly terminated. 22 OHM o., Ltd. ll rights reserved. Z22 5 5/28 Z22-G Jan.28 ev.3

16 B24xxx-WM ( ) ead ommand ead cycle Data of EEPOM is read. In read cycle, there are random read cycle and current read cycle. andom read cycle is a command to read data by designating address, and is used generally. urrent read cycle is a command to read data of internal address register without designating address, and is used when to verify just after write cycle. In both the read cycles, sequential read cycle is available, and the next address data can be read in succession. D LINE LVE DDE 2 Note) W I E W 7 * / W WOD DDE(n) W LVE DDE 2 E D / W D7 D(n) Figure 4. andom read cycle (B24/2/4/8/6-WM) D O P It is necessary to input 'H' to the last. * s for W7, B24-WM become Don t care. D LINE LVE DDE W I E st WOD DDE(n) 2nd WOD DDE(n) D(n) W W W 2 * * * 2 D7 D 2 LVE DDE E D O P Note) / W * Figure 42. andom read cycle (B2432/64 -WM) / W * s for W2, B2432-WM become Don t care. LVE DDE E D D(n) O P It is necessary to input 'H' to the last. D LINE 2 D7 D Note) / W Figure 43. urrent read cycle D LINE LVE DDE Note) 2 E D / W D7 D(n) D D7 D(n+x) Figure 44. equential read cycle (in the case of current read cycle) D O P In random read cycle, data of designated word address can be read. When the command just before current read cycle is random read cycle, current read cycle (each including sequential read cycle), data of incremented last read address (n)-th address, i.e., data of the (n+)-th address is output. When signal 'LOW' after D is detected, and stop condition is not sent from master (μ-om) side, the next address data can be read in succession. ead cycle is ended by stop condition where 'H' is input to signal after D and D signal is started at L signal 'H'. When 'H' is not input to signal after D, sequential read gets in, and the next data is output. herefore, read command cycle cannot be ended. When to end read command cycle, be sure input stop condition to input 'H' to signal after D, and to start D at L signal 'H'. equential read is ended by stop condition where 'H' is input to signal after arbitrary D and D is started at L signal 'H'. Note) * *2 *3 2 Figure 45. Difference of slave address of each type * In B246-WM, 2 becomes P2. *2 In B248-WM, B246-WM, become P. *3 In B244-WM, becomes P, and in B248-WM and B246-WM, becomes P. 22 OHM o., Ltd. ll rights reserved. Z22 5 6/28 Z22-G Jan.28 ev.3

17 B24xxx-WM ( ) oftware reset oftware reset is executed when to avoid malfunction after power on, and to reset during command input. oftware reset has several kinds, and 3 kinds of them are shown in the figure below. (efer to Figure 46(a), Figure 46(b), and Figure 46(c).) In dummy clock input area, release the D bus ('H' by pull up). In dummy clock area, output and read data '' (both 'L' level) may be output from EEPOM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. Dummy clock 4 tart 2 L D Normal command Normal command Figure 46-(a) he case of dummy clock +++ command input tart Dummy clock 9 tart L D Normal command Normal command Figure 46-(b) he case of +9 dummy clocks ++ command input tart 9 L D Figure 46-(c) 9+ command input Normal command Normal command スタート tart command from input. cknowledge polling During internal write execution, all input commands are ignored, therefore is not sent back. During internal automatic write execution after write cycle input, next command (slave address) is sent, and if the first signal sends back 'L', then it means end of write operation, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command can be executed without waiting for tw = 5ms. When to write continuously, /W =, when to carry out current read cycle after write, slave address /W = is sent, and if signal sends back 'L', then execute word address input and data output and so forth. First write command During internal write, = HIGH is sent back. Write command O P lave address H tw lave address H econd write command lave address H lave address L Word address L Data L O P tw fter completion of internal write, =LOW is sent back, so input next word address and data in succession. Figure 47. ase to continuously write by acknowledge polling 22 OHM o., Ltd. ll rights reserved. Z22 5 7/28 Z22-G Jan.28 ev.3

18 B24xxx-WM ( ) WP valid timing (write cancel) WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so forth, pay attention to the following WP valid timing. During write cycle execution, in cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte write cycle and page write cycle, the area from the first start condition of command to the rise of clock to taken in D of data(in page write cycle, the first byte data) is cancel invalid area. WP input in this area becomes Don't care. et the setup time to rise of D taken L ns or more. he area from the rise of L to take in D to the end of internal automatic write (tw) is cancel valid area. nd, when it is set WP='H' during tw, write is ended forcibly, data of address under access is not guaranteed, therefore, write it once again. (efer to Figure 48.) fter execution of forced end by WP, standby status gets in, so there is no need to wait for tw (5ms at maximum). L ise of D taken clock L ise of D D D D Enlarged view D D Enlarged view D lave Word D7 D6 D5 D4 D3 D2 D D Data address address L L L L O P tw WP cancels invalid area WP cancels valid area Write forced end WP Data is not written. Data not guaranteed Figure 48. WP valid timing ommand cancel by start condition and stop condition During command input, by continuously inputting start condition and stop condition, command can be cancelled. (efer to Figure 49.) However, in output area and during data read, D bus may output 'L', and in this case, start condition and stop condition cannot be input, so reset is not available. herefore, execute software reset. nd when command is cancelled by start, stop condition, during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined, therefore, it is not possible to carry out current read cycle in succession. When to carry out read cycle in succession, carry out random read cycle. L D tart condition top condition Figure 49. ase of cancel by start, stop condition during slave address input 22 OHM o., Ltd. ll rights reserved. Z22 5 8/28 Z22-G Jan.28 ev.3

19 B24xxx-WM ( ) I/O peripheral circuit Pull up resistance of D terminal D is NMO open drain, so requires pull up resistance. s for this resistance value ( PU), select an appropriate value to this resistance value from microcontroller V IL, I L, and V OL-I OL characteristics of this I. If PU is large, operating frequency is limited. he smaller the PU, the larger the consumption current at operation. Maximum value of PU he maximum value of PU is determined by the following factors. ()D rise time to be determined by the capacitance (BU) of bus line of PU and D should be t or below. nd timing should be satisfied even when D rise time is late. (2)he bus electric potential to be determined by input leak total (I L) of device connected to bus at output of 'H' to D bus and PU should sufficiently secure the input 'H' level (VIH) of microcontroller and EEPOM including recommended noise margin.2 V. Vcc - I L PU -.2Vcc V IH PU = Ex. ) When V =3V, I L=μ, V IH=.7 V, from (2) PU.8Vcc - V IH I L [kω] Microcontroller Minimum value of PU he minimum value of PU is determined by the following factors. ()When I outputs LOW, it should be satisfied that V OLMX=.4V and I OLMX=3m. IL B24XX PU D terminal IL Bus line バスライン容量 capacity BU Figure 5. I/O circuit diagram V -V OL PU I OL PU V -V OL I OL (2)V OLMX=.4V should secure the input 'L' level (V IL) of microcontroller and EEPOM including recommended noise margin. V. VOLMX VIL-. V Ex. ) When V =3V, VOL=.4V, IOL=3m, microcontroller, EEPOM VIL=.3 V from () 3-.4 PU [Ω] nd V OL =.4 [V] V IL =.3 3 =.9 [V] herefore, the condition (2) is satisfied. Pull up resistance of L terminal When L control is made at MO output port, there is no need, but in the case there is timing where L becomes 'Hi-Z', add a pull up resistance. s for the pull up resistance, one of several kω to several ten kω is recommended in consideration of drive performance of output port of microcontroller.,, 2, WP process Process of device address terminals (,,2) heck whether the set device address coincides with device address input sent from the master side or not, and select one among plural devices connected to a same bus. onnect this terminal to pull up or pull down, or V or GND. nd, pins (N,, PIN) not used as device address may be set to any of H, 'L', and 'Hi-Z'. ypes with N..PIN B246/F/FJ -WM,, 2 B248/F/FJ-WM, B244/F/FJ -WM Process of WP terminal WP terminal is the terminal that prohibits and permits write in hardware manner. In 'H' status, only ED is available and WIE of all address is prohibited. In the case of 'L', both are available. In the case of use it as an OM, it is recommended to connect it to pull up or V. In the case to use both ED and WIE, control WP terminal or connect it to pull down or GND. 22 OHM o., Ltd. ll rights reserved. Z22 5 9/28 Z22-G Jan.28 ev.3

20 B24xxx-WM ( ) autions on microcontroller connection s In I 2 BU, it is recommended that D port is of open drain input/output. However, when to use MO input / output of tri state to D port, insert a series resistance s between the pull up resistance pu and the D terminal of EEPOM. his is controls over current that occurs when PMO of the microcontroller and NMO of EEPOM are turned ON simultaneously. s also plays the role of protection of D terminal against surge. herefore, even when D port is open drain input/output, s can be used. PU L D 'H' output of microcontroller 'L' output of EEPOM Microcontroller EEPOM Figure 5. I/O circuit diagram Over current flows to D line by 'H' output of microcontroller and 'L' output of EEPOM. Figure 52. Input / output collision timing Maximum value of s he maximum value of s is determined by the following relations. ()D rise time to be determined by the capacity (BU) of bus line of pu and D should be t or below. nd timing should be satisfied even when D rise time is late. (2)he bus electric potential to be determined by pu and s the moment when EEPOM outputs 'L' to D bus should sufficiently secure the input 'L' level (V IL) of microcontroller including recommended noise margin. V. V PU IOL Bus line capacity BU VOL (V-VOL) PU+ + VOL+.V VIL VIL-VOL-.V.V-VIL PU Example)When V=3V, VIL=.3V, VOL=.4V, PU=2kΩ, VIL Microcontroller EEPOM from(2), Figure 53. I/O circuit diagram.67[kω ] Minimum value of s he minimum value of s is determined by over current at bus collision. When over current flows, noises in power source line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following relation must be satisfied. Determine the allowable current in consideration of impedance of power source line in set and so forth. et the over current to EEPOM m or below. PU 'L' output Over currentⅠ 'H' output Microcontroller EEPOM Figure 54. I/O circuit diagram V I V I Example)When V=3V, I=m 3-3 3[Ω ] 22 OHM o., Ltd. ll rights reserved. Z22 5 2/28 Z22-G Jan.28 ev.3

21 B24xxx-WM ( ) I 2 BU input / output circuit Input (,2,L) Input / output (D) Figure 55. Input pin circuit diagram Figure 56. Input / output pin circuit diagram Input (, WP) Figure 57. Input pin circuit diagram Notes on power ON t power on, in I internal circuit and set, V rises through unstable low voltage area, and I inside is not completely reset, and malfunction may occur. o prevent this, functions of PO circuit and LV circuit are equipped. o assure the operation, observe the following conditions at power on.. et D = 'H' and L ='L' or 'H' 2. tart power source so as to satisfy the recommended conditions of t, t OFF, and Vbot for operating PO circuit. V t OFF t Vbot ecommended conditions of t, t OFF,Vbot t t OFF Vbot ms or below ms or longer.3v or below ms or below ms or longer.2v or below Figure 58. ise waveform diagram 22 OHM o., Ltd. ll rights reserved. Z22 5 2/28 Z22-G Jan.28 ev.3

22 B24xxx-WM ( ) 3. et D and L so as not to become 'Hi-Z'. When the above conditions and 2 cannot be observed, take the following countermeasures. a) In the case when the above condition cannot be observed. When D becomes 'L' at power on. ontrol L and D as shown below, to make L and D, 'H' and 'H'. V t LOW L D fter Vcc becomes stable t DH t U:D fter Vcc becomes stable t U:D Figure 59. When L= 'H' and D= 'L' Figure 6. When L='L' and D='L' b) In the case when the above condition 2 cannot be observed. fter power source becomes stable, execute software reset(page 7). c) In the case when the above conditions and 2 cannot be observed. arry out a), and then carry out b). Low voltage malfunction prevention function LV circuit prevents data rewrite operation at low power, and prevents wrong write. t LV voltage (yp. =.2V) or below, it prevent data rewrite. V noise countermeasures Bypass capacitor When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a by pass capacitor (.μf) between I V and GND. t that moment, attach it as close to I as possible. nd, it is also recommended to attach a bypass capacitor between board V and GND. Note of use () Described numeric values and data are design representative values, and the values are not guaranteed. (2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition characteristics and fluctuations of external parts and our LI. (3) bsolute maximum ratings If the absolute maximum ratings such as impressed voltage and operation temperature range and so forth are exceeded, LI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LI. (4)GND electric potential et the voltage of GND terminal lowest at any operating condition. Make sure that each terminal voltage is lower than that of GND terminal. (5)erminal design In consideration of permissible loss in actual use condition, carry out heat design with sufficient margin. (6)erminal to terminal shortcircuit and wrong packaging When to package LI onto a board, pay sufficient attention to LI direction and displacement. Wrong packaging may destruct LI. nd in the case of shortcircuit between LI terminals and terminals and power source, terminal and GND owing to foreign matter, LI may be destructed. (7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently. 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

23 B24xxx-WM ( ) Ordering Information Product ode Description B 2 4 x x x x x - WM x x BU type 24: I 2 Operating temperature -4 to +5 apacity = 8=8 64=64 2=2 6=6 4=4 32=32 Package F FJ FVM : OP8 : OP-J8 : MOP8 W M Lineup : Double ell : For utomotive pplication Packaging and forming specification E2 : Embossed tape and reel (OP8,OP-J8) : Embossed tape and reel (MOP8) apacity ype Package Quantity OP8 eel of 25 OP-J8 eel of 25 OP8 eel of 25 OP-J8 eel of 25 MOP8 eel of 3 OP8 eel of 25 OP-J8 eel of 25 OP8 eel of 25 OP-J8 eel of 25 OP8 eel of 25 OP-J8 eel of OP8 eel of OP8 eel of OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

24 B24xxx-WM ( ) Physical Dimension ape and eel Information 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

25 B24xxx-WM ( ) Physical Dimension ape and eel Information ontinued 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

26 B24xxx-WM ( ) Physical Dimension ape and eel Information ontinued 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

27 B24xxx-WM ( ) Marking Diagrams OP8(OP VIEW) Part Number Marking OP-J8(OP VIEW) Part Number Marking LO Number LO Number PIN M PIN M MOP8(OP VIEW) Part Number Marking LO Number PIN M Marking Information apacity Product Name Marking Package ype OP8 OP-J8 OP8 OP-J8 MOP8 OP8 OP-J8 OP8 OP-J8 OP8 OP-J OP OP8 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

28 B24xxx-WM ( ) evision History Date evision hanges 3.ug.22 New elease 6.Nov Jan.28 3 P. dded E-Q Qualified P.2 hanged Unit of Pd P.23 Updated Product ode Description P. Modify Figure23 to be able to read comment P.2 Modify Figure3 to add value in Y-axis P.4 eplace Figure 36 with Figure 37 to correct mistake 22 OHM o., Ltd. ll rights reserved. Z /28 Z22-G Jan.28 ev.3

29 Notice Precaution on using OHM Products. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note ), aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( pecific pplications ), please consult with the OHM sales representative in advance. Unless otherwise agreed in writing by OHM in advance, OHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any OHM s Products for pecific pplications. (Note) Medical Equipment lassification of the pecific pplications JPN U EU HIN LⅢ LⅡb LⅢ LⅢ LⅣ LⅢ 2. OHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. he following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below. ccordingly, OHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any OHM s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including l2, H2, NH3, O2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] ealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. he Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. void applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8. onfirm that operation temperature is within the specified range described in the product specification. 9. OHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / ircuit board design. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the OHM representative in advance. For details, please refer to OHM Mounting specification Notice-P-E 25 OHM o., Ltd. ll rights reserved. ev.3

30 Precautions egarding pplication Examples and External ircuits. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. herefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. OHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic his Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for torage / ransportation. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including l2, H2, NH3, O2, and NO2 [b] the temperature or humidity exceeds those recommended by OHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under OHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. tore / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label two-dimensional barcode printed on OHM Products label is for OHM s internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign rade act ince concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign trade act, please consult with OHM in case of export. Precaution egarding Intellectual Property ights. ll information and data including but not limited to application example contained in this document is for reference only. OHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. OHM shall not have any obligations where the claims, actions or demands arising from the combination of the Products with other articles such as components, circuits, systems or external equipment (including software). 3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of OHM or any third parties with respect to the Products or the information contained in this document. Provided, however, that OHM will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to manufacture or sell products containing the Products, subject to the terms and conditions herein. Other Precaution. his document may not be reprinted or reproduced, in whole or in part, without prior written consent of OHM. 2. he Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of OHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. he proper names of companies or products described in this document are trademarks or registered trademarks of OHM, its affiliated companies or third parties. Notice-P-E 25 OHM o., Ltd. ll rights reserved. ev.3

31 Datasheet General Precaution. Before you use our Products, you are requested to carefully read this document and fully understand its contents. OHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any OHM s Products against warning, caution or note contained in this document. 2. ll information contained in this document is current as of the issuing date and subject to change without any prior notice. Before purchasing or using OHM s Products, please confirm the latest information with a OHM sales representative. 3. he information contained in this document is provided on an as is basis and OHM does not warrant that all information contained in this document is accurate and/or error-free. OHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or concerning such information. Notice WE 25 OHM o., Ltd. ll rights reserved. ev.