CURRENTLY, electronic ballasts for fluorescent lamps

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1 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY Mixed Mode Excitation and Low Cost Control IC for Electronic Ballast Hee-Seok Han, Student Member, IEEE, Tae-Ha Ryu, and Gyu-Hyeong Cho, Member, IEEE Abstract This paper introduces a gate-driven mixed mode excitation that is applicable to dimmable electronic ballasts. The proposed approach combines the characteristics of self-oscillating mode and external excitation. In the mixed mode excitation, the metal oxide semiconductor field effect transistors in an electronic ballast are turned on by the resonant current and turned off by the gate driver, which is triggered by a low voltage control integrated circuit (IC). By adjusting this triggering point, the low voltage control IC controls the switching frequency of the electronic ballast. In the electronic ballast with mixed mode excitation, filament preheating, dimming, and protection are all implemented by the low voltage control IC, which is fabricated in a 3.3-V standard CMOS process. The proposed approach allows for the realization of a low cost and high performance electronic ballast. Index Terms Dimmable electronic ballast, fluorescent lamp, gate driver, low voltage control integrated circuit (IC), mixed mode excitation. I. INTRODUCTION CURRENTLY, electronic ballasts for fluorescent lamps are widely used because electronic ballasts have some advantages like high efficiency, light weight, and absence of flicker and audible noise as compared to electromagnetic ballasts [1]. Among the various electronic ballasts driving fluorescent lamps, self-oscillating electronic ballast is one of the simplest and most cost effective [2]. With the growing need for the dimming capability in electronic ballasts so as to reduce electric energy consumption, research on self-oscillating electronic ballasts with dimming capability has recently been reported in the literature [1] [3]. In [1], the magnetizing current is changed by adjusting the voltage across the current transformer in conventional self-oscillating electronic ballast to adjust the switching frequency. In [2], a parallel current path formed by elegant passive elements is added across the gate driver for adjusting the switching frequency [3]. In [3], the saturable transformers are used for each gate driver and the operating point of the saturable transformer is changed by adjusting dc current flowing through the saturable transformers Manuscript received February 6, 2006; revised April 26, This paper was presented in part at the Power Electronics Specialists Conference, Aachen, Germany, June 20, Recommended for publication by Associate Editor R. Hui. The authors are with the Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology (KAIST), Daejeon , Korea ( stonehan@eeinfo.kaist.ac.kr; thryoo@dmbtech. com; ghcho@ee.kaist.ac.kr). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TPEL to adjust the switching frequency. These approaches for implementing dimmable self-oscillating electronic ballast are based on integrated circuit (IC)-less electronic ballast. However, the attributes demanded in a dimmable electronic ballast include wide dimming range, soft-start, a simple user-interface for dimming, lamp brightness regulation against the line voltage variation, and protective functions such as end-of-life detection and over-current detection. The need for these functions necessitates the use of an IC. The high voltage integrated circuit (HVIC), which is capable of operating from a nearly 600-V bus, is the representative example to implement external excitation. A dimmable electronic ballast with the aforementioned functions could be implemented through the use of the HVIC [4]. However the HVIC typically costs more than the gate coupling transformers it was designed to replace and much of the die area is taken up by the high voltage interface [5]. Hence, silicon-integrated ballast solutions are not widely used for the largest market segment of electronic ballasts, i.e., the low cost fluorescent lamp market sector [6]. A low voltage integrated circuit (LVIC) that is fabricated in standard CMOS process is a potential alternative solution for a low cost integrated circuit instead of the HVIC. Many manufacturers offer the foundry service of the standard CMOS process such as the 3.3-V m CMOS process and the high integration density of the CMOS process enables implementation of the many demanded functions for the electronic ballast using a small die area. However, there should be a scheme to solve the high voltage interface problem because the LVIC alone cannot drive the gates of metal oxide semiconductor field effect transistors (MOSFETs) in the electronic ballast by itself due to its low operating voltage. This paper proposes a new gate driving method termed mixed mode excitation that solves the high voltage interface problem when a LVIC is used as the control IC for the electronic ballast. For an application example of the LVIC, we implement a control IC that performs filament preheating, dimming, and over-current protection in a 3.3-V m CMOS process. The operations of the electronic ballast with mixed mode excitation and the designed LVIC are tested and verified through experiments. In addition, pulse frequency modulation to improve the crest factor in an electronic ballast with passive power factor correction (PFC) circuits is implemented using this LVIC. II. MIXED MODE EXCITED ELECTRONIC BALLAST The schematic of a typical self-oscillating electronic ballast for fluorescent lamps and its operating waveforms are shown in Fig. 1. In this scheme, the resonant current flowing through the inductor is fed back into the gates via a current transformer and converted into a voltage suitable for driving the MOSFETs /$ IEEE

2 872 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 Fig. 1. (a) Self-oscillating electronic ballast. (b) Operating waveforms. into saturation. The zener diodes not only clamp the gate voltage to ensure that the gates are not over-stressed, but also, together with the magnetizing inductance of the current transformer, provide the required phase shift to maintain the oscillation. Fig. 1(b) shows the relationship between the zener current, the resonant current, the voltage of the mid-point and the magnetizing current. Fig. 2(a) shows the schematic of a mixed mode excited electronic ballast for fluorescent lamps. It is modified from the self-oscillating electronic ballast shown Fig. 1 as has an additional secondary winding ( ) to the current transformer and extra gate drivers corresponding to the secondary windings. In the mixed mode excitation, the scheme driving the gates of MOSFETs is divided into two modes. At the instant of turning on the MOSFETs, the resonant current is fed back to the gate via a current transformer, D1 (or D2) and R1 (or R5), similar to a self-oscillating electronic ballast. However, at the instant of turning off the MOSFETs, the gate driver, which is composed of low power active components, Q1(or Q3) and Q2(or Q4), and low power passive components R2(or R6), R3(or R7), and R4(or R8), discharges the charge of the corresponding gate capacitance and sinks the current sourced by the current transformer. The LVIC triggers the gate drivers to start turning off the MOSFETs by momentarily shortening the secondary winding ( ). By adjusting this triggering point, the LVIC changes the switching frequency of the electronic ballast. In Fig. 2(b), the triggering point is. The gate driver sinks the differential current between the resonant current and the magnetizing current during the time between and. If the triggering point is after the time when the resonant current meets the magnetizing current, the switching frequency is the same as the self-oscillating frequency. Therefore, the minimum switching frequency of the Fig. 2. (a) Proposed mixed mode excited electronic ballast. (b) Operating waveforms. mixed mode excited electronic ballast is set to the same value as that of a self-oscillating electronic ballast. Fig. 3 shows the mode diagram of the gate driver and the operating waveforms of the proposed mixed mode excitation. The operation modes of the gate driver are described as follows. A. MODE1 Before M1 is turned-off, the resonant current is flowed through M1. During this time, the differential current between the resonant current and the magnetizing current of the current transformer flows through the secondary windings and. The current sourced from the flows through D1, R1, and Z1 and makes the voltage difference over. This voltage also crosses the secondary winding with opposite polarity and the current sourced from the flows through Z2, R7, and R6. However the magnitude of this current is the trivial value because the value of R6 and R7 is large. B. MODE2 If the secondary winding ( ) is shortened ( 0), the gate of M1 is discharged through R2 and R3 and, at this instant, Q1 is triggered by the voltage over R3. The pnpn structure composed of Q1 and Q2 becomes fully saturated and sinks the gate charge of M1 rapidly by positive feedback action. (The emitter of Q1 sinks the gate charge of M1. This emitter current flows through the base of Q2. The collector of Q2 sinks the base current of Q1 by the amount of the Q2 s amplified base current by a factor of the current gain of Q2. This base current of Q1 is repeatedly amplified by a factor of the current gain of Q1 and flows through the base of Q2. The emitter current of Q1 increasingly grows.) After M1 stops conducting the resonant current

3 HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 873 threshold voltage, M2 is turned on. The resonant current changes direction and flows through M2 while the body diode of M2 is turned off at this instant. In the above operations, this gate driver has three important features for dimming operation. First, a secondary winding ( ) short time of below 1 s is sufficient to trigger the pnpn structure of the gate driver in mode 2, which minimizes the burden for the driver IC. Secondly, the turn-off switching loss is reduced quite small during mode 2 owing to the fast switching operation. Especially in heavy dimming condition where the MOSFETs should be turned off at high current level, the positive feedback operation of the pnpn structure enables the gate driver to turn off the MOSFETs quickly regardless of the high resonant current. Thirdly, the pnpn structure holds the the MOSFETs off state in mode 3 during the remaining period of the positive terminal voltage at the secondary transformer. In this way, the mixed-mode electronic ballast has the capability of wide dimming range with negligible switching loss. And, the switching frequency can be varied by adjusting the triggering point. Fig. 3. (a) Mode diagram of gate driver. (b) Operating waveforms. [the drain current of M1,, is shown in Fig. 3(b)], the resonant current flows through the parasitic capacitors of M1 and M2, and then flows through the body diode of M2. C. MODE3 If the secondary winding ( ) is opened, and flow again from the secondary windings and respectively. At this instant, since Q1 and Q2 are fully saturated, flows though D1, R1, Q1, and Q2. Hence, M1 remains off-state. M2 also remains off-state because flows through Z2, R7, and R6. Until this instant, flows through the body-diode of M2. D. MODE4 Because the magnetizing current is larger than the resonant current, changes direction and turns off Q1 and Q2, and flows through Z1, R3, and R2; therefore, M1 remains off-state. The gate capacitor of M2 is charged by flowing through D2 and R5. If the gate voltage of M2 rises above the III. DESIGN PROCEDURE AND EXAMPLE The design procedure of the mixed mode excited electronic ballast can be divided into two stages. In the first stage, we design the self-oscillating electronic ballast, which includes the design of the resonant network such as a series-resonant seriesparallel-loaded (SRSPL) filter and the design of the magnetizing inductance of the current transformer for determining a self-oscillating frequency. In the second stage, we select values of the gate-driver components and add another secondary winding to the current transformer and design the low voltage control IC. The above design procedure is developed in the following four steps. Step 1) Design of the resonant network parameters: The SRSPL filter, also known as an LCC filter, is composed of a series-resonant series-loaded filter and an additional capacitor, which is parallel to the lamp in Fig. 2(a). The functions of are to provide sufficiently high voltage across the lamp during starting transient, and then a proper filament current at steady state [7]. In addition to these functions, reduces current harmonics through the lamp and improves the crest factor of the lamp current [7].However, an overly large increases the resonant current, and reduces the efficiency of the electronic ballast. As such, optimization of the resonant network parameters is an important issue in designing the electronic ballast. Several design methodologies have been proposed to optimize the resonant network parameters of the SRSPL filter. However, the existence of makes it difficult to optimize these parameters. Recently, an improved design methodology for the determination of these parameters has been presented in the literature [8]. The detailed procedure to determine these parameters is omitted here and instead the designed parameters from that study [8] are given as an example.

4 874 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 Step 2) Determination of the magnetizing inductance : In mixed mode excitation, the lowest switching frequency is determined by the self-oscillating operation, in which there is no triggering by the LVIC. If the lamp power at the lowest switching frequency is above the rated lamp power, the lamp power is adjusted to be the same as or below the rated lamp power by the trigger operation of the LVIC. As such, the self-oscillating frequency can be chosen freely. For a given self-oscillating frequency and the resonant network, determination of the magnetizing inductance is not straightforward. The concrete analysis of the self-oscillating electronic ballasts presented in the literature [9] is too intricate to be used to design the magnetizing inductance. On other hand, the simple determination method outlined in the literature [1] gives the closed-form of the relation between the magnetizing inductance and the self-oscillating frequency and the resonant network parameters. Even though this simple method is not sufficient to guarantee the self-oscillation, it can give an approximate value of the magnetizing inductance TABLE I INPUT DATA AND RESONANT NETWORK PARAMETERS TABLE II GATE DRIVER PARAMETERS (1) where 1, 1 1, 1, VDC 2V,, is the number of turns of the primary side, and is the number of the turns of the secondary side of the current transformer. whose value is 13 V is the summation of the zener voltage (12 V) of Z1 and the forward voltage drop of D1 and voltage drop of R1 in Fig. 2(a). For 2T, 13 T, and the given parameters in Table I, the estimated value of is 988 H. After a Pspice simulation of the self-oscillating operation, is tuned to 845 H. Step 3) Selection of the values of the gate driver components: The selection of the resistors is essential in the design of the gate driver. R1 (or R5) prevents the driving waveform at the gate of the M1 (or M2) from ringing. The main function of R2 (or R6) and R3 (or R7) is to trigger Q1 (or Q3) at the instant of turning off M1 (or M2). The summation of the values of R2 and R3 should be large enough that the forward current of Z1 is trivial at the instant of turn-on of M2. The value of R4 (or R8) determines the triggering threshold level of Q2 (or Q4). These values are selected by several experiments and are summarized in Table II. Step 4) Design of the interface with LVIC: The operating supply voltage of the LVIC is 3.3 V. The turn ratio between the additional secondary winding ( ) connected with the LVIC and the primary winding ( ) is determined by this operating voltage. The maximum voltage over the primary winding is 2 V, because the maximum voltage over the secondary winding ( or ) is limited to approximately 13 V by the zener diode. Therefore, the turns of should be designed to 3 T for safe operation of the LVIC. The above designed mixed mode excitation is verified by a Pspice simulation. A switch in the LVIC in Fig. 2(a) is modeled by the switch S1 in Fig. 4. The on-resistance of S1 should be as small as 1 so that S1 sufficiently shortens the secondary winding (CT4). The switch S2 in Fig. 4 provides CT4 of the current transformer with current for a short time, approximately 5 s, for the start-up of the electronic ballast. This switch, which should have an on-resistance below 10, is also embedded in the LVIC. From the simulation waveforms in Fig. 5, the self-oscillating frequency is determined to be 43 khz before the stimulation of the control signal for switch S1. The control signal for switch S1 is generated for each half-period of the switching frequency of the electronic ballast, 62.5 khz in Fig. 5. IV. LOW VOLTAGE CONTROL IC Fig. 6 shows a block diagram of the control IC applicable to the proposed mixed-mode excitation. The control IC performs filament preheating and dimming by adjusting the switching frequency, including under voltage lock out (UVLO) and over current protection. The control IC shortens the secondary winding ( ), in Fig. 2(a), for a short time by the half period of the switching frequency. For this operation, there is a pulse generator in the control IC. The voltage of, which is a saw-tooth

5 HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 875 Fig. 4. Simulated schematic for mixed-mode excitation. Fig. 7 shows a schematic of the pulse generator in the control IC. Control signals C1 and C2 from the operating mode selector in the control IC switch the current charging. The voltage of is compared with an internal reference voltage ( ). Thus, the relationship between the current ( ) charging and the switching frequency of the electronic ballast is (2) Fig. 5. Simulation results. wave, is reset by the edge of the drain voltage of M2 in Fig. 2(a). The drain voltage is scaled down and inputted to the CK node in the control IC, thereby synchronizing the outputs of the control IC to the edge of the drain voltage of M2. Furthermore, although the SRSPL resonant inverter has a high-resonant frequency before the ionization and drops to a relatively low-resonant frequency after the ionization, the switching frequency is always higher than the resonant frequency for zero voltage switching (ZVS) operation, because the self-oscillating characteristic of the mixed-mode excitation guarantees ZVS operation. Two different switching frequencies for filament preheating and dimming are set by currents through and, respectively. The duration of filament preheating is set by, which is connected to the CT node in the control IC. The pulse generator in the IC is fed with current

6 876 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 Fig. 6. Block diagram of the control IC. Fig. 7. Schematic of the pulse generator. Fig. 9. Schematic of driver and operating waveform. Fig. 8. Operating mode and switching frequency. through the in the preheating mode. In the ionization mode, it is fed with no current, which means that the electronic ballast operates as a self-oscillating electronic ballast, and in the dimming mode it is fed with current through the. Therefore, there are three operating modes in the control IC. Fig. 8 shows the relationships between the operating mode and switching frequency. The structure of the driver in the control IC is designed to directly connect the control IC with the transformer. The one node voltage of the secondary winding ( ) of the current transformer has a positive value and a negative value for another node Fig. 10. Trigger operation. of by each half period. However, the operating voltage of the control IC has only a positive value. Hence, the negative

7 HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 877 Fig. 11. Experimental schematic of the mixed mode excited electronic ballast. Fig. 14. Experimental waveforms in the start-up. Ch 3: Mid-point voltage of MOSFETS (100 V/div) Ch 4: lamp current [10 ma/div for (a), 20 ma/div for (b)]. Fig. 12. Photograph of the designed LVIC. Fig. 15. Experimental waveforms of an operation of the mixed mode excitation operation. Fig. 13. Experimental waveform of an operation of the initial trigger operation. voltage of the transformer damages the control IC. The structure of the driver in Fig. 9 solves this problem using a CK signal to connect the lower voltage node of the transformer with the ground for each half period. The on-resistance of MOSFET S1 is 0.36 and the size of this switch is calculated by where 63 A V, gate-source voltage 3.3 V, and the threshold voltage 0.7 V. (3) Fig. 16. (a) Dimming range. (b) Dimming efficiency. The width/length ( ) ratio of S1 is 6000 m/0.35 m. The structure of the driver enables the control IC to trigger the electronic ballast by itself, and thus there is no need for an extra triggering circuit composed of a diac, diode, resistor, and capacitor in Fig. 1(a). The operation of the initial trigger is illustrated in Fig. 10. At the triggering instant, only MOSFETs S2 and S3 in the driver circuit are conducted for roughly 5 s, which is equal to approximately the half period of the switching frequency in

8 878 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 Fig. 17. Passive PFC electronic ballast with PFM function. TABLE III MEASURED POWER FACTOR AND CREST FACTOR Fig. 18. Experimental waveforms of PFM operation. the preheating mode. During this time, pulse current measuring about 300 ma flows into the secondary winding. The on-resistances of S2 and S3 are 1.5 and 1.4, respectively. V. EXPERIMENTAL RESULTS An experimental prototype of the electronic ballast for a 40-W fluorescent lamp has been built in order to verify the operation of the switching frequency variation in the proposed mixed mode excitation. In Fig. 11, and supply quiescent current to the control IC during under-voltage lock out (UVLO), and supplies sufficient current to the IC during the normal operating mode. There is no zener diode for the LVIC power supply. The leakage current of the 3.3 V zener diode is about 6 ma, which is much larger than the steady state current of the LVIC (350 A). Because the zener diode is inefficient, it is replaced with an internal regulator, which is Reg. block shown in Fig. 6 and maintains a VDD node voltage of LVIC, or 3.3 V. Fig. 12 shows a photograph of the control IC designed using a Hynix 0.35 m CMOS process for a 3.3 V application. Its core size is 0.45 mm 0.45 mm. Fig. 13 shows the experimental waveform at the instant of the initial trigger. The figure shows that the duration of the trigger pulse is about 5 s. Fig. 14 shows the experimental waveforms in the start-up. Employing switching frequency control ( 62 khz), the filament is preheated until the lamp is ionized, after 700 ms or more. The filament temperature is increased as the filament preheats. The lamp current is about 10 marms before ionization. The ionization voltage is as low as roughly 300 V due to filament preheating. This reduced voltage serves to lengthen the lamp life. Fig. 15 shows the experimental waveforms during operation of the mixed mode excitation dimmed down from maximum power to minimum power. Because the switching frequency is

9 HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 879 Fig. 19. Photograph of the implemented mixed-mode electronic ballast. always higher than the resonant frequency in the ZVS operation, as the switching frequency is increased the output power decreases accordingly. In this experiment, by adjusting the switching frequency from 42 to 75 khz, the output power is dimmed from 40 W to 1 W, which is about 2.5% of the rated lamp power. The efficiency of the electronic ballast with mixed-mode excitation in dimming operation is shown in Fig. 16(b). In comparison with the results presented in the literature [8], where the parameters of the resonant network and the rated power of the lamp are the same as those in the experiment, the decreased slope of efficiency in the present work is smoother [8]. This can apparently be attributed to the low switching loss by the fast switching gate driver, with which the turn-off time of each switch is below 50 ns, even for heavy dimming operation. As an application example of the electronic ballast with mixed-mode excitation, the electronic ballast employing a passive high power-factor correction (PFC) circuit [10] is implemented and tested. In addition, to improve the crest factor in the electronic ballast with passive PFC, pulse frequency modulation (PFM) [11] is implemented using the designed LVIC and tested (see Fig. 17). The sensed dc bus voltage by and is inputted to the DM node in the LVIC through. Thus, as the dc bus voltage increases, the switching frequency of the electronic ballast becomes higher. In Fig. 18, experimental waveforms for the passive PFC without PFM and the passive PFC with PFM are compared while varying the ac supply voltage by 10% of its nominal voltage (220 Vrms) (see Fig. 19). The measured power factor and crest factor are summarized in Table III. VI. DISCUSSION The characteristics of the mixed mode excitation using LVIC are summarized below and compared with the external excitation using a HVIC. A. Small Chip Area and Low Cost Control IC The chip area of the LVIC is as small as a few-tenths of the HVIC, as it has no high voltage interface and no internal gate driver having the capability driving large current. As such, it is cost effective. Also, the current consumption of the LVIC is onethirtieth part of that of the HVIC (as compared with IR21592). Because a low voltage process has higher integration density than a high voltage process, the LVIC is adequate for implementation of a control IC with a novel control scheme such as a digital control [12]. B. Absence of Need of Phase Control For ZVS operation, the switching frequency of an electronic ballast should always be higher than the resonant frequency of the resonant network. In external excitation, the phase control is used to guarantee this condition by monitoring the resonant current. This complicates the design of the control IC. In mixed mode excitation, the minimum switching frequency is set by the self-oscillating operation, which guarantees the ZVS operation. Hence, there is no need to implement a phase control block in the control IC. C. Inherent no Lamp Protection If there are fault conditions such as failure of a lamp to strike or no lamp, the operation of the electronic ballast should be stopped by the control IC in external excitation. However, in mixed mode excitation, if these fault conditions occur, the operation of the electronic ballast is automatically stopped because the MOSFETs are turned on by the resonant current [13] [18]. VII. CONCLUSION A mixed mode excitation with a mixed structure having advantages of both self-excitation and external excitation has been proposed for controlling switching frequency. A control IC applicable to this method has also been designed, using a m CMOS process for 3.3-V application. The operation of the control IC has been verified by experiments. The electronic ballast with mixed mode excitation displayed a wide dimming range from 100% to 2.5%. A PFM was also implemented and tested using the designed control IC and only a few passive elements. From the characteristics of a mixed mode excitation, it has important advantages in comparison with external excitation, although the cost of the current transformer must be considered. REFERENCES [1] A. R. Seidel, F. E. Bisogno, H. Pinheiro, and R. N. do Prado, Selfoscillating dimmable electronic ballast, IEEE Trans. Ind. Electron., vol. 50, no. 6, pp , Dec [2] F. Tao, Q. Zhao, F. C. Lee, and N. Onishi, Self-oscillating electronic ballast with dimming control, in Proc. Power Electron. Spec. Conf., 2001, vol. 4, pp [3] S. S. M. Chan, H. S. H. Chung, and S. Y. (Ron) Hui, Design and analysis of an IC-less self-oscillating series resonant inverter for dimmable electronic ballasts, IEEE Trans. Power Electron., vol. 20, no. 6, pp , Nov [4] J. Adams, T. J. Ribarich, and J. J. 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10 880 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 [5] L. R. Nerone, A complementary class D converter, in Proc. Ind. Appl. Conf., 1998, vol. 3, pp [6] M. Radecker and F. Dawson, Ballast-on-a-chip: Realistic expectation or technical delusion?, IEEE Ind. Appl. Mag., vol. 10, no. 1, pp , Jan./Feb [7] C. S. Moo, H. L. Cheng, H. N. Chen, and H. C. Yen, Designing dimmable electronic ballast with frequency control, in Proc. Appl. Power Electron. Conf., 1999, vol. 2, pp [8] F. T. Wakabayashi and C. A. Canesin, An improved design procedure for LCC resonant filter of dimmable electronic ballasts for fluorescent lamps, based on lamp model, IEEE Trans. Power Electron., vol. 20, no. 5, pp , Sep [9] C. Chang, J. Chang, and G. W. Bruning, Analysis of the self-oscillating series resonant inverter for electronic ballasts, IEEE Trans. Power Electron., vol. 14, no. 3, pp , May [10] G. Chae, Y. S. Youn, and G. H. Cho, High power factor correction circuit for low-cost electronic ballasts, Electron. Lett., vol. 33, no. 11, pp , May [11] J. Song, J.-H. Song, I. Choy, and J.-Y. Choi, Improving crest factor of electronic ballast-fed fluorescent lamp current using pulse frequency modulation, IEEE Trans. Ind. Electron., vol. 48, no. 5, pp , Oct [12] Y. Yin, M. Shirazi, and R. Zane, Fully integrated ballast controller with digital phase control, in Proc. Appl. Power Electron. Conf. Expo, 2005, vol. 2, pp [13] Y.-S. Youn, T.-H. Ryoo, and G.-H. Cho, Fast switching gate driver for self-resonant inverters applicable to electronic ballasts, Electron. Lett., vol. 34, no. 9, pp , Apr [14] L. R. Nerone, A mathematical model of the class D converter for compact fluorescent ballasts, IEEE Trans. Power Electron., vol. 10, no. 6, pp , Nov [15] T. J. Ribarich and J. J. Ribarich, A new control method for dimmable high-frequency electronic ballasts, in Proc. Ind. Appl. Conf., 1998, vol. 3, pp [16] L. R. Nerone, A novel MOSFET gate driver for the complementary class D converter, in Proc. Appl. Power Electron. Conf., 1999, vol. 2, pp [17] H.-S. Han, T.-H. Ryu, and G.-H. Cho, A control IC for electronic ballast with mixed mode excitation, in Proc. Power Electron. Spec. Conf., 2004, vol. 3, pp [18] R.-L. Lin and Y.-T. Chen, Phase-locked-loop-control-based electronic ballast for fluorescent lamps, in Proc. Elect. Power Appl., 2005, pp Hee-Seok Han (S 04) received the B.S. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, in 2000 and 2002, respectively, where he is currently pursuing the Ph.D. degree. His research interests are in the areas of power electronics and integrated circuits (ICs) including control, analysis, and design of electronic ballast and its control IC. Tae-Ha Ryoo received the M.S. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, in 1997, where he is currently pursuing the Ph.D. degree. He founded DMB Technology Co., Ltd. in This company serves power management IC solutions. His research interests are in the areas of mobile and display power management IC design. Gyu-Hyeong Cho (S 76 M 80) received the Ph.D. degree in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, in He is now with the Department of Electrical Engineering, KAIST, as a Professor. From 1982 to 1983, he was with the Electronic Technology Division, Westinghouse R&D Center, Pittsburgh, PA, where he worked on high power UFCs and Inverters. He was a Visiting Professor at the University of Wisconsin, Madison, in He joined the Department of Electrical Engineering, KAIST in 1984 as an Assistant Professor. His past research interests were in the area of Power Electronics such as static power converters, inverters, and resonant converters until His recent research interests are in the area of analog integrated circuits, especially, smart power circuits merging power devices, and control circuits in one chip such as single chip dc dc converters. He is also interested in the display drivers for LCD and OLED using CMOS technology.