A New Power Factor Correction and Ballast Control IC

Transcription

1 A New Power Fact Crection Ballast Control IC Thomas J. Ribarich International Rectifier 33 Kansas St., El Segundo, CA, 95-3 tel. (3)7-7, fax. (3)7-, as presented to the IEEE Industry Applications Society Abstract: A new control IC has been developed which includes active power fact crection, ballast control, a V halfbridge driver output. An improved control method has also been developed f power fact crection using a modulation technique to achieve low harmonic disttion. This new control IC has the following electronic ballast system implications: ) Single-chip electronic ballast solution ) Multi-lamp capability 3) Universal Input ) Low THD high PF 5) Regulated DC bus voltage ) No current-sensing resist required 7) Single +5V supply voltage ) Reduction of IC supply current 9) End-Of-Life protection ) Complete lamp fault protection ) Reduction of PCB interconnects IC pin requirements ) Reduction of ballast component count The result is a high-perfmance complete ballast solution with a significant cost reduction. A complete non-dimming ballast has been built that incpates this new integrated circuit verifies all of these features. Most electronic ballasts f fluescent lighting on the market today incpate a two-stage architecture consisting of a boost converter running in critical-conduction mode f sinusoidal input current a regulated DC bus, a half-bridge driven resonant output stage f lamp control (Figure ). Figure, Typical two-stage ballast architecture This architecture is typically controlled using a multi-chip solution that can contain up to three control ICs (Figure ). These include a power fact crection () control IC, a ballast control IC ASIC, a half-bridge driver IC. +5V +5V +5V I. INTRODUCTION IC ASIC Half-Bridge Driver IC The purpose of this paper is to present a new control IC which includes both power fact crection ballast control. By combining these functions into a single IC the ballast system can be greatly simplified. II. OVERVIEW Figure, Typical multi-chip ballast solution The new control IC is a combination of these functions into a single IC (Figure 3). This new IC contains the necessary functions f two independent control blocks including control f regulating the line input current ballast control f driving the fluescent lamp. F this new IC to be commercially attractive to

2 the electronic ballast market, the complete system cost must be the same lower than existing multi-chip solutions. To meet this requirement, a simplified control method has been developed which needs less silicon area, fewer external control pins fewer external components. L N GND L C RV C BR C3 R R R R R5 R7 C5 L D 7 C C7 MC3 3 5 R R9 M D C R3 C R Figure, Existing -pin solution +5V + Ballast + Half-Bridge Control IC Figure 3, New single-chip ballast solution III. SIMPLIFIED CONTROL Existing critical-conduction mode ICs compare the source current of the boost MOSFET against a threshold f controlling the on-time of the boost MOSFET. This on-time threshold is determined by the product of the instantaneous rectified line voltage the err from the DC bus regulation. When the source current measured by a current sensing resist exceeds the on-time threshold, the boost MOSFET turns off. The MOSFET remains off until the induct current discharges to zero, as detected by a secondary winding on the boost induct. At this time, the MOSFET turns on again the cycle repeats itself. The result is a free-running frequency with the lowest frequency maximum current occuring at the peak of the AC line input, the highest frequency minimum current occuring at the zero-crossings. This solution requires an external current-sensing resist, an external voltage divider netwk an internal multiplier (Figure ). The new simplified control method is based on a constant on-time approach where the err between the DC bus measurement a fixed reference voltage determines the on-time of the boost MOSFET. The off-time is also achieved using a secondary winding to detect the zerocrossing of the induct current. The result is a much simpler solution which does not require an external current-sensing resist, an external voltage divider netwk from the rectified line, n an internal multiplier (Figure 5). The total IC control pin requirement (not including VCC GND) is also reduced from six with existing ICs to four with the improved method. L N GND L C RV C BR Figure 5, Simplified -pin solution C3 R R R5 C5 3 L IR This constant on-time approach gives a high power fact good DC bus regulation over a wide input voltage range. The harmonic disttion of the line current, however, can exceed the limits given in the international stards nms f electronic ballasts. The main cause of harmonic disttion is due to cross-over disttion of the line current at the zero-crossings of the line voltage. To reduce this, an additional on-time modulation has been included which increases the on-time during the zero-crossings of the AC line input voltage (Figure ). 7 5 D C C7 R R9 M D C

3 f Start I L frequency f PH f Run f min pin 5V t V CPH ZX pin near peak region of rectified AC line near zero crossing region of rectified AC line Figure, On-time modulation near zero crossing region V RPH V V V RUN IV. BALLAST CONTROL The ballast control section includes a flexible oscillat f programming each ballast operating frequency, ballast lamp fault logic, endof-life detection logic (Figure 7). Programmable Inputs Oscillat Preheat Timing UVLO High - Low-Side Driver Over-Temp Half -Bridge Driver Outputs Preheat mode Figure, Ballast control sequence. Ignition Ramp mode Run mode V. IR7 SINGLE-CHIP SOLUTION The combination of all of the functions into a single chip allows f precise control of certain blocks depending on which mode the ballast is in. The section is enabled, disabled dynamically adjusted internally (Figure 9) as determined by the state machine of the ballast control section. Low AC Line Fault Logic End -of-life Over -Current Lamp Out EOL Programmable Inputs Oscillat Preheat Timing High Low-Side Driver Half-Bridge Driver Outputs Figure 7, Ballast control section block diagram UVLO Over-Temp The ballast control sequence is best described by plotting the output frequency versus time (Figure ). At initial start-up, the output frequency begins at a high-frequency ramps quickly to the programmed preheat frequency. This internal soft-start prevents any flash from occuring across the lamp. The frequency then remains at the preheat frequency f the duration of the preheat time befe ramping down to the minimum frequency f ignition. If necessary, the frequency can then be programmed to a higher run frequency once RUN mode has been reached. Low AC Line Driver Output Zero-Crossing DC Bus Sensing Compensation Control Fault Logic End-of-Life Figure 9, IR7 Ballast+ IC block diagram. Over-Current Lamp Out The state machine (Figure ) includes UVLO, Preheat, Ignition, Run Fault modes. Several conditions must first be met in der to transition to each mode. Also, different protection blocks are activated at different times depending on which mode the ballast is in. The assymmetrical end-of-life protection, f example, is not activated until run mode to avoid a false detection during preheat ignition. The is also dynamically adjusted depending on the ballast mode. The gain of the regulation EOL

4 L C RV C BR C3 L M D R C R R R3 RT R5 COC ROC C5 CPH CRAMP CT RRUN CCOMP RPH RDT R7 R VDC CPH RPH RT RUN CT DT OC ZX C3 HO VS VB VCC COM LO CS EOL VBUS C7 R C D C9 R9 R C D5 M M3 R RCS D C D3 R C D7 C3 R3 R R5 D L3 R C loop is increased initially f a sht quick start mode to increase the DC bus quickly, then increased again during ignition to reduce transients on the DC bus, then decreased during run mode f high power fact low harmonic disttion. IR7 control IC, a half-bridge driven resonant output stage. L N 9 R SUPPLY FAULT Mode Fault Latch Set / -Bridge Off Off COMP=V I QCC 5µA CPH = V VCC = 5.V SD >.V (Lamp Removal) VCC < 9.5V (Power Turned Off) T J > C (Over-Temperature) CS > OC Threshold (Failure to Strike Lamp Hard Switching) T J > C (Over-Temperature) CS > OC Threshold (Over-Current Hard Switching) CS <.V (No-Load Below Resonance) T J > C (Over-Temperature) SD < V SD > 3V (End-of-Life) Power Turned On UVLO Mode /-Bridge Off Off COMP=V I QCC 5µA CPH = V PREHEAT Mode / f PH Enabled IGNITION RAMP Mode f PH ramps to f MIN CPH I PH = µa RPH = Open Circuit RUN = Open Circuit CS OC Threshold Enabled RUN Mode VCC >.V (UV+) VDC > 5.V (Bus OK) SD < 3.V (Lamp OK) T J < C (T jmax ) CPH I PH = µa RPH = V RUN = Open Circuit CS Disabled CPH > 5.V f MIN Ramps to f RUN CPH Charges to V Clamp RPH = Open Circuit RUN = V CS.V Threshold Enabled CPH >.V (End of PREHEAT Mode) (End of IGNITION RAMP) SD.V 3.V Thresholds Enabled VCC < 9.5V ( VDC < 3.V SD >.V GND Note: Thick traces represent high-frequency, high-current paths. Lead lengths should be minimized to avoid high-frequency noise problems Figure, IR7 Ballast Schematic. The PCB layout (Figure ) is greatly simplified with the new control IC. The IC pin locations have been selected f an optimum single-layer PCB board. Also, because the solution does not require a current sense resist, the layout is less critical as the MOSFET can be placed away from the IC COMP IR Figure, IR7 state diagram VI. BALLAST DESIGN A fully-functional electronic ballast that incpates the new control IC has been designed to the following specifications: Ballast Type: T5 Universal Input Lamp Type: 35W/T5 Input Power: ///35W Input Voltage: 9 to 5VAC Input Frequency: /5/Hz Power Fact: >.95 THD: < 5% DC Bus: VDC+/-5% Ignition Voltage: KVpp Run Frequency: khz Non-strike protection: yes Open filament(s) protection: yes End-of-Life protection: yes Over-temperature protection: yes Automatic restart: yes Figure, IR7 Ballast PCB Layout. VII. RESULTS The ballast incpating the new control IC was then evaluated f perfmance. The results verify (Figures 3 thru ) a high power fact, low harmonics a well regulated DC Bus over the line input voltage range. Also, good lamp control perfmance f preheat, ignition running is also achieved as well as complete lamp fault protection. The ballast schematic includes (Figure ) an EMI filter, a rectifier, a boost circuit, the

5 Figure 3, LO (upper) gate drive signals. Figure 7, Line input voltage current (Vin=75VAC). Figure, Half-Bridge (upper) CS wavefms Line Input Voltage [VAC] Figure, Line voltage versus DC bus voltage Figure 5, Filament voltage during preheat Line Input Voltage [VAC] Figure 9, Line voltage versus power fact. Figure, Lamp voltage during a non-strike. 9 9 Line Input Voltage [VAC] Figure, Line voltage versus DC bus voltage.

6 VIII. CONCLUSIONS A new control IC has been developed which incpates all of the necessary ballast functions. An improved control method has been developed which gives good perfmance with a low component count. The complete ballast system which incpates the new control IC is easier to manufacture, has a higher reliability is reduced in cost. IX. REFERENCES [] Elenbaas, W., ed., Fluescent Lamps, Second Edition, Philips Technical Library, Eindhoven, The Netherls 97. [] Paul R. Gray, Robert G. Meyer, Analysis Design of Analog Integrated Circuits. Canada: John Wiley & Sons, Inc., 9. [3] T. Ribarich, J. Ribarich, A New Model f High-Frequency Ballast Design, in IEEE-IAS Conf. Rec., 997, pp [] T. Ribarich, J. Ribarich, A New High- Frequency Fluescent Lamp Model, in IEEE-IAS Conf. Rec., 99. [5] International Rectifier, IR7 Ballast Control IC, Data Sheet,.