THCV219 / THCV220 Evaluation

Transcription

1 THCV / THCV0 Evaluation Kit V-by-One HS Single Link Evaluation Board Parts Number: THEVA-V, THEVA0-V. General Description THEVA-V and THEVA0-V boards are designed to support video data transmission between the host and display. One high-speed lane can carry up to bits data and bits of synchronizing signals at a pixel clock frequency from.mhz to MHz. Table Available Frequency Width Link TTL Cloc ck Freq. bit Si/So 0MHz to 00MHz bit Si/So.MHz to MHz. Features Color Depth Selectable : bits / bits Single Link AC Coupling for High-speed Lines Single Power Supply V-by-One HS Standardd Version. Compliant. Overview (a) THEVA-V (b) THEVA0-V Figure THEVA-V and THEVA0-V Top Side View (a) THEVA-V (b) THEVA0-V Figure THEVA-V and THEVA0-V Bottom Side View /

2 . Power Supply Setup This chapter shows power supply condition. Caution: Please check if there is no power- short on below red trace before supplying any power..v Power Supply to Each Board Each evaluation board requires.v power supply. Please use CON connector typically. (a)theva-v (b)theva0-v Figure Power Supply for Evaluation Board Power Supply from / to Connector.V power supply can be connected to Header and CON by using W, W and Wsolder jumper. THEVA-V W: Connect the.v power supply with pin#, and of Header. W: Connect the.v power supply with pin# and of CON. W: Connect the.v power supply with pin# and of CON. W (a)theva-v (Top Side) (b) THEVA-V (Bottom Side) Figure THEVA-V Power Supply from / to Each Connector /

3 THEVA0-V W: Connect the.v power supply with pin#, and of Header. W: Connect the.v power supply with pin# and of CON. W: Connect the.v power supply with pin# and of CON. W (a)theva0-v (Top Side) (b) THEVA0-V (Bottom Side) Figure THEVA0-V Power Supply from / to Each Connector. V-by-One HS Input / Output Connector Select V-by-One HS input / output connector can be selected by using 0ohm resistors. () mm Pitch Connector (Default Setting) Please mount / unmount following 0ohm resistors to use mm pitch connector. Table Resistor Setting for mm Pitch Connector Mount Unmount THEVA-V R, R,, R0 R, R, R, R THEVA0-V R, R, R0, R R, R, R, R (a)theva-v (Top Side) (b)theva0-v (Top Side) Figure Resistor Mounting for mm Pitch Connector /

4 () 0.mm Pitch Connector Please mount / unmount following 0ohm resistors to use 0.mm pitch connector. Table Resistor Setting for 0.mm Pitch Connector Mount Unmount THEVA-V R, R, R, R R, R,, R0, R, R THEVA0-V R, R, R, R R, R, R0, R, R, R (a)theva-v (Bottom Side) (b)theva0-v (Bottom Side) Figure Resistor Mounting for 0.mm Pitch Connector () SMA Connector Please mount / unmount following 0ohm resistors to use SMA connector. *HT and signals don t have the connection from / to SMA connector. Table Resistor Setting for SMA Connector Mount Unmount THEVA-V R, R, R, R R, R,, R0 THEVA0-V R, R, R, R R, R, R0, R (a)theva-v (Bottom Side) (b)theva0-v (Bottom Side) Figure Resistor Mounting for SMA Connector /

5 . Function Setting Setting pin of each boards is shown in yellow area of Figure. Pin# of each HEADER is connected to IC s setting pin. Each setting pin s high or low setting can set by connecting pin# of HEADER and high level or low level. Figure Position of Function Setting Pin (a)header Description (b)high Level Setting (c)low Level Setting Figure 0 High / Low Setting Description. Clock Input from SMA Connector THEVA-V can also choose the TTL clock input from SMA connector by using 0ohm resistor. If you want to use SMA connector for clock input, please change the 0ohm resistor mount from R to R. Figure TTL Clock Input Connector Select /

6 . Status Indicate LED The following table shows indicating status of each LED. Table LED Description D D THEVA-V THEVA0-V.V Power Supply Indicator Status Indicator. Sharing and HT Omission LOCK Sharing connection can be shared with V-by-One HS trace. When you share the signal, Please mount k ohm resistors to share the signal, and unmount 0ohm resistors shown in Figure. (a)theva-v (Top View) (b)theva0-v (Top View) (c) THEVA-V (Bottom Side) (d) THEVA0-V (Bottom Side) Figure Sharing /

7 HT Signal Omission HT signal can be omitted by using k ohm resistor. When you omit the HT signal, Please mount k ohm resistors to pull down the HT signal at transmitter side, and unmount the 0ohm resistors shown in Figure. When the HT omission using, HT output from receiver side is open connection. (a)theva-v (Top Side) (b)theva0-v (Top Side) (c)theva-v (Bottom Side) (d)theva0-v (Bottom Side) Figure HT Omission /

8 0. Function This chapter shows function setting of THEVA-V and THEVA0-V. Table THEVA-V Function Setting Description Silk Symbol Function PRE PRE CMLDRV CMLDRV ASYNDE ASYNDE Frequency range setting. H: Low Frequency Operation L: Normal Operation Data width setting. H : bit L : bit Power down input. H: Normal Operation L: Power Down Mode Pre-Emphasis level select input. H : Pre-Emphasis Enable L : Pre-Emphasis Disable CML outputs drive strength select input. H : Normal Drive Strength L : Weak Drive Strength Input clock triggering edge select input for latching input data H: Rising Edge L: Falling Edge Field- entry. H : Field Operation L : Normal Operation Asynchronous DE input. H: Normal Operation (ASYNDE Function Disable) L: DE Input Invert Operation (ASYNDE Function Enable) Table THEVA0-V Function Setting Description Silk Symbol Function TTLDRV TTLDRV OE LATEN OE LATEN Frequency range setting. H: Low Frequency Operation L: Normal Operation Data width setting. H : bit L : bit Power down input. H: Normal Operation L: Power Down Mode TTL outputs drive strength select input. H : Normal Drive Strength L : Weak Drive Strength Output Enable input. H: All CMOS Outputs Enabled L: All CMOS Outputs Disabled, except for, HT Output clock triggering edge select input H: Rising Edge L: Falling Edge Latch select input under Field- operation H : Latched Result L : NOT Latched Result Field- entry. H : Field Operation L : Normal Operation /

9 /. Schematic Figure THEVA-V Schematic D D C C B B A A Title Number Revision Size A Date: 0/0/ Sheet of File: \\..\THCV.SchDoc Drawn By: THEVA-V.00 0.uF C 0.uF C 0.uF C 0.uF C 0.uF C.uF C 0.uF C0 0.uF C 0.uF C 0.uF C ASYNDE R R R R R 0 G G G G G G B B 0 B B B B HSYNC VSYNC DE R 0 R G G B B CONT R0 R G0 0 G B0 B CLKIN CONT TEST PRE 0 A TEST CAPOUT CAPINP CAPINA TXP TXN 0 HT CMLDRV EXP IC THCV -(NC) CON 0uF C VDD. SML-0MT D R VDD. MPZ0RA L Inductor 0uF C VDD. MPZ0RA L Inductor 0uF C G B B B B B B R R R R R R R G G G G G B0 B B B R0 R G0 G G TEST CONT CONT CLKIN PRE TEST CMLDRV HT ASYNDE HSYNC VSYNC DE G TXP TXN 0.uF C 0.uF C A HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header PRE CMLDRV ASYNDE PCN0-P-.DSA_LEFT(NC) Header VDD. R0 R R R G G B B B B B B HSYNC VSYNC DE G R R R R R G G G G G CLKIN_CON G0 G B0 B B B CONT CONT 0kΩ R 0kΩ R kω(nc) R kω(nc) R TXN_C TXP_C HT R TXN_C TXP_C -(NC) 0 CON R R0 VDD. (NC) (NC) R0 R R VDD. VDD. TEST TEST VDD. (NC) R HT TXN_C TXP_C (NC) R (NC) R (NC) R VDD. 0 CN-FFC(0.)PD(NC) CON SMA0-T(NC) SMA (NC) R CLKIN_CON R CLKIN CLKIN_SMA SMA0-T(NC) SMA TXN_A TXP_A TXN_A TXP_A SMA0-T(NC) SMA U SSMKFS VDD. R D SML-0MT A Bottom Side (NC) R (NC) R Solder Jumper W Solder Jumper W Solder Jumper W Bottom Side

10 0/ Figure THEVA0-V Schematic D D C C B B A A Title Number Revision Size A Date: 0/0/ Sheet of File: \\..\THCV0.SchDoc Drawn By: THEVA0-V.00 -(NC) CON 0uF C VDD. SML-0MT D R VDD. MPZ0RA L Inductor 0uF C VDD. MPZ0RA L Inductor 0uF C HT HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header OE TTLDRV LATEN kω(nc) R RXN_C RXP_C R HT RXN_C RXP_C -(NC) 0 CON R R0 R VDD. (NC) (NC) R0 R R VDD. VDD. TEST TEST VDD. (NC) R HT RXN_C RXP_C (NC) R (NC) R (NC) R VDD. 0 CN-FFC(0.)PD(NC) CON SMA0-T(NC) SMA RXN_A RXP_A SMA0-T(NC) SMA OE CONT B B0 G G0 R 0 R0 CONT B B G G R R 0 DE VSYNC HSYNC B B B B CLKOUT 0 B B G G G G G G 0 R R R R R TEST HT 0 A TEST CAPOUT CAPINA RXN RXP LATEN 0 OUT TTLDRV EXP IC THCV0 0.uF C 0.uF C0 0.uF C 0.uF C 0.uF C 0.uF C 0.uF C 0.uF C LATEN OUT TTLDRV B B B B B B R R G HSYNC VSYNC DE CLKOUT RXN RXP OE CONT B B0 G G0 R R0 B CONT B G TEST R R R R R G G G G G G 0.uF C.uF C A PCN0-P-.DSA_RIGHT(NC) Header R0_C R_C R_C R_C G_C G_C VSYNC_C DE_C G_C R_C R_C R_C R_C R_C _C G_C G_C G_C G_C G_C CLKOUT_C G0_C G_C CONT_C B_C B_C B_C B_C B_C B_C HSYNC_C B0_C B_C B_C B_C CONT_C VDD. R0 R G VSYNC R R R G G G G0 CONT B B B B B B HSYNC B0 B B B CONT R R R R G G G G G R DE R R R R R R R0 R R R R R R R R R R R R R0 R R R R R R R R R0 R CLKOUT R R0_C R_C G_C VSYNC_C R_C R_C R_C G_C G_C G_C G0_C CONT_C B_C B_C B_C B_C B_C B_C HSYNC_C B0_C B_C B_C B_C CONT_C R_C R_C R_C R_C _C G_C G_C G_C G_C G_C DE_C CLKOUT_C A RXN_A RXP_A HT_A _A 0.uF C TEST TP Bottom Side (NC) R (NC) R Solder Jumper W Solder Jumper W Solder Jumper W Bottom Side

11 . Bills of Materials Table THEVA-V BOM TYPE Value / Part No. Package SPEC Reference No. Q'ty Note Capacitor 0uF 0 V C, C, C Capacitor 0.uF 00 V C, C, C, C, C, C, C0, C, C, C, C Capacitor.uF 0 V C Connector -(NC) mm_pitch pin CON Connector -(NC) mm_pitch pin CON Connector CN-FFC(0.)PD(NC) 0.mm_pitch pin CON Connector PCN0-P-.DSA_LEFT(NC).mm_pitch pin Header Connector SMA0-T(NC).mm PCB End Jack SMA, SMA, SMA Header HEAD(NC).mm_pitch --- Header, Header, Header, Header, Header, Header, Header, Header IC THCV QFN --- IC IC SSMKFS SSM RONΩ U Inductor MPZ0RA 0.A L, L LED0 SML-0MT 0 GREEN D, D Resistor 00 0.W R, R Resistor 0kΩ 00 0.W R, R Resistor kω(nc) 00 0.W R, R Resistor 00 A R, R,, R0, R,, R0, R, R Resistor (NC) 00 A R, R, R, R, R, R, R Table THEVA0-V BOM TYPE Value / Part No. Package SPEC Reference No. Q'ty Note Capacitor 0uF 0 V C, C, C Capacitor 0.uF 00 V C, C, C, C, C, C0, C, C, C, C 0 Capacitor.uF 0 V C Connector -(NC) mm_pitch pin CON Connector -(NC) mm_pitch pin CON Connector CN-FFC(0.)PD(NC) 0.mm_pitch pin CON Connector PCN0-P-.DSA_RIGHT(NC).mm_pitch pin Header Connector SMA0-T(NC).mm PCB End Jack SMA, SMA Header HEAD(NC).mm_pitch --- Header, Header, Header, Header, Header, Header, Header, Header IC THCV0 QFN THCV0 IC Inductor MPZ0RA 0.A L, L LED0 SML-0MT 0 GREEN D Resistor 00 0.W R Resistor 00 0.W R, R, R, R, R, R, R,, R0, R, R, R, R, R,, R, R, R, R, R, R, R,, R0, R, R, R, R, R, R, R, R,, R0, R, R Resistor 00 A R, R, R0, R,, R0, R, R Resistor kω(nc) 00 0.W R Resistor (NC) 00 A R, R, R, R, R, R /

12 . Set Items Table 0 Set Items TYPE Part No. DC Connector - FFC Connector for V-by-One HS Link - FFC pin mm Pitch for V-by-One HS Link -0 Pin Header --- It s possible to mount these parts on this board and use. /

13 . Notices and Requests Please kindly read, understand and accept this Notices and Requests before using this product. For the Material:. The product specifications described in this material are subject to change without prior notice.. The circuit diagrams described in this material are examples of the application which may not always apply to design of respective customers. ( THine ) is not responsible for possible errors and omissions in this material. Please note if the errors or omissions should be found in this material, THine may not be able to correct them immediately.. This material contains THine s copyright, know-how or other proprietary. Copying or disclosing of the contents of this material to any third party without THine s prior permission is strictly prohibited. For the Product:. This product is solely designed for evaluation purpose, and other purposes including mass production and distribution are not intended.. This product has been solely manufactured for electric design engineers but not for end-users.. This product is not radiation-tolerant product.. This product is presumed to be used for general electric device, not for applications which require extremely high-reliability/safety (including medical device concerned with critical care, aerospace device, or nuclear power control device). Also, when using this product for any device concerned with control and/or safety of transportation mean, traffic signal device, or other various types of safety device, such use must be after applying appropriate measures to the product.. This product has been designed with the utmost care to accomplish the purpose of evaluation of IC products manufactured by, however, THine MAKES NO WARRANTIES OR REPRESENTATIONS WITH REGARD TO ANY PEORMANCE OR FUNCTION OF THIS PRODUCT IN ANY CIRCUMSTANCE.. This product has been manufactured with the utmost care in quality control and product reliability, however, there may be faults or defects with a low but fixed probability, as inevitable phenomenon concerned with semiconductor manufacturing processes. Therefore, Customers are encouraged to have sufficiently redundant or error-preventive design applied to the use of the product so as not to have THine s product cause any social or public damage. Replacement of the product is only available in case of obvious defects of mount devices at the point of unpacking the product. Neither replacement nor failure analysis of the product is available in any other case of defects with the product and/or the product s components.. Customers are asked, if required, to judge by themselves on whether this product falls under the category of strategic goods under the Foreign Exchange and Foreign Trade Control Law.. Please Note that if infringement of any third party s industrial ownership should occur by using this product, THine will be exempted from any responsibility unless it directly relates to the production process or functions of the product.. Developing, designing and manufacturing of Customers own products, equipments or system by using of this product is strictly prohibited in any way. sales@thine.co.jp /