Figure 1: AAT2469/AAT2499 Evaluation Board Picture.

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1 Introduction EVALUATION BOARD DATA SHEET The AAT246/AAT24 evaluation board is a hardware platform to evaluate the functions of the AAT246 and AAT24 devices. The AAT246 is a dedicated TVLite TM control IC for the AAT24 TVLite TM LED driver, which is a highly integrated two channel LED driver. The AAT246 and AAT24 operate over a common 4.5V to 5.5V range. The LED input voltage range, V LED, is determined by the highest V F (LED Forward Voltage) multiplied by the number of LEDs in a given string. The maximum V LED is limited to the AAT24 BV DSS spec of V. The maximum V LED must be less than V to avoid damage to the AAT24s on the demo board. The AAT24 input and output provide a necessary feedback route when cascading multiple AAT24s to provide a single voltage mode feedback for the AAT246. The AAT246 ICSFB provides a current mode feedback for a third party system power supply. Each current sink in the AAT24 is programmable via the serial shift interface. The serial shift interface is controlled by the AAT246. An AAT246 can control up to 8 AAT24s, or a total of current sinks. The AAT246 captures the current sink data via the SPI interface. Then the data is converted and is sent out to the AAT24s via the serial shift interface. The speed of the serial shift interface is the same as the GSLCK frequency applied to the AAT246. Full scale LED current is programmed using an external resistor on the AAT24 pin. The LED current can be scaled linearly from minimum to maximum setting current with the V REF input voltage. The AAT246 supplies this V REF voltage that is controlled by the DOT correction register in the AAT246 with 8-bit resolution. Both phase delay and grayscale clock (GS Clock) PWM on-time are user programmable with -bit resolution for each current sink bank. Timing and synchronization are determined by externally applied and signals. The AAT246 is available in a standard P package. The AAT24 is available in a standard P or P- package. More details on the AAT246 and AAT24 can be found in the product datasheets. This document will cover the board schematic, layout guidelines and setup of a few key configuration registers to demonstrate the AAT246 and AAT24 driving LED strings with different brightness levels. The document includes scope shots to show the corresponding relationships between related waveforms. Evaluation Board Picture Figure 1: AAT246/AAT24 Evaluation Board Picture. 1

2 Board Schematic EVALUATION BOARD DATA SHEET AATI USB Module 1 36 TP3 FB-I R22 R21 1k C24 C22 2.2uF D3 R23 Diode 1N48 D2 C23 SDO_uC R1 LK_uC R SDI_uC R U SDO 1 SDO _8 2 ICSFB 3 ICSFB _ LK 6 LK SDI SDI 8 AAT246 EN CSB ADDR 1 EN _8 CSB R ADDR C CSB_uC C.1uF R1 R18 C2 LK_uC SDO_uC SDI_uC CSB_uC C LK SDO SDI CSB SDA L P1.3 P1.4 P1.5 P2. P2.1 3V 5V P3. P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P P2.2 P2.3 P P2.5 P2.6 P2. 5V USB Module U1 1 _ C1 _1 6.1uF S CS 8 A S 1 _246 1 CS C R1 6.4k U4 1 _ C4 _4 6.1uF S CS 8 A S 1 _3 C R k _3 CS1 U 1 _ C _ 6.1uF S CS3 8 A S 1 _6 C18 R 6.4k _6 CS4 P1 1 2 CS1 CS2 3 4 CS3 CS4 5 6 CS5 CS6 8 CS CS8 1 CS CS1 CS CS CS CS CS CS 1 18 TP1 VLED VLED 1 2 VLED Header 1X2 TP1 TP18 CS1 C1 CS1 TP2 TP1 CS2 CS2 _8 CSB_uC SDI_uC SDI EN P Header 5X2 JP ADDR JP2 1 2 ENABLE SDO_uC LK_uC ADDR C25 AAT24 AAT24 AAT24 TP3 CS3 CS3 TP2 ICSFB ICSFB JP3 1 2 TP4 CS4 TP5 CS5 CS4 CS5 TP21 TP22 SDI SDI 5V to VI N JP4 1 2 USB 5V to VI N U2 1 _ C2 _2 6.1uF S CS 8 A S 1 _1 C R k _1 CS U5 1 _ C5 _5 6.1uF S CS 8 A S 1 _4 C R k _4 CS8 U8 1 _ C8 _8 6.1uF S CS1 8 A S 1 _ C1 R k _ CS2 TP6 CS6 TP CS TP8 CS8 TP CS TP1 CS1 CS6 CS CS8 CS CS1 TP23 LK LK TP24 CSB CSB TP25 SDO SDO TP26 TP2 _246 _246 LK R36 SDI R35 _246 R36 and R35 are for AAT24 test setup. AAT24 AAT24 AAT24 TP CS CS TP28 _246 _8 TP CS CS TP2 R D1 TP CS CS TP31 2k Red LED _3 U A _2 3 R3 6.4k C _6 U A _5 6 R6 6.4k C1 TP CS TP CS TP CS CS CS CS TP32 TP33 _1 _1 TP36 TP3 TP38 TP3 TP34 TP35 C3 _3 6.1uF S S 1 _2 C6 _6 6.1uF S S 1 _5 CS 8 CS CS5 8 CS6 AAT24 AAT24 Figure 2: AAT246/AAT24 Evaluation Board Schematic. Printed Circuit Board Specification Symbol Parameter Min Typ Max Units V IN Input Voltage Range V LED VLED Voltage Range V f Frequency 55 1 f Frequency 4 4M Hz f LK SPI Clock Frequency MHz T A Ambient Temperature Range T J Operating Junction Temperature Range -4 C Table 1: AAT246/AAT24 Evaluation Board Specifications. 2

3 Figure 3: Connection between the LED and the Evaluation Board through a Ribbon Cable. Getting Started Setup 1. Connect an input power source (to supply voltage between 4.5V and 5.5V) between and the ground. The can be powered by the 5V from the USB port when using the Skyworks USB Module. Simply connect JP4 jumper to use the 5V from the USB port to power. 2. If using the Skyworks USB Module, connect the USB Module to the USB Module connector on the AAT246/AAT24 demo board. Otherwise, connect frequency generators to apply between 55Hz to 1kHz to and the appropriate frequency to whose leading edge is synchronized to. Apply a frequency with a minimum of 46 frequency to. Refer to the AAT246 and AAT24 product datasheet to determine the correct frequency for the application operating condition. Connect SPI interface on P2. 3. Apply V LED. If V LED is in closed-loop operation and is applied from a third party SMPS converter, connect the FB-I with current mode to the feedback input of the third party SMPS converter. Calculate resistor R3 value for desired V LED level. If using an Skyworks boost converter, connect the to the feedback input of the Skyworks boost converter. 4. Set ADDR jumper to desired address setting for the AAT Connect JP1 jumper to ON to enable the AAT Connect LED strings to P1 using information provided in Table 2. 3

4 Pin Description Pin Description 1 Current Sink 2 Current Sink 1 3 Current Sink 1 Current Sink 4 Current Sink 2 Current Sink 5 Current Sink 3 Current Sink 6 Current Sink 4 Current Sink Current Sink 5 1 Current Sink 8 Current Sink 6 18 Current Sink Current Sink 1 VLED 1 Current Sink 8 2 VLED Table 2: P1 LED Pinout Configuration. Functional Test and Evaluation R SET and DOT Register The R SET resistors, R1 to R8, on the AAT24s are 6.4kΩ, and set the maximum full scale LED current to.2ma. The AAT246 provides a V REF output, which is controlled by the DOT register with 256 linear steps between current sink being off and the maximum full scale LED current, to adjust the luminance of the LEDs. Figure 4 shows the LED current and V REF at the full scale setting with DOT register setting as xff. Figure 5 shows the LED current and V REF at the half scale setting with DOT register setting as x8. Figure 4: LED Current with DOT = xff, V REF = 3.6V. 4

5 GS Registers EVALUATION BOARD DATA SHEET The GS registers control the PWM duty cycle of the LED current sinks for adjusting the brightness. Figure 6 shows a LED string running at 5% duty cycle with GS register setting as x8. Figure shows a LED string running at 25% duty with GS register setting as x4. Figure 8 shows a LED string running at 5% duty cycle with GS register setting as xc. Figure 5: LED Current with DOT = x8, V REF = 1.8V. Figure 6: PWM at 5% Duty Cycle with GS = x8. 5

6 Figure : PWM at 25% Duty Cycle with GS = x4. Figure 8: PWM at 25% Duty Cycle with GS = xc. 6

7 DLY Registers EVALUATION BOARD DATA SHEET The DLY registers set the phase shift from the rising edge of to when the current sink PWM cycle begins for each LED current sink. Figure shows a phase shift of with DLY register setting as x. Figure 1 shows a phase shift of with DLY register sets to x4. Figure shows a phase shift of 18 with DLY register setting as x8. Figure shows a phase shift of 2 with DLY register setting as xc. Figure shows a phase shift of 36 with DLY register setting as xfff. One advantage of using delay is that it allows each current sink to start at different time to reduce the stress on a system power supply. The other advantage is that it can provide a fixed off time in scanning mode when the delay is used in combination with the INVERT function. Figure : Phase Shift with DLY = x. Figure 1: Phase Shift with DLY = x4.

8 Figure : 18 phase shift with DLY = x8. Figure : 2 phase shift with DLY = xc. Figure : 36 phase shift with DLY = xfff. 8

9 INVERT Function EVALUATION BOARD DATA SHEET The INVERT function allows the PWM signal to be inverted. With the INVERT function enabled, a 25% duty cycle (GS = x4) will be a 5% duty cycle output, and a delay turn on time (DLY = x4) will be a turn on time at. The INVERT function can provide a fixed off time in scanning mode. Figure and show two PWM waveforms with INVERT function disabled and sharing a same turn on time with different duty cycle. Figure and 1 show two PWM waveforms with the same settings as Figure and with INVERT function enabled. Figure : Non-Inverted 2% Duty Cycle with 45 Phase Shift Turn On Time (GS = x333, DLY = x2, INVERT = ). Figure : Non-Inverted 8% Duty Cycle with 45 Phase Shift Turn On Time (GS = xccc, DLY = x2, INVERT = ). Figure : Inverted 2% Duty Cycle with 45 Phase Shift Turn Off Time (GS = x333, DLY = x2, INVERT = 1).

10 Figure 1: Inverted 8% Duty Cycle with 45 Phase Shift Turn Off Time (GS = xccc, DLY = x2, INVERT = 1). Open and Short Fault Detection The AAT24 provides the open and short fault detection functions to detect any LED that is opened or shorted. The fault status is indicated by the pin and Fault Status registers. The AAT24 has a programmable open and short fault blanking time. The blanking time can be programmed to 2, 4, 8, or cycles to prevent any false fault detection. The AAT24 has an open fault clear bit and a short fault clear bit. By setting the fault clear bit, the fault status is removed and any further fault will not be detected until the bit is reset back to. Figure 18, 1, 2, and 21 show the 2, 4, 8, and blanking time settings in short fault detection. Figure 18: Short Fault with the 2 Blanking Time. 1

11 Figure 1: Short Fault with the 4 Blanking Time. Figure 2: Open Fault with the 8 Blanking Time.

12 Figure 21: Open Fault with the Blanking Time. Serial Shift Interface The AAT246 collects the registers setting via SPI interface, and converts and sends the settings to the AAT24s via the serial shift interface. When CSB pin is pulled high, the Start bit is set in CTRL3 register of AAT246, then the AAT246 would send data out to the serial shift interface. Figure 22 shows the serial shift interface data transmission after the Start bit is set in the AAT246. Figure 22: Serial Shift Interface Data Transmission after Start Bit is set in the AAT246.

13 Layout Guidelines EVALUATION BOARD DATA SHEET Follow the guidelines below to ensure proper operation of the AAT246 and AAT24: 1. Maintain a ground plane and connect to the IC pin(s), and minimize the distance from the input capacitor negative terminal to the pins. 2. Consider additional PCB exposed area for the AAT246 and AAT24 to maximize heat sinking capability. Connect the (bottom of the die) to. Connect and S as close as possible to the package and maximize the heat sinking space for overall performance. 3. Maximize package thermal dissipation and power handling capacity of the QFN-48 package, solder the exposed paddle of the IC onto the thermal landing of the PCB, where the thermal landing is connected to the ground plane. If heat is still an issue, multi-layer boards with dedicated ground planes are recommended. Also, adding thermal vias with.3mm hole size and 1.2mm spacing between the vias (Refer to Figures 2 and 3) on the thermal landing would help transfer heat to the bottom plane of the PCB effectively. Component Part Number Description Manufacturer U1-U8 AAT24 2 Channels White LED Driver U AAT246 Control IC for AAT24s Skyworks C1-C GRM188R61CKA1D Cer.1μF V X5R 63 Taiyo Yuden C1, C3, C GRM188R61C225KED Cer 2.2μF V X5R 63 Murata D1 LTST-C1CKT Red LED, SMD, 63 Lite-On Inc. D2 LL48- Diode Switch 5V 5MW MINIMELF Diode Inc R1-R8 CRCW636K4FKEA Res 6.4KΩ 1/1W 1% 63 SMD R1-R, R1, R18 CRCW63ZEA Res Ω 1/1W 1% 63 SMD R CRCW632KFKEA Res 2KΩ 1/1W 1% 63 SMD Vishay R21 CRCW631KFKEA Res 1KΩ 1/1W 1% 63 SMD JP1 TSW--8-G-D Conn. Header 4 Pos, 2.54mm JP2, JP3, JP4 TSW--8-G-D Conn. Header 2 Pos, 2.54mm Samtec, Inc P1 HRP1H-ND Header 5x2-Pin, Dual Row, 2.54mm P2 AWHW2G-22-T-R Header 1x2-Pin, Dual Row, 2.54mm Assmann Table 3: AAT246/AAT24 Evaluation Board BOM

14 Figure 23: AAT246 and AAT24 Evaluation Board Layout Top Layer. Figure 24: AAT246 and AAT24 (mm mm TDFN) Evaluation Board Layout Bottom Layer.

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