THCV217 / THCV218 Evaluation Kit

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THCV / THCV Evaluation Kit V-by-One HS Dual Link Evaluation Board Parts Number: THEVA-V, THEVA-V.

0MHz to MHz. Table Link and Clock Frequency Chip Link Clock Freq.

Features Color width selectable : / bit Single-In /Single-Out, Single-In /Dual-Out and Dual-In / Dual-Out

1 THCV / THCV Evaluation Kit V-by-One HS Dual Link Evaluation Board Parts Number: THEVA-V, THEVA-V.General Description THEVA-V and THEVA-V are designed to support video data transmission between the host and Display. One high speed lane can carry up to bit data and bits of synchronizing signals at a pixel clock frequency from 0MHz to MHz. Table Link and Clock Frequency Chip Link Clock Freq. THCV Si/So, Di/Do 0MHz to MHz Si / Do 0MHz to 0MHz THCV Si/So, Di/Do 0MHz to MHz Di / So 0MHz to 0MHz. Features Color width selectable : / bit Single-In /Single-Out, Single-In /Dual-Out and Dual-In / Dual-Out selectable for THCV Single-In /Single-Out, Dual-In /Single-Out and Dual-In / Dual-Out selectable for THCV Wide frequency range PLL requires no external components V-by-One HS standard version. compliant. Overview (a) THEVA-V (Top Side) (b) THEVA-V (Top Side) Figure THEVA-V and THEVA-V Top Side View /

. Power Supply Setup This chapter shows power supply condition. Caution: Please check if there is no power- short on below red trace before supplying any power.

V Power Supply (a)theva-v (b)theva-v Figure Power Supply for Evaluation Board Power Supply from / to Connector.

2 . Power Supply Setup This chapter shows power supply condition. Caution: Please check if there is no power- short on below red trace before supplying any power..v Power Supply to Each Board Each evaluation board requires.v power supply. Please use CON connector typically. Ground Ground.V Power Supply.V Power Supply (a)theva-v (b)theva-v Figure Power Supply for Evaluation Board Power Supply from / to Connector.V power supply can be connected to Header and CON by using W, W and Wsolder jumper. THEVA-V W: Connect the.v power supply with pin#, and of Header. W: Connect the.v power supply with pin# and of CON. W: Connect the.v power supply with pin# and of CON. (a)theva-v (Top Side) (b) THEVA-V (Bottom Side) Figure THEVA-V Power Supply from / to Each Connector /

THEVA-V W: Connect the.v power supply with pin#, and of Header. W: Connect the.v power supply with pin# and of CON.

W W W (a)theva-v (Top Side) (b)theva-v (Bottom Side) Figure THEVA-V Power Supply from / to Each Connector.

() mm Pitch Connector (Default Setting) Please mount / unmount following 0ohm resistors to use mm pitch connector.

3 THEVA-V W: Connect the.v power supply with pin#, and of Header. W: Connect the.v power supply with pin# and of CON. W: Connect the.v power supply with pin# and of CON. W W W (a)theva-v (Top Side) (b)theva-v (Bottom Side) Figure THEVA-V Power Supply from / to Each Connector. V-by-One HS Input / Output Connector Select V-by-One HS input / output connector can be selected by using 0ohm resistors. () mm Pitch Connector (Default Setting) Please mount / unmount following 0ohm resistors to use mm pitch connector. Table Mount Unmount THEVA-V R0, R, R, R, R, R R, R, R0, R, R, R THEVA-V R0, R, R, R, R, R R0, R, R, R, R, R HT/ input HT/ output TX0 TX V-by-One HS output RX0 RX V-by-One HS input (a)theva-v (Top Side) (b)theva-v (Top Side) Figure Resistor Mounting for mm Pitch Connector /

4 () 0.mm Pitch Connector Please mount / unmount following 0ohm resistors to use 0.mm pitch connector. Table Mount Unmount THEVA-V R, R, R0, R, R, R R0, R, R, R, R, R THEVA-V R0, R, R, R, R, R R0, R, R, R, R, R V-by-One HS output TX TX0 RX RX0 V-by-One HS output HT/ input HT/ output (a)theva-v (Bottom Side) (b)theva-v (Bottom Side) Figure Resistor Mounting for 0.mm Pitch Connector () SMA Connector Please mount / unmount following 0ohm resistors to use SMA connector. *HT and signals don t have SMA connector input / output connection. Table Mount Unmount THEVA-V R, R, R, R R, R, R0, R, R, R R0, R, R, R, R, R THEVA-V R, R, R, R R0, R, R, R, R, R R0, R, R, R, R, R (a)theva-v (Bottom Side) (b)theva-v (Bottom Side) Figure Resistor Mounting for SMA Connector /

Figure Position of Function Setting Pin (a)header description (b)high level setting (c)low level setting Figure High / Low Setting Description.

5 . Function Setting Setting pin of each board is shown in yellow area of figure. Pin# of each HEADER is connected to IC s setting pin. Each setting pin s high or low setting can set by connecting pin# of HEADER and high level or low level. Figure Position of Function Setting Pin (a)header description (b)high level setting (c)low level setting Figure High / Low Setting Description. Clock Input from SMA Connector THEVA-V can also choose the TTL clock input from SMA connector by using 0ohm resistor. If you want to use SMA connector for clock input, please change the 0ohm resistor mount from R to R. Figure 0 TTL Clock Input Connector Select /

6 . Status Indicate LED The following table shows indicating status of each LED. Table THEVA-V THEVA-V D Status Indicator.V Power Supply Indicator D.V Power Supply Indicator. Sharing and HT Omission LOCK Sharing connection can be shared with V-by-One HS trace. When you share the signal, Please mount k ohm resistors to share the signal, and unmount the 0ohm resistors shown in Figure. (a)theva-v (Top Side) (b)theva-v (Top Side) (c) THEVA-V (Bottom Side) (d) THEVA-V (Bottom Side) Figure Sharing /

7 HT Signal Omission HT signal can be omitted by using k ohm resistor. When you omit the HT signal, Please mount k ohm resistors to pull down the HT signal at transmitter side, and unmount the 0ohm resistors shown in Figure. When the HT omission using, HT output from receiver side is open connection. (a)theva-v (Top Side) (b)theva-v (Top Side) (c)theva-v (Bottom Side) (d)theva-v (Bottom Side) Figure HT Signal Omission /

8 0. Function This chapter shows function setting of THEVA-V and THEVA-V. Table THEVA-V Function Setting Description Silk Symbol Function PRE DEMUX, MODE PRE DEMUX, MODE Power down input. H: Normal Operation L: Power Down Input clock triggering edge select input for latching input data H : Rising Edge L : Falling Edge Pre emphasis level select input H: 00% L: 0% Color depth select input H : bit Mode L : 0bit Mode Operation mode Select input DEMUX, MODE=HH : Reserved (Forbidden) HL : Single-In / Dual-Out LH : Single-In / Single-Out LL : Dual-In / Dual-Out Field Enable H : Enable L : Normal Operation Table THEVA-V Function Setting Description Silk Symbol Function MODE, MODE0 PLL OE MODE, MODE0 PLL OE Operation mode Select input HH : Reserved (Forbidden) HL : Single-In / Single-Out LH : Dual-In / Single-Out LL : Dual-In / Dual-Out PLL Bandwidth select H: CLKIN<0MHz, when SiSo, DiDo L: Normal Operation Power down input. H: Normal Operation L: Power Down Mode Input clock triggering edge select input for latching input data H : Rising Edge L : Falling Edge Output enable input H : All CMOS Outputs Enabled L : All CMOS Outputs Disabled, except for, HT /

9 Silk Symbol Function DK DKEN RES DK DKEN Reserved Output clock delay timing select input. Enabled by DKEN H : Late L : Early DK enable H: DK Enabled L: DK Disabled (Default) CTL bit transmission on DE=low blanking period enable H : CTL Bit Enabled (CTL are transmitted except the st and the last pixel of DE=low) L : CTL Bit Disabled (CTL are low fixed during DE=low) When =high, Reserved must be low Field Enable H : Enable L : Normal Operation Color depth select input H : bit Mode L : 0bit Mode /

10 0/. Schematic Figure THEVA-V schematic D D C C B B A A Title Number Revision Size A Date: 0/0/ Sheet of File: \\..\THCV.SchDoc Drawn By: THEVA-V.00 HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header MODE DEMUX PRE PCN0-P-.DSA_LEFT(NC) Header VDD. CONT R0 HT TX0N_C TX0P_C -(NC) 0 CON R R R VDD. VDD. VDD. 0 CN-FFC(0.)PD(NC) CON SMA0-T(NC) SMA (NC) R CLKIN_CON R CLKIN CLKIN_SMA SMA0-T(NC) SMA TX0N_A TX0P_A SMA0-T(NC) SMA R0 R R R R R R R R R G G G G G G G G G0 G B B B B B B HSYNC B0 B B B CONT CONT CONT CONT R0 R R R R R R R R R G0 G G G G G G G G G B0 B B B B B B B B B VSYNC DE CLKIN TXN_C TXP_C R R (NC) R HT TX0N_C TX0P_C (NC) R (NC) R0 (NC) R TXN_C TXP_C (NC) R (NC) R TXN_A SMA0-T(NC) SMA SMA0-T(NC) SMA TXP_A -(NC) VCC CON 0uF C VDD. SML-0MT D R VDD. MPZ0RA L Inductor 0uF C VDD. MPZ0RA L Inductor 0uF C PCN0-P-.DSA_LEFT(NC) Header VDD. VSYNC DE CLKIN_CON CONT 0.uF C 0.uF C TX0N_C TX0P_C TX0N TX0P 0.uF C 0.uF C TXN_C TXP_C TXN TXP INPUT OUTPUT IC upcbt 0uF C 0uF C VDD. VDD. MPZ0RA L Inductor 0uF C CA VDD. MPZ0RA L Inductor 0uF C0 CP R B R A R B R A R B0 R A0 R B R A R C0 R0 C G B G A G B G A G B G A G B G A G B G0 A B E B E B D B D B C B C B B B B B A B0 A VSYNC K HSYNC L DE J CLKIN J0 CONT G CONT G0 CONT D CONT D0 J MODE J Reserved0 J DEMUX J H H PRE G F J J E D C C Txp F Txn F0 Tx0p E Tx0n E0 HT C R K R K R J R J R H R H R G R G R F R0 F G K G L G K G L G K G L G K G L G L G0 L B H0 B H B K0 B L0 B K B L B K B L B K B0 L C CA D CA E CA F C C E E E F F F G G G J C CP G IC THCV R RES0 MODE DEMUX PRE 0.0uF C 0.0uF C 0.0uF C 0.0uF C0 0.0uF C 0.0uF C CA CP 0kΩ R 0kΩ R kω(nc) R kω(nc) R U SSMKFS VDD. R D SML-0MT 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C TTL Input TTL Input Sync Signal Input CML Output Setting.V Power Supply.V Power Supply G G G G G G G G G0 G B B B B B B B0 B B B R0 R R R R R R R R R G0 G G G G G G G G G B0 B B B B B B B B B R0 R R R R R R R R R HSYNC CONT CONT HT TX0N_A TX0P_A TXN_A TXP_A HT_A _A.uF C Bottom Side (NC) R (NC) R (NC) R (NC) R W W W W

11 / Figure THEVA-V schematic D D C C B B A A Title Number Revision Size A Date: 0/0/ Sheet of File: \\..\THCV.SchDoc Drawn By: THEVA-V.00 HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header HEAD(NC) Header0 MODE MODE0 OE DK DKEN PLL R0 HT RX0N_C RX0P_C -(NC) 0 CON R R R VDD. VDD. VDD. 0 CN-FFC(0.)PD(NC) CON SMA0-T(NC) SMA RX0N_A RX0P_A SMA0-T(NC) SMA R0 R R R R R R R R R G G G G G G G G G0 G B B B B B B HSYNC B0 B B B CONT CONT CONT CONT R0 R R R R R R R R R G0 G G G G G G G G G B0 B B B B B B B B B VSYNC DE CLKOUT RXN_C RXP_C R R (NC) R0 HT RX0N_C RX0P_C (NC) R (NC) R (NC) R RXN_C RXP_C (NC) R (NC) R RXN_A SMA0-T(NC) SMA SMA0-T(NC) SMA RXP_A -(NC) VCC CON 0uF C VDD. SML-0MT D R VDD. MPZ0RA L Inductor 0uF C VDD. MPZ0RA L Inductor 0uF C 0.uF C 0.uF C RX0N_C RX0P_C RX0N RX0P 0.uF C 0.uF C RXN_C RXP_C RXN RXP INPUT OUTPUT IC upcbt 0uF C 0uF C VDD. VDD. MPZ0RA L Inductor 0uF C0 CA R MODE DK OE kω(nc) R D DGLOCK N RX0n F RX0p F RXn H RXp H HT D Reserved C Reserved D Reserved C Reserved E Reserved G Reserved G MODE J J PLL K MODE0 K DK K L OE L L DKEN L M C C C C0 C D E F F H J K L L L L0 L C C L CA E R A R B R B R C R C R D R D R E R E R0 F G A G B G A G B G A G B0 G A0 G B G A G0 A B A B B B A B B B A B B B A B B B A B0 B DE B HSYNC A VSYNC B R M R N R M R N R M R N R M R N R M R0 N G M G N G M0 G N0 G M G N G M G N G M G0 N B J B J B K B K B L B L B M B M B N B0 N CONT H CONT H CONT C CONT C OUT E E E E E E F F F F F G G G G G G G H H H H H J J J J J CLKOUT G CA F CA G CA H CA J L IC THCV OUT MODE0 PLL DKEN RES RES RES RES RES RES R R R R0 HT DGLOCK 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C0 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C0 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C 0.0uF C R0_C R_C R_C R_C R_C R_C R_C R_C R_C R_C G_C G_C G_C G_C G_C G_C G_C G_C G0_C G_C B_C B_C B_C B_C B_C B_C HSYNC_C B0_C B_C B_C B_C CONT_C CONT_C CONT_C CONT_C R0_C R_C R_C R_C R_C R_C R_C R_C R_C R_C G0_C G_C G_C G_C G_C G_C G_C G_C G_C G_C B0_C B_C B_C B_C B_C B_C B_C B_C B_C B_C VSYNC_C DE_C CLKOUT_C OUT_C R R R R R R R R0 R R R R R R R R R R0 R R R R R R R R R R R R R R R R R R R0 R R R R R R R R R0 R R R R R R R R R R R R R R0 R R R0 R R R R R R PCN0-P-.DSA_RIGHT(NC) Header R0_C R_C G_C VSYNC_C R_C R_C R_C G_C G_C G_C G0_C CONT_C B_C B_C B_C B_C B_C B_C HSYNC_C B0_C B_C B_C B_C CONT_C VDD. R0_C R_C G_C R_C R_C R_C G_C G_C G_C G0_C CONT_C B_C B_C B_C B_C B_C B_C B0_C B_C B_C B_C CONT_C R_C R_C G_C G_C R_C R_C R_C G_C G_C G_C R_C R_C G_C DE_C G_C R_C R_C R_C G_C G_C CLKOUT_C G_C PCN0-P-.DSA_RIGHT(NC) Header VDD. HEAD(NC) Header RES HEAD(NC) Header HEAD(NC) Header VDD. CA RX0N_A RX0P_A RXN_A RXP_A HT_A _A TP Bottom Side (NC) R (NC) R (NC) R (NC) R (NC) R (NC) R (NC) R (NC) R TP W W W W

12 . Bills of Materials Table THEVA-V BOM TYPE Value / Part No. Package SPEC Reference No. Q'ty Note Capacitor 0uF 0 V C, C, C, C, C, C, C0 Capacitor.uF 0 V C Capacitor 0.uF 00 V C, C, C, C Capacitor 0.0uF 00 V C, C, C, C, C, C, C, C, C0, C, C Connector SMA0-T(NC).mm PCB End Jack SMA, SMA, SMA, SMA, SMA Connector PCN0-P-.DSA_LEFT(NC).mm_pitch pin Header, Header Connector CN-FFC(0.)PD(NC) 0.mm_pitch pin CON Connector -(NC) mm_pitch pin CON Connector -(NC) mm_pitch pin CON Header HEAD(NC).mm_pitch --- Header, Header, Header, Header, Header, Header, Header IC SSMKFS SSM RONΩ U IC THCV TFBGA0 THCV IC IC upcbt SC- A IC Inductor MPZ0RA 0.A L, L, L, L LED0 SML-0MT 0 GREEN D, D Resistor 00 0.W R, R Resistor 0kΩ 00 0.W R, R Resistor kω(nc) 00 0.W R, R Resistor (NC) 00 A R, R, R, R, R, R0, R, R, R, R, R Resistor 00 A R, R, R0, R, R, R, R, R Table THEVA-V BOM TYPE Value / Part No. Package SPEC Reference No. Q'ty Note Capacitor 0uF 0 V C, C, C, C, C, C0 Capacitor 0.uF 00 V C, C, C, C Capacitor 0.0uF 00 V C, C, C, C, C, C, C, C, C, C0, C, C, C, C, C, C, C, C, C, C0, C, C, C, C, C, C Connector -(NC) mm_pitch pin CON Connector -(NC) mm_pitch pin CON Connector CN-FFC(0.)PD(NC) 0.mm_pitch pin CON Connector PCN0-P-.DSA_RIGHT(NC).mm_pitch pin Header, Header Connector SMA0-T(NC).mm PCB End Jack SMA, SMA, SMA, SMA Header HEAD(NC).mm_pitch --- Header, Header, Header, Header, Header, Header, Header, Header0, Header, Header, Header IC THCV TFBGA THCV IC IC upcbt SC- A IC Inductor MPZ0RA 0.A L, L, L LED0 SML-0MT 0 GREEN D Resistor Resistor 0.W R, R, R, R, R, R, R, R0, R, R, R, R, R, R, R, R, R, R0, R, R, R, R, R, R, R, R, R, R, R, R, R, R, R, R, R, R, R0, R, R, R, R, R, R, R, R, R0, R, R, R, R, R, R, R, R, R, R, R, R, R, R0, R, R, R, R, R, R, R0, R, R Resistor 00 0.W R Resistor kω(nc) 00 0.W R Resistor 00 A R0, R, R, R, R, R, R, R0, R, R, R Resistor (NC) 00 A R, R, R0, R, R, R, R, R, R, R, R, R, R, R /

13 . Set Items Table 0 TYPE Part No. DC Connector - FFC Connector for V-by-One HS Link - FFC pin mm Pitch for V-by-One HS Link -0 Pin Header --- It's possible to mount these parts on this board and use. /

14 . Notices and Requests Please kindly read, understand and accept this Notices and Requests before using this product. For the Material:. The product specifications described in this material are subject to change without prior notice.. The circuit diagrams described in this material are examples of the application which may not always apply to design of respective customers. ( THine ) is not responsible for possible errors and omissions in this material. Please note if the errors or omissions should be found in this material, THine may not be able to correct them immediately.. This material contains THine s copyright, know-how or other proprietary. Copying or disclosing of the contents of this material to any third party without THine s prior permission is strictly prohibited. For the Product:. This product is solely designed for evaluation purpose, and other purposes including mass production and distribution are not intended.. This product has been solely manufactured for electric design engineers but not for end-users.. This product is not radiation-tolerant product.. This product is presumed to be used for general electric device, not for applications which require extremely high-reliability/safety (including medical device concerned with critical care, aerospace device, or nuclear power control device). Also, when using this product for any device concerned with control and/or safety of transportation mean, traffic signal device, or other various types of safety device, such use must be after applying appropriate measures to the product.. This product has been designed with the utmost care to accomplish the purpose of evaluation of IC products manufactured by, however, THine MAKES NO WARRANTIES OR REPRESENTATIONS WITH REGARD TO ANY PERFORMANCE OR FUNCTION OF THIS PRODUCT IN ANY CIRCUMSTANCE.. This product has been manufactured with the utmost care in quality control and product reliability, however, there may be faults or defects with a low but fixed probability, as inevitable phenomenon concerned with semiconductor manufacturing processes. Therefore, Customers are encouraged to have sufficiently redundant or error-preventive design applied to the use of the product so as not to have THine s product cause any social or public damage. Replacement of the product is only available in case of obvious defects of mount devices at the point of unpacking the product. Neither replacement nor failure analysis of the product is available in any other case of defects with the product and/or the product s components.. Customers are asked, if required, to judge by themselves on whether this product falls under the category of strategic goods under the Foreign Exchange and Foreign Trade Control Law.. Please Note that if infringement of any third party s industrial ownership should occur by using this product, THine will be exempted from any responsibility unless it directly relates to the production process or functions of the product.. Developing, designing and manufacturing of Customers own products, equipments or system by using of this product is strictly prohibited in any way. sales@thine.co.jp /

THCV219 / THCV220 Evaluation

THCV219 / THCV220 Evaluation THCV / THCV0 Evaluation Kit V-by-One HS Single Link Evaluation Board Parts Number: THEVA-V, THEVA0-V. General Description THEVA-V and THEVA0-V boards are designed to support video data transmission between