User s Manual ISL71218MEVAL1Z. User s Manual: Evaluation Board. High Reliability Space

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1 User s Manual ISL71218MEVAL1Z User s Manual: Evaluation Board High Reliability Space Rev. Aug 217

2 USER S MANUAL ISL71218MEVAL1Z Evaluation Board UG139 Rev.. 1. Overview The ISL71218MEVAL1Z evaluation platform is designed to evaluate the ISL71218M. The ISL71218 is a single supply, rail-to-rail output, dual amplifier with ground sensing inputs that allow the common-mode input voltage to swing.5v below the V- rail. The ISL71218 can operate from a single or dual supply with a 3V to 4V supply range. The ISL71218 features very low power, low offset voltage, and low temperature drift, making it ideal for applications for precision instrumentation, current sensing, and power supply and industrial process controls. 1.1 Key Features Wide V IN range single or dual supply operation +1.8V/-1.2V to ±2V 3.V to 4V Singled-ended or differential input operation External VREF input Banana jack connectors for power supply and VREF inputs BNC connectors for op amp input and output terminals Convenient PCB pads for op amp input/output impedance loading 1.2 Specifications V+ range: 1.8V to 2V V- range: -1.2V to -2V 1.3 Ordering Information Part Number ISL71218MEVAL1Z Description ISL71218MEVAL1Z evaluation board 1.4 Related Literature For a full list of related documents, visit our website ISL71218M product page UG139 Rev.. Page 2 of 13

3 1. Overview R 39, R 47, R 49, R 5 VCM IN- IN+ IN+ VREF R 14, R 16, R 18, R 4 1kΩ R 5, R 7, R 9, R 35 1kΩ IN-A 1kΩ IN-B 6 2 IN-C 9 V+ IN-D IN+A IN+B 5 3 IN+C 1 IN+D 12 R 32 1kΩ + ISL71218MBZ 11 V- OUT_A 1 OUT_B 7 OUT_C 8 OUT_D 14 Ω R 51 TO R 54 R 67 TO R 7 OUT VREF GND R 33 Figure 1. Basic Differential Amplifier Configuration UG139 Rev.. Page 3 of 13

4 2. Functional Description 2. Functional Description 2.1 Power Supply Connections J3 V- V+ J1 J4 VREF C 2 R 44 R 1 C 26 R 37 Ω 1µF Ω Ω 1µF D2 V- AND V+ IC SUPPLY PINS D1 R 48 Ω V- V+ GND J2 C 4.1µF C 1.1µF C 5.1µF C 3.1µF Figure 2. Power Supply Circuit Figure 2 shows the power supply connections, decoupling and protection circuitry. External power connections are made through the V+, V-, VREF, and GND banana jack connections on the evaluation board. Decoupling capacitors, C 2 and C 26, provide low-frequency power-supply filtering, while additional capacitors (C 1, C 3, C 4, and C 5, connected close to the part) filter out high-frequency noise, and are connected to their respective supplies through R 37 and R 48 resistors. These resistors are Ω but can be changed by the user to provide additional power supply filtering, or to reduce the supply voltage rate-of-rise time. Anti-reverse diodes, D1 and D2, protect the circuit in case of momentarily reversing the power supplies accidentally to the evaluation board. The VREF pin can be connected to ground to establish a ground referenced input for split supply operation. 2.2 Amplifier Configuration A simplified schematic of the evaluation board is shown in Figure 1 on page 3. The input stage with the components supplied is shown in Figure 3. The circuit implements a Hi-Z differential input with unbalanced common-mode impedance. The differential amplifier gain is expressed in Equation 1: (EQ. 1) V OUT = V IN+ V IN- R F R IN + V REF For a single-ended input with an inverting gain G = -1V/V, the IN+ input is grounded and the signal is supplied to the IN- input. VREF must be connected to a reference voltage between the V+ and V- supply rails. For a non-inverting operation with G = 11V/V, the negative input (IN-) is grounded and the signal is supplied to the positive input (IN+). The non-inverting gain is strongly dependent on any resistance from IN- to GND. For good gain accuracy, a Ω resistor should be installed on the empty R 11 pad. UG139 Rev.. Page 4 of 13

5 2. Functional Description 2.3 User-Selectable Options Component pads are included to enable a variety of user-selectable circuits to be added to the amplifier inputs, the VREF input, outputs, and the amplifier feedback loops. A voltage divider can be added to establish a power supply-tracking common-mode reference using the VREF input. The inverting and noninverting inputs have additional resistor and capacitor placements for adding input attenuation or feedback capacitors (Figure 3). The outputs (Figure 4) also have additional resistor and capacitor placements for filtering and loading. Note: Operational amplifiers are sensitive to output capacitance and may oscillate. In the event of oscillation, reduce output capacitance by using shorter cables, or add a resistor in series with the output. C 6 C 23 IN-A R 2 R 6 Ω R 11 R 14 1kΩ R 2 R 39 1kΩ FROM OUT_A TO IN-A IN+A R 5 1kΩ C 7 R 15 Ω R 21 Figure 3. Input Stage TO IN+A OUT_A C 14 R 51 Ω R 55 R 59 J13 OUT A C 15 R 67 R 63 Ω Figure 4. Output Stage UG139 Rev.. Page 5 of 13

6 3. PCB Layout Guidelines 3. PCB Layout Guidelines Analog circuits can conduct noise through paths that connect it to the outside world. To minimize the effects of any noise through the power lines, it is recommended to decouple the power supply pins (V+ and V-). If the trace lines to the power supply pins are long, it is recommended to place high frequency decoupling capacitors (such as.1µf) right next to the power supply in, and a larger capacitor value (such as 1µF) at the point of entry for the power supply. 3.1 ISL71218MEVAL1Z Evaluation Board Figure 5. ISL71218MEVAL1Z Evaluation Board UG139 Rev.. Page 6 of 13

7 UNNAMED_1_BNC4G_I89_IN1 UNNAMED_1_BNC4G_I9_IN1 UNNAMED_1_BNC4G_I88_IN1 UNNAMED_1_BNC4G_I87_IN1 UNNAMED_1_SMRES_I12_B UNNAMED_1_SMRES_I12_B UNNAMED_1_SMCAP_I133_B UNNAMED_1_SMCAP_I12_B UNNAMED_1_SMCAP_I11_A UNNAMED_1_SMCAP_I127_B UNNAMED_1_SMCAP_I127_A UNNAMED_1_SMRES_I129_A UNNAMED_1_SMRES_I111_B UNNAMED_1_SMCAP_I29_B UNNAMED_1_SMCAP_I27_A UNNAMED_1_SMRES_I13_B UG139 Rev.. Page 7 of ISL71218MEVAL1Z Schematic Diagram J1 IN- A J2 IN+ A J3 IN- B J4 IN+ B R IN_A OUT_B R IN_A -IN_B R2 1K 4 5 V- +IN_B ISL71218MBZ R7 VREF V- V+ VREF C4 1UF C6.1UF C7.1UF R21 C3 AND C5 CLOSE TO PART R3 R4 R9 R16 R18 R5 1K 1K C1 J5 R11 1 J6 1 2 R15 J8 1 J9 J1 C2 1UF C3.1UF C5.1UF D1 3 U1 1 8 OUTA V+ R8 R6 R12 R13 1K 1K J7 1K C1 1K R17 1K R14 DRAWN BY: RELEASED BY: Figure 6. ISL71218MEVAL1Z Schematic R19 R2 C8 C9 R22 TIM KLEMANN C11 R23 C12 R24 DATE: ENGINEER: 8/1/217 KIRAN BERNARD DATE: TITLE: J12 OUT A J11 OUT B ISL71218SR ISL71218MEVAL1Z 3. PCB Layout Guidelines

8 3. PCB Layout Guidelines 3.3 Bill of Materials 3.4 Board Layout Table 1. ISL71218SRHMEVAL1Z Components Parts List Device # Description Comments C2, C4 CAP, SMD, 121, 1µF, 5V, 1%, X7R, ROHS Power supply decoupling C3, C6 CAP, SMD, 85,.1µF, 5V, 1%, X7R, ROHS Power supply decoupling C5, C7 CAP, SMD, 63,.1µF, 5V, 1%, X7R, ROHS Power supply decoupling C1, C8-C12 CAP, SMD, 63, -PLACE HOLDER, ROHS User selectable capacitors - not populated D1 DIODE-RECTIFIER, SMD, SOD-123, 2P, 4V,.5A, Reverse power protection ROHS U1 ISL71218MBZ, DUAL OP-AMP, 8Ld. SOIC R1, R2, R5-R8, R14, R2, R23, R24, RESISTOR, SMD, 63,.1%, MF, -PLACE HOLDER User selectable resistors - not populated R3, R2-R22 RES, SMD, 63,, 1/1W,TF, ROHS Zero ohm user selectable resistors R4, R1, R17, R18 RES, SMD, 63, 1k, 1/1W, 1%, TF, ROHS Gain resistors R1, R12, R13, R16 RES, SMD, 63, 1k, 1/1W, 1%, TF, ROHS Gain resistors Figure 7. Silkscreen UG139 Rev.. Page 8 of 13

9 3. PCB Layout Guidelines Figure 8. Top Layer Figure 9. Bottom Layer UG139 Rev.. Page 9 of 13

10 V OUT (V) V OUT (V) ISL71218MEVAL1Z 4. Typical Performance Curves 4. Typical Performance Curves Normalized Gain (db) V S = ±15V C L = 4pF A V = +1 V OUT = 1mV P-P 1k R L =, 1k, 1k 1k Frequency (Hz) R L = 1k R L = 499 R L = 1 R L = k 1M 1M Frequency (Hz) Figure 1. Gain vs Frequency vs R L, V S = ±15V Figure 11. Gain vs Frequency vs R L, V S = ±5V Normalized Gain (db) V S = ±5V C L = 4pF A V = +1 V OUT = 1mV P-P 1k R L =, 1k, 1k 1k R L = 1k R L = 499 R L = 1 R L = k 1M 1M V OH V OL V S = ±15V A V = 2 R F = R G = 1k V IN = ±7.5V-DC 2-55 C 4-4 C 6 8 C +25 C I-Force (ma) Figure 12. Output Voltage Swing vs Load Current, V S = ±15V C +75 C 18 V OH V OL V S = ±5V A V = 2 R F = R G = 1k V IN = ±2.5V-DC -55 C -4 C C +25 C +125 C +75 C I-Force (ma) Figure 13. Output Voltage Swing vs Load Current, V S = ±5V V S = ±15V A V = 1 R L = 2k C L = 4pF Time (µs) Time (µs) Figure 14. Large Signal 1V Step Response, V S = ±15V Figure 15. Large Signal 4V Step Response, V S = ±5V V S = ±5V A V = 1 R L = 2k C L = 4pF UG139 Rev.. Page 1 of 13

11 V OUT (V) ISL71218MEVAL1Z 4. Typical Performance Curves Time (µs) V S = ±15V AND V S = ±5V A V = 1, R L = 2k C L = 4pF Figure 16. Small Signal Transient Response, V S = ±5V, ±15V UG139 Rev.. Page 11 of 13

12 5. Revision History 5. Revision History Rev. Date Description. Initial release Copyright Intersil Americas LLC 217. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the document is current before proceeding. For information regarding Intersil Corporation and its products, see UG139 Rev.. Page 12 of 13

13 UG139

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