A Low-power APUF-based Environmental Abnormality Detection Framework

Transcription

1 A Low-power APUF-based Envronmental Abnormalty Detecton Framework Hongxang Gu, Teng Xu and Modrag Potkonjak Computer Scence Department Unversty of Calforna, Los Angeles Los Angeles, Calforna Emal: {hxgu, xuteng, Abstract Physcal unclonable functons (PUFs) take advantage of the effect of process varaton on hardware to obtan ther unclonablty. Tradtonal PUF desgn only focuses on the analog sgnals of crcuts. An arbter PUF, for example, generates responses by racng delay sgnals. Implementatons of such PUFs usually employ large area and power consumpton whle provdng very low throughput. To address ths problem, we propose an energy effcent PUF desgn n such a way that t races analog sgnals and computes dgtal logc smultaneously. More mportantly, the analog porton of the crcut (racng) shares a large amount of hardware resources wth the dgtal porton of the crcut (computng) by ntroducng only small overhead n terms of area and power. Our test results on Spartan-6 feld-programmable gate array (FPGA) platforms ndcate that by combnng the two outputs, our desgn enables much larger PUF output throughput, better randomness and less power consumpton compared to tradtonal PUFs. I. INTRODUCTION The massve deployment of moble reconfgurable devces has mposed a hgh-relablty requrement. It has become necessary that these devces should operate relably rrespectve of the change n the external operatng envronment. In order to montor the relablty of these moble reconfgurable devces, measurement of physcal operatng parameters lke on-chp power supply voltages and de temperatures s desred n many stuatons. An alarm should be rased whenever the relablty s compromsed due to abnormal or extreme operatng envronment. Envronmental abnormaltes are dangerous because, on the one hand, sudden change n the envronment could ndcate faulty hardware (crcut short) or logc falure (excessve swtchng); on the other hand, abrupt varaton could also be caused by a varety of physcal attack methods, puttng the ntegrty of the operaton and the ntellectual property embedded n the hardware at the frnge of danger. In both cases, notfcaton of such changes s desred to avod further damage. Conventonally, detecton of abnormal varatons requres on-chp temperature and voltage sensors. However, sensor-based montor system has ts drawbacks such as relatvely hgh power consumpton and low sample rate. As a matter of fact, many low-end reconfgurable devces lke Internet of thngs(iot) nodes do not have such sensors embedded. Thus, a low cost, hgh accuracy abnormal envronment /17/$31.00 c 2017 IEEE detecton method s desred to montor moble devces wthout the help of temperature and voltage sensors. APUF, a unque type of hardware securty prmtve that has been used n many securty applcatons, has excellent propertes nclude low power and hgh speed. However, APUFs suffer from the notorous reputaton of nstablty and envronmental senstvty. Challenge-response mappng for a specfc APUF s usually not stable: the mappng changes as envronmental factors vares. Slght change n temperature and voltage could lead to the unpredctable remappng of many CRP. Several APUF-based securty applcatons ntend to mnmze the mpact ntroduced by nstablty usng stable CRP selecton or error correcton code (ECC). Whle consderable efforts are seekng to elmnate the problem, we see the envronmentally senstve nature of an APUF as an opportunty. The nstablty due to envronmental changes can be exploted to detect abnormaltes durng the operaton cycle of a protected hardware. We propose to use an APUF as an envronmental abnormalty detector. The core desgn dea s based on the observaton that changes n an APUF s challenge-response mappng mply a hghly probable varaton n operatng voltage or temperature. We propose to montor the remappng actvty of only ESCRPs nstead to save addtonal energy and latency. Our desgn s advantageous comparng to current sensor-based system montors for the followng three reasons: Implementaton s flexble. Detecton of envronmental varaton s not a must for all applcatons. Our detecton framework can be mplemented or removed easly on reconfgurable hardware dependng on user s demand. Hgh sample frequency. Many abnormaltes only affect the devce for a few clock cycles, current system montor sample rates on Xlnx Vrtex devces (200kHz maxmum) fals to detect these varatons. Our APUF-based framework s capable of samplng at a much hgher frequency (around 10 Mhz n our mplementaton). Low power and compact sze. Our detecton framework requres only a sngle APUF to detect abnormaltes, whch grants us a huge advantage n terms of area and power. After careful off-lne ESC seed generaton and alarm threshold calbratons, the system provdes comparable detecton rates wth state-of-the-art detecton mechansm.

2 II. RELATED WORK A. Physcal Unclonable Functons PUF was frst proposed by Pappu et al. usng mesoscopc optcal systems [1]. Gassend et al. developed the frst slcon PUF through the use of ntrnsc process varaton n deep submcron ntegrated crcuts [2]. More recently, efforts have been made to enhance the securty and randomness of PUFs. A robust PUF desgn s proposed by Xu et al. wth a selected PUF challenge-response set [3]. A low power hgh randomness PUF desgn was proposed by Gu et al. by combnng classc PUFs wth hardware random number generators [4]. Xu et al. also proposed to manpulate programmable delay lnes to ncrease the PUF stablty [5]. All past PUF studes n the lterature ntended to reduce envronmental mpact on PUFs. To the best of our knowledge, we are the frst to propose a mechansm that utlzes PUF s envronmental senstvty as a tool. B. System Montor Many efforts have been made to montor the physcal parameters of a reconfgurable system. Xlnx has embedded ther System Montor n ther recent FPGA products wth relatvely low sample rate [6]. Le Masle and Luk ntroduced a rng oscllator-based attack detecton system that montors the core power of a crcut through observng the behavor of embedded rng-oscllators [7]. Even though the rng oscllatorbased power montor framework s capable of detectng abnormaltes at a much hgher sample rate, t s also much larger n sze. Despte the exstng studes, our proposed APUF-based abnormalty detecton framework s capable of achevng hgh sample rate whle remanng smple, compact and low power. A. APUF Model III. PRELIMINARIES The PUF we use n our abnormalty detecton framework s standard delay-based APUFs. An n-bt APUF takes an n-bt challenge as nput and produces a 1-bt response as output. When an n-bt challenge s provded to the APUF, two dentcally desgned paths are generated along a chan of multplexer pars. Each challenge bt controls whether the par of paths should swap postons. A par of multplexers s denoted as an APUF segment. To retreve a response, an mpulse sgnal s fed nto the system to excte both paths smultaneously. Because of the uncontrollable process varaton, the sgnal travelng along one of the two paths wll Assumng an APUF maps challenges C to correspondng responses R. The APUF has n segments meanng all challenges C are n-bt long. We assume no delays on the connecton wres and all delays are contrbuted by the APUF segments. Gven a specfc challenge c C, the th APUF segments generates a par of delays wth delay dfference of d c. In a stable envronment, the correspondng response r R can be mathematcally represented as: { 0 f n r = dc > 0 1 f n dc < 0 (1) In real lfe, however, envronmental varatons change the delay dfference n each APUF segment. For smplcty purposes, we assume that a mnor change n envronmental would change the delay dfference n the th segment by d e where d e [ e, e], e s the maxmum change each delay dfference could be altered n a normal operatonal envronment. d e s a functon of temperature t and voltage v. Due to onchp temperature and voltage gradent, t, v are dfferent from segment to segment. When provded wth a specfc challenge c C, the response r R can be mathematcally represented by { 0 f n r = dc + de > 0 1 f n dc + de < 0 (2) Noted that our abnormalty detecton framework s not lmted to only standard APUF, many other delay-based PUFs lke rng oscllator PUFs serve our need as well. However, APUF s more envronmentally senstve, more compact and low power comparng to rng oscllator-based PUFs, so n ths work, our desgn and mplementaton are entrely based on the above APUF structure. IV. CRP ENVIRONMENTAL SENSITIVITY Physcal propertes of transstors vary as envronment changes, thus a large number of APUF CRPs are senstve to fluctuatons n physcal parameters. In ths secton, we frst dscuss correlatons between CRP consstences and physcal parameters n the operatng envronment. We then present a method to collect a set of ESCRP wth strong correlaton wth envronmental parameters. We ntend to show that the CRP nconsstency n APUFs can serve as a good ndcator of envronment varatons. We defne CRP nconsstency as the probablty for a correspondng response beng nverted when the challenge remans unchanged. A. Envronmental Varaton Operatng envronment s a general concept that ncludes all on and off chp physcal condtons durng the process of an operaton. Humdty, room temperature, supply power all play an mportant role durng the process of logc operatons on a reconfgurable devce. In ths paper, we manly focus on studyng on-chp voltage and temperature. We carefully examne the core temperature and voltage levels n a reconfgurable platform and ther relatonshp wth the on-chp APUF CRP nconsstency. 1) Core Temperature vs. CRP nconsstency: Core temperature can be fluctuated by many factors ncludng but not lmted to crcut swtchng actvty, room temperature, heat snk effcency etc. A sudden, unntended and sgnfcant ncrease or decrease n the core temperature s defned as temperature abnormalty. Temperature abnormaltes could result n crcut behavor alternaton, hardware malfuncton or even physcal damage. APUF serves as an excellent temperature abnormalty detector because transstor delays are senstve to temperature. Change n transstor delays potentally nvert the sgnal racng results between two delay paths n an APUF.

3 (a) Core temperature( C) vs. average (b) VCCINT(V) vs. average APUF CRP nconsstency(%) for 100 randomly selected challenges. of 100 randomly selected CRP nconsstency(%) for for a set challenges. Fg. 1: A snppet of core envronment change vs. nconsstency of randomly selected APUF CRPs. The y-axs on the left s core temperature correspondng to the blue lne, the y-axs on the rght s the average CRP nconsstency correspondng to the red lne. We frst randomly selected 1,000, bt bnary strngs as our test challenge set. Each challenge wthn the test challenge set s repeatedly fed to the 64-bt APUF mplemented on a Vrtex-5 FPGA. We adopt the majorty votng scheme to decde on a standard response. For a challenge C, f a majorty of the correspondng responses s R, the tuple (C, R) s recorded as the reference CRP. All reference CRPs are stored n a dctonary Dct CRP. Core temperature s beng sampled and recorded smultaneously usng on-chp sensors. A set of 100 challenges were beng evaluated between every two sensor samples. Each set s beng evaluated for 1,000 samples untl beng replaced by a new set of 100 challenges. Fgure 1a shows a snppet of our experment. The blue lne s the core temperature gathered from the bult-n SYSMON hard macro. The red lne s the average nconsstency of a set of 100 test CRPs. After the 50th sample, we ntentonally ncrease the core temperature by 5 C usng excessve swtchng crcuts [8]. An ntutve concluson can be drawn from the fgure that the pattern of both core temperature (blue lne) and average CRP nconsstency (red lne) are correlated. Analyss on the entre CRP test set shows that the CRP nconsstency and collected core temperature are correlated wth a correlaton coeffcent of When the core temperature ncreases, a rse n CRP nconsstency occurs. The nconsstency falls back as the core temperature recovers. The 5 C ncrement n the core temperature leads to approxmately 13.5% ncrement n CRP nconsstency. However, the CRP test set s chosen at random n our experment, a large number of stable and ultra unstable CRPs were ncluded. Stable CRPs are always consstent regardless of the ncrement n the core temperature, thus greatly reduces the envronmental senstvty of the APUF. Ultra unstable CRPs on the other hand always provde near 50% nconsstency, whch add addtonal nose to our evaluaton. 2) Core Voltage vs. CRP nconsstency: Core supply voltage nsde a reconfgurable devce s not statc. In most cases, core supply voltage VCCINT vares n a tolerable range. Many events could lead to abnormal varatons n VCCINT: smple power analyss(spa) could lead to an abnormal decrease n the VCCINT snce power measurement tool ntroduces addtonal resstance to the power ral; Electrostatc dscharge(esd) could lead to abnormal ncrement on VCCINT etc. APUF serves as a good VCCINT detector because a slght varaton n supply power results n the remappng of some CRP n APUF, thus by actvely montorng the mappng of APUF CRP nconsstency, varatons n nternal supply power can be detected through calculaton on CRP nconsstency. We produce a SPA scenaro that results n a sudden decrease n VCCINT. The experment Vrtex-5 board uses a power module(ti TPS54620) to provde power to FPGA core wth the nternal supply voltage(vccint). The power module s essentally a buck converter that generates output voltage 0.8V < V out < 15V. Fgure 2 shows a smplfed dagram of the module modfed by us. We produce a SPA attack by addng an addtonal swtch resstor to modfy VCCINT drectly through the power module. VCCINT can be nstantly decreased by openng the swtch SW to add a resstor R SW nto the crcut. The output voltage of the power module before openng the swtch SW can be calculated usng equaton 3. When mmckng the probe nserton, we open the swtch SW and the output voltage VCCINT can thus be calculated usng equaton 4. VCCINT = R 1 V ref R 2 + V ref (3) VCCINT = (R sw + R 1 ) V ref R 2 + V ref (4) VIN BOOT PH TPS54620 VSENSE GND Thermal Pad Cboot Co Lo VCCINT SW R sw R 1 Fg. 2: VCCINT Power Module, when swtch SW s open resstor R SW s nserted nto the power ral. Xlnx Vrtex-5 allows VCCINT to vary as much as 5% [9]. We use three confguratons of R SW. The replacement of resstors s capable of changng the VCCINT by 2.08%, 4.26%, and 5.37%. We apply the same evaluaton as the prevous experment on the same 1,000,000 randomly selected test challenges and observe the relatonshp between CRP nconsstency and VCCINT. A vsualzed result for CRP nconsstency for a sudden change of 5.37% n VCCINT s shown n fgure 1b. After the 150th voltage sensor sample, the swtch s opened so that VCCINT decreased from 0.986V to 0.935V. We observe that the average CRP nconsstency ncreased from 23% to roughly 41% nconsstency, whch later drops back to 22% as we closed the swtch and restored VCCINT back to 0.986V. R 2

4 B. Envronmentally Senstve CRP The above evaluaton above shows that CRP nconsstency n an APUF s correlated wth core temperature and supply voltage. However, the correlaton s not strong enough to meet our applcaton needs. After revew the whole CRP set, we conclude that not all CRPs are equally senstve to the envronment. Based on the notaton gven n equaton 1 and 2, we defne stable, ultra unstable and ESCRPs as below. A stable challenge produces consstent response regardless of operatng envronment. A stable CRP appears f one or more segments domnate over all remanng segments so that the fnal delay dfference s suffcently large enough to overcome delay varatons. Stable challenges can be defned as: ( d c ) > d e for all possble d e (5) so that the APUF generate the same response regardless of envronmental varaton. Our APUF mplementaton shows that roughly 30% of CRPs are stable. An ultra unstable challenge on the other hand creates two paths wth near zero delay dfference. Ths can be represented by: d c + d e 0 for d e [ e, e] (6) Wth the gven challenge, there s a near 50% probablty that the correspondng response would be a 1 or a 0. Our APUF mplementaton shows that roughly 5-10% of CRPs are ultra unstable. For the purpose of beng an ndcator of envronmental changes, we are prmarly nterested n searchng for envronmentally senstve challenges(escs) that nether produces a stable nor completely unpredctable response. An deal ESC should at least fulfll the followng two condtons: 1) ( d c ) < d e for d e [ e, e] (7) 2) when so that no domnatng segment group exsts n the APUF, and envronmental varatons could possbly nvert the response. d c + d e 0 for d e [ e, e] (8) At a gven envronment the response s stable n a normal operaton envronment. In addtonal to the prevous two requrements, an deal ESC should be able to obtan an nverted response when the envronment vares to an abnormal range: 3. sgn( d c + d e ) = sgn( d c + d e ) for d e [ e, e] and d e > e or d e < e. (9) (a) Core temperature( C) vs. (b) VCCINT(Volt) vs. APUF CRP APUF CRP nconsstency(%) for nconsstency(%) for a set of 100 a set of 100 ESCs. ESCs. Fg. 3: Core envronment change leads to varatons n nconsstences of ESCRP. The y-axs on the left s core temperature correspondng to the blue lne, the y-axs on the rght s the average CRP nconsstency correspondng to the red lne. In our experment, we defned normal operatng envronment as: 1. core temperature T = 30.5 ± 5 C, 2. VCCINT = 1 ± 0.5V. From the 1,000,000 test challenge set, we observe that no challenge fulflls all three requrements for ESCs. Nonunform physcal propertes over the chp makes qualfyng both equaton 8 and 9 extremely dffcult. We relaxed the requrement on these two condtons by 30% meanng allowng at most 30% volatons n both equatons. Thus we are able to collect 10,000 qualfed CRPs out of a 1,000,000 random challenge set. We repeated the evaluaton wth only these challenges agan and a snppet of the result can be seen n fgure 3. Fgure 3a shows the CRP nconsstency of the ESCRPs (red lne) dramatcally ncreases when the core temperature (blue lne) s ntentonally ncreased through crcut swtchng. The correlaton coeffcent between CRP nconsstency and core temperature ncreased from to , much hgher comparng to usng a random challenge set. The average CRP nconsstency ncreased from 23% to roughly 79.8% nconsstency when we ncrease the core temperature to 37.5 C, whch later drops back to 22% as swtchng crcuts cool down. A smlar observaton can be made as we close the swtch and change VCCINT nstantly. The average nconsstency of the selected CRPs nstantly changed to over 80%. Comparng to randomly selected CRPs, these senstve CRPs response much faster and dramatc due to the fact that stable CRPs have been elmnated. We conclude that ESCRPs are much effcent and envronmentally senstve when usng APUF as envronmental varaton ndcator. C. ESC Set Generaton APUFs serve as a good envronmental varaton detector when ESCs are appled. Snce ESCs are dfferent from APUF to APUF and there s no general pattern n them, acqurng a large set of ESCs at run tme s no trval task. We present an effcent, two-step method to collect such a large set of ESCs. We frst do a random search to collect a sngle ESC seed usng evoluton strateges (descrbed n Algorthm 1). Evoluton strateges method s nspred by the evolutonary adaptaton of a populaton of ndvduals to

5 certan envronmental condtons. When applyng evoluton strateges on ESC generaton, one ndvdual n the populaton s a specfc challenge vector and mutaton on a ndvdual s defned as randomly flppng multple bts. The envronmental ftness of the ndvdual s determned by the consstency of the correspondng PUF response under a small envronmental varaton benchmark where envronment factors vary beyond tolerable range usng swtchng crcut/power ral resstor. The tolerable range s defned by the user based on the nature of the applcaton. The pseudocode of ESC exploraton s descrbed n Algorthm 1) Algorthm 1 Explore ESC seed Requre: (1) Number of canddates n the parent generaton µ. (2) Number of canddate solutons generated from the parent generaton λ. (3) Expected ESC set sze κ (4) A ftness evaluaton functon EvaluatePopulaton(). (5) A mutaton rate τ. (6) Maxmum number of generatons M. Ensure: A set of ESCs S best. Populaton IntalzePopulaton(µ). EvaluatePopulaton(Populaton) S best GetBest(Populaton, κ) whle < M do Chldren for j = 0 to λ do P arent j = GetParent(Populaton, j) S j Mutate(P arent j, τ) Chldren S j end for EvaluatePopulaton(Chldren) S best GetBest(Populaton+S best, κ) Populaton SelectBest(Populaton, Chldren, µ) = + 1. end whle Return(S best ) We observe that when nvertng a small number of bts n an ESC seed, the new challenge s most lkely to stay envronmentally senstve due to the fact that nearby transstor process varatons are somewhat correlated. We thus generate more ESCs by randomly nvertng a small number of bts n the ESC seed (descrbed n Algorthm 2). Algorthm 2 Generate ESC set Create empty challenge set ESC, defne the number of the sze of the ESC set m, and a growth ndex. An ESC seed esc s taken as an nput Count = 0 whle Count m do for k n range() do Randomly flps k bts n esc to obtan c k Count Add c k Count to ESC end for Count += 1 end whle A. System Desgn V. THE DETECTION FRAMEWORK Fgure 4 shows a hgh level mplementaton of APUF-based abnormalty detecton framework. The detecton framework conssts of three major modules. The challenge querer s used to generate challenges, and feed them nto the APUF at run-tme. Before the actual runtme detecton, a calbraton process generates an ESC seed off-lne usng algorthm 1. The challenge querer generates a set of ESCs usng algorthm 2 at run-tme. A random number generator embedded nsde of the challenge querer decdes at each clock cycle whch bts should be nverted. The APUF process the same challenge multple tmes and send all generated responses to the response verfer module. The APUF tself resdes mmedately next to the logc beng montored to acheve the best accuracy. The response verfer calculates the CRP nconsstency by countng the frequency of response nverson, and rase an alarm f the nconsstency exceeds a user defned threshold. Snce all ESCs are correlated, the 0 and 1 dstrbuton are also very smlar, thus a sngle counter s enough for countng and recordng bt nversons. The alarm threshold s recommended to be set to the selected ESC s fulfllment rate of equaton 8 and 9, however t s adjustable as the defnton of the normal operatonal envronment may be subject to change based on user requrement. Abnormalty Detecton Logc Challenge Querer APUF Response Verfer Logc Fg. 4: APUF-based abnormalty detecton framework. B. Expermental Results In ths secton we carefully evaluate our abnormalty detecton framework. Our experments are conducted on two Genesys boards. The Genesys board has a Vrtex-5 LX50 FPGA. The system s tested wth an mplementaton of an RSA-1024 and an AES- 128 crypto-system [10]. A mxture of 1,000 abnormal core temperature and VCCINT was appled durng a 10-hour long operaton. In our settng, an abnormalty n core temperature s defned as a varaton of over 5 C and an abnormalty n VCCINT s defned as a varaton of over 5%. We generated three dstnctve challenge sets, respectvely 1,000 random challenges(rc), a sngle ESC seed, and 1,000 ESCs derved from the ESC seed. The ESC seed s generated based on our

6 Vrtex-5 SYSMON[6] Our desgn on Vrtex-5 RO-based montor [7] Our desgn on Spartan-6 Sample rate 200kHz 200kHz 8MHz 8MHz LUTs Flp-flops unknown 57 Slces Power(mW) (estmated) 29 TABLE I: FPGA resource and power characterstcs: Vrtex-5 SYSMON vs. our desgn on Vrtex-5 vs. RO-based on-chp power montor vs. our desgn on Spartan-6. ADC and analog sensor area and power are not ncluded n calculaton. requrement on core temperature and VCCINT, whch n our case s our defnton of the normal range of temperature and VCCINT defned above. The alarm threshold s set to rase an alarm when CRP nconsstency reaches 40% for 1,000 random challenges, 70% for both sngle ESC seed and 1,000 ESCs case. A UART core s used to montor the real-tme CRP nconsstency and communcates wth RSA/AES cores. The results are dsplayed n Table II. Crcut 1,000 RC Sngle ESC 1,000 ESC AES / / /2.1 RSA / / /1.1 TABLE II: Abnormalty detecton: true postve rate (%)/false postve rate(%) usng 1,000 random challenges vs. sngle ESC vs. 1,000 ESCs as challenge set per sample. APUFs are placed mmedately besdes the montored crcut. A mxture of 1,000 abnormal temperature and VCCINT were appled to the protected crcut. We observe that 1,000 ESC challenge set provdes the best detecton rate whle random CRPs provdes the worst. ESCs beneft from the elmnaton of stable and ultra unstable challenges. Wth a good ESC seed, we are capable of achevng a true postve rate of 100% wth 1,000 generated ESCs at runtme, whle the false postve rate s as low as 1.1%. C. Area and Power We compare our desgn s area and power overhead wth both Xlnx System Montor [6] and rng oscllator-based power montor[7]. Snce Xlnx System Montor only supports Vrtex famly product and Le Masle s rng oscllatorbased power montor was orgnally mplemented on Spartan-6 LX45, we mplement our desgn on both platforms for comparson purposes. The sample rate for Vrtex-5 mplementatons s fxed to 200kHz whle the mplantaton on Spartan-6 devces has a sample rate of 8MHz. The FPGA resource and power characterstcs for Xlnx System Montor, rng oscllator-based power montor and our desgn are shown n table I. Our desgn uses 63% less FPGA area comparng to Xlnx System Montor logcs whle achevng 13% of power savngs. To be noted that we do not nclude area and power of both analog sensor and ADC n the SYSMON hard macro n our calculaton due to lack of nformaton. The actual savng s expected to be more. Comparng to Le Masle s rng oscllatorbased power montor, our desgn s 98.4% smaller. Snce APUF does not mpose hgh swtchng actvtes lke rng oscllators, our desgn consumes only 1.5% of the power. VI. CONCLUSION In concluson, we dscovered that APUF CRP nconsstency s hghly correlated wth the core temperature and voltage on reconfgurable platforms. Based on the observaton we desgned a framework to utlze the envronmental senstvty of APUFs to detect suspcous operatonal envronment varatons. We propose to apply only ESCs on a gven APUF to effcently and accurately detect envronmental abnormaltes. When ntegrated wth an AES-128 and an RSA-1024 mplementaton, our framework s capable of detectng 100% of appled abnormaltes wth false postve rate as low as 1.1%. Our desgn provdes compettve detecton rate wth both sensor-based Xlnx System Montor and Le Masle s rng oscllator-based power montor whle usng much less hardware and power. VII. ACKNOWLEDGEMENT Ths work was supported n part by the NSF under award CNS , and award CNS REFERENCES [1] R. Pappu, B. Recht, J. Taylor, and N. Gershenfeld, Physcal one-way functons, Scence, vol. 297, no. 5589, pp , [2] B. Gassend, D. Clarke, M. Van Djk, and S. Devadas, Slcon physcal random functons, n Proceedngs of the 9th ACM conference on Computer and communcatons securty. ACM, 2002, pp [3] T. Xu and M. Potkonjak, Robust and flexble FPGA-based dgtal PUF, n Feld Programmable Logc and Applcatons (FPL), th Internatonal Conference on. IEEE, 2014, pp [4] H. Gu, T. Xu, and M. Potkonjak, An Energy-Effcent PUF Desgn: Computng Whle Racng, n Proceedngs of the 2016 Internatonal Symposum on Low Power Electroncs and Desgn. ACM, 2016, pp [5] T. Xu, H. Gu, and M. Potkonjak, An ultra-low energy PUF matchng securty platform usng programmable delay lnes, n Reconfgurable Communcaton-centrc Systems-on-Chp (ReCoSoC), th Internatonal Symposum on. IEEE, 2016, pp [6] Xlnx, Vrtex-5 FPGA System Montor User Gude, Xlnx. [7] A. Le Masle and W. Luk, Detectng power attacks on reconfgurable hardware, n 22nd Internatonal Conference on Feld Programmable Logc and Applcatons (FPL). IEEE, 2012, pp [8] M. Happe, H. Hangmann, A. Agne, and C. Plessl, Eght ways to put your FPGA on frea systematc study of heat generators, n Reconfgurable Computng and FPGAs (ReConFg), 2012 Internatonal Conference on. IEEE, 2012, pp [9] Xlnx, Vrtex-5 FPGA Data Sheet:DC and Swtchng Characterstcs, Xlnx. [10] Cryptographc Hardware Project - cores, accessed: