Acoustic Stimulation Test System (ASTS) for UUVs
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1 Acoustic Stimulation Test System (ASTS) for UUVs Presented To: Presented By: ITEA Mr. Steven J. Barnett ARL Penn State Date: April 26, 2012
2 Introduction What is it? History and Evolution Derivative of UWEF Description Conclusion Cost vs Benefit
3 Block Diagram Real Time Hardware In The Loop (SUT) Sonar, Signal, and Tactical 6 ¾, 12 ¾, and 21 fixtures Stimulation Analog/DSP Subsystems Active & Passive Targets Multiple Highlights/Echoes Reverberation Emissions Flow Noise Acoustic Controller Console Program Target Dynamics Input Torpedo Dynamics Acoustic parameters to DSP Subsystem Recordings/Display Autopilot Interface Initiation UUV kinematics
4 History UWEF Undersea Weapon Evaluation Facility Installation approximately 1992 time frame Support in water tests Water filled pressure vessel allows full power transmit Completely assembled units Allow operation of engine, propulsor, actuators, and acoustic subsystems ASTS Acoustic Stimulation Test System Derivative of the UWEF acoustic subsystem Installation approximately 1994 time frame Support developmental in water tests Water filled array enclosure Standard atmospheric pressure No engine, propulsor or actuators Only acoustic subsystems
5 Array and Enclosure Approximately 10 x 10 x 10 Anechoic internally Reverberant Externally Array and Enclosure
6 Array Interface Projector Sensor Power Amplifier Four inputs DSP Subsystem (1) in band channel (2) external channels Control Interface Filters, gain, tuning Selectable band pass sampling reconstruction filters 18 bit D/A plus 0, 24, 48, 72 db One of four tuning networks Receiver Sensor Transmit Monitor Isolated interface Input and Output Selectable band pass sampling filters Programmable gain (2) stages for noise optimization
7 DSP Subsystem Nodes Acoustic Controller Console Interface Target and SUT parameters from Acoustic Controller Console Assign spatial, temporal, and spectral aspects of echoes and reverberation Executive Controller Time base and associated signals Data transfer between nodes Analog subsystem control link Passive Generator Generates passive target signals Audio Provides audio sensory perception to target acoustic field Transmit Generator Processes and stores SUT transmit signal Provides echo and reverberation signals Target Projector (Summer) Processes and outputs composite target signal Compensation Minimizes amplitude and delay variations between channels
8 Acoustic Controller Console Receive kinematic variables from the UUV autopilot Linear and Angular Position and Velocity Vectors Other LAUNCH, Time, etc. Target Updates kinematic variables based on usersupplied GUI parameters Update Display graphics Calculate Acoustic parameters based on target and UUV positions and orientations to DSP Subsystem Provides user interface Modify target parameters Record data; Test Visualization
9 Conclusion Derivative of UWEF implemented in early 1990s UWEF successfully supported in water evaluation tests ASTS successfully supported many technology development programs at ARL Penn State prior to in water tests Reliable Minimal maintenance for ~ 20 years DURIP and Director provided for DSP subsystem upgrade Acoustic OR Electrical interface a possibility Summary Assume $100K per in water run/test Less than (10) would provide complete upgrade plus Huge amount of test data with varied parameters, i.e. what if scenarios, troubleshooting, AND Greatly improve UUV Guidance System performance and chances of success prior to even performing a range test
10 Acknowledgements Lynn A. Poole Retired from ARL as Hardware/Systems Engr. System Engineer, Architect, and Project Lead for Acoustic UWEF/ASTS Mentor & Teacher Consultant L.A. Poole Engineering Dr. Robert Marciniak Program Manager at ARL Penn State PM for the UWEF program Dr. Teresa McMullen ONR Sponsor Instrumental in supporting DURIP effort Dr. Russell Burkhardt Office head of UWO at ARL Penn State Supported DURIP effort at ARL
11 Questions
12 Backup Slides
13 Array Topside Aerial View of the ASTS Array Target Projector Receiver Hydrophone
14 Overview Real Time Hardware In the Loop System Under Test (SUT) Sonar, Signal, & Tactical Processor Autopilot Internal or external Non Intrusive External Interface Autopilot or Tactical Controller Test Fixture 6 ¾, 12 ¾, 21 Real Time Hardware In the Loop ASTS Provides realistic spatial, temporal, and spectral acoustic field Active, passive, reverberation, and target emissions Programmed target parameters from console
15 DSP Subsystem Components Target Projector Node Adapt Mode User Inputs Mode from ACC Adapt NOT during tests Performed independently on each channel 10 seconds Weights stored in ACC workstation Filter then uses weights as FIR in Normal mode Removes projector channel variations in amplitude and time delay
16 DSP Subsystem Components Target Projector Node Normal/Run Mode External (In-Band) (1) per projector element Receives Executive Controller Broadcasts Complex Passive, Active, Reverb Doppler Shift Active Target & UUV velocity Reverb UUV velocity Angle Scalar multiplier based on Target angle Projector definition Level Scalar multiplier based on Target range Power amp discrete gain Summation of signal components Passive, Active, Reverb, Ext. 256 Tap Complex FIR Translate Compensation/Equalization FIR Power Amplifier
17 DSP Subsystem Components Transmit Generator Node (1) per receiver element 16 bit digitizer 256 Tap Complex FIR Decimate Doppler Shift UUV velocity at transmit Transmit Generator ACC Interface Transmit detection Target assignment Based on spatial location of transmitted pulse (Transmit Generator) AND target Reverberation assignment Based on spatial location of transmitted pulse (Transmit Generator) Status Active target model Up to (8) user defined Amplitude and delay coefficients operate on received pulse Summation of results Reverberation model Up to (8) user defined Time varying weights based on real in water data Sparse FIR implementation 16 taps Random dither in level, angle, Doppler
18 DSP Subsystem Components Executive Controller Node Time base Programmable base band, carrier, A/D, and D/A control signals Counter provides time slot information Interfaces to, and responsible for, data transfer between all subsystem nodes Reads data from nodes Broadcast data to all nodes Process, format, and send control words over link to all analog subsystem components
19 Overview (Cont.) Real Time Hardware In the Loop ASTS Receiver senses, conditions, processes, and stores pulse transmitted by SUT DSP Subsystem Reverberation User defined models Spatial coverage determined by receiver sensors ensonified during transmit and subsequent heading Doppler Randomness from dither applied to level, angle, doppler Target Echoes User defined models Output at appropriate time based on target controller of Acoustic Controller Console (ACC)
20 Overview (Cont.) Projector outputs reverberation as well as target echoes, emissions, and radiated noise SUT processes projected field and provides steering commands to autopilot Autopilot provides UUV kinematic updates from Digital Body Simulator to ACC. ACC updates UUV and target parameters No timely and costly turnaround allows repeated what if tests SUT open loop tests too
21 Array Interface Projector Sensor - Power Amplifier (2) One in band Channel Synchronous 18 bit D/A Converter Selectable Band Pass Filter (4) each Two in band or out of band inputs Asynchronous 18 bit D/A Converter each Selectable Band Pass Filter (2) each Variable gain 0 to 96 db,.375 db per step; Mute Summation Variable gain 0 db, 24 db, 48 db, OR 72 db Power Amplifier One of four tuning networks
22 Array Interface (Cont.) Receiver Sensor Transmit Monitor Isolated I/O with fixed gain plus Programmable Gain Nominal 46 db per stage Placement allows optimization for noise Selectable Frequency Bands (4) boards in motherboard (2) LC filters per board 8 (1) Active filter per board 4 Combined LC and Active
23 Array Interface (Cont.) Flow-Noise Generator Selectable base frequency 8 bits 48 tap PRN w/fir Programmable gain (8) independent channels (4) channels per board (2) boards
24 DSP Subsystem Overview Processor Engine Commercial board from LSI Single Motorola 20Mhz 32K x 24 Each Program RAM; X Data RAM; Y Data RAM (2) A/Ds and (2) D/As Synchronous Serial Interface (SSI) Independent transmit and receive SPI ports Daughter Board Custom designed by ARL (3) Motorola DSP56200 FIR ICs 2K x 24 Ping Pong RAM
25 DSP Subsystem Overview Node Daughter Board mated to Processor Engine Fundamental building block of subsystem Modularity Used for Sensor Processing Projector and Receiver Internal Subsystem Data Transfer between nodes External Subsystem Data Transfer to Acoustic Controller Console and Analog Subsystem Passive Auxiliary Recording/Display Code Implementation Assembler for real time operation Three primary rates Base band (f b ); Carrier (f c ); Time slot (f t )
26 DSP Subsystem Overview (Cont.) Chassis Standard rack mount (2) AT Backplanes for Node communication Processor Engine Daughterboard Expandable Requires (2) expansion adapters
27 DSP Subsystem Components Acoustic Controller Console Interface (ACCI) Node Interface with Acoustic Controller Console (ACC) SUT parameters Position Attitude or Orientation Linear velocity Angular rates Target parameters Active, passive, and emission levels Based on loss models in ACC Horizontal and Vertical Target Angles Doppler
28 Upgrade Overview Original system implemented in early 1990s Obsolescence; Aging Limited funds for maintenance and upgrades since that time Technology enhancements Bandwidth, Console Awarded DURIP 2008 Scope limited to DSP Subsystem and Console DURIPs primarily limited to material NOT labor DSP boards PCI/PCI X with PMC interface from Bittware A/D boards General Standards w/pmc interface
29 Upgrade DSP Subsystem Processor Engine (4) Analog Devices TigerSHARC 600Mhz 64M x 64 Cluster bus; ¾ M x 32 Internal Virtex II FPGA provides flexible off board routing (4) link ports per processor (2) per processor routed to Rocket I/O board connectors; (2) internal communications Local PCI communications Daughter Board A/D General Standards OR Custom FPGA with I/O drivers to support SPI peripherals; FIR
30 Upgrade DSP Subsystem (Cont.) Original interfaces kept in tact to the extent possible Analog subsystem interfaces Allows use of available custom test fixtures DSP Subsystem architecture Similar to original (1) processor per node ACCI, Executive Controller, passive, audio, and sensor(s) (4) nodes per board Local PCI facilitates communications between boards Uses DMA Controllers
31 Upgrade DSP Subsystem (Cont.) Level of Effort (2) Custom boards Low to Medium FPGA development Medium to High Two unique developments of Spartan III Modifications of Virtex II Pro Software development Largest task Generate requirements based on existing assembler code Implementation of C code for 28 processors Integration and Test (8) months Ready for integration pending preliminary maintenance work at ASTS facility
32 Upgrade Acoustic Controller Console Dell PC Workstation w/winxp CAN Interface for UUV autopilot communications Custom PCI board for interface to DSP subsystem Code development environment C/C++ Qt Graphical User Interface (GUI) Level of Effort Software development in C++ Large Generate requirements for acoustic parameter processing, formatting, interface to DSP subsystem, and GUI Implementation (8) months Integrated to DSP subsystem
33 ASTS/UWEF Pictures Receivers Power Amplifiers DSP Subsystem Conditioned AC Power
34 ASTS/UWEF Pictures Side View 21 Test Fixture Collar Heavyweight Tubing w/experiment Cables Noise Ring Assembly
35 ASTS/UWEF Pictures Bottom View 21 Test Fixture Collar Heavyweight Tubing w/experiment Cables Noise Ring Assembly
36 ASTS Upgrade Acoustic Controller Console GUI Input Circular Geometry
37 ASTS Upgrade Acoustic Controller Console GUI Display - Circular Geometry
38 ASTS Upgrade Acoustic Controller Console GUI Input Straight-Line Geometry
39 GUI Display Straight-Line Geometry ASTS Upgrade Acoustic Controller Console
40 ASTS Upgrade Acoustic Controller Console GUI Input Wake Follow Geometry
41 GUI Display Wake Follow Geometry ASTS Upgrade Acoustic Controller Console
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