Spectral Monitoring/ SigInt

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1 RF Test & Measurement Spectral Monitoring/ SigInt Radio Prototyping Horizontal Technologies LabVIEW RIO for RF (FPGA-based processing) PXI Platform (Chassis, controllers, baseband modules) RF hardware building blocks synthesizers, microwave components, 1

2 Communications Design (initial prototype) Low Cost Flexible Portable Radio (design verification) Calibration Low Phase Noise Precise measurement Real-time High Bandwidth 2

3 Communications Design in LabVIEW LabVIEW Modulation Toolkit Analog and Digital modulation formats AM, FM, PM ASK, FSK, MSK, GMSK, PAM, PSK, QAM Custom Visualization 2D and 3D Eye, Trellis, Constellation Modulation Analysis BER, MER, EVM, burst timing, frequency deviation, ρ (rho) Impairments Additive White Gaussian Noise (AWGN) DC offset, Quadrature skew, IQ gain imbalance, phase noise Equalization, Channel Coding, Channel Models 3

4 FPGA Processing with NI FlexRIO Xilinx Virtex-5 SXT-series FPGAs Direct access to FPGA GPIO Use with adapter module for I/O Peer-to-peer streaming 800 MB/s across PXI Express backplane 16 simultaneous streams Onboard DRAM 2x 256 MB banks 1.6 GB/s per bank Enhanced Synchronization Share PXI 10 MHz reference clock or DSTAR_A with adapter module 4

5 Field Programmable Gate Array (FPGA) PROGRAMMABLE INTERCONNECT I/O BLOCK Source: Xilinx CONFIGURABLE LOGIC BLOCK (CLB) A semi-conductor device containing many gates (logic devices). A wiring list downloaded to the FPGA determines the gate connections and the functionality. 5 5

6 LabVIEW FPGA Code Abstraction Counter Analog I/O I/O with DMA LabVIEW FPGA VHDL ~4000 lines 6

7 How: From LabVIEW to Hardware Translation Optimization Synthesis Bit Stream VHDL Generation Analysis Logic Reduction Place and Route Timing Verification Generation Download / Run 7

8 LabVIEW FPGA IPNet ni.com/ipnet Maths Signal Processing Data Manipulation and Transfer RF and Communications Digital Protocols Data Acquisition Signal Generation Control Sensor Simulation Encryption More than 200 IP cores and examples Vision 8

9 IP Integration Node Use Core Generator or Custom VHDL Configure IP Integration Node and Generate Simulation Model Use the IP Block Using Standard LabVIEW I/O Interfaces 9

10 Direct Access to Preexisting Xilinx CORE Generator IP Libraries 10

11 NI PXI Express System Streaming Rates 800 MB/s 700 MB/s 700 MB/s Streaming to/from Controller Memory Can sustain 7 unidirectional streams at 800 MB/s for a total of 5.6GB/s Streaming to/from Disk Can sustain 4 streams at 700 MB/s for 2.8GB/s/direction (5.6GB/s total system) Peer-to to-peer Streaming Can sustain 8 streams at 700 MB/s for 5.6GB/s/direction (11.2GB/s total system)

12 Host PC FPGA Vector Signal Generator Payload Generation Coding Modulation Arbitrary Waveform Generater Upconverter An example... Payload Analysis Demodulation RF OUTPUT Decoding RF INPUT RF INPUT Diversity Processing Downconverter Downconverter Digitiser Digitiser Vector Signal Analyser Vector Signal Analyser 12 Shared Local Oscillator

13 PXIe-8133 PXIe-7965R PXIe-5663 Payload Generation Coding Modulation Arbitrary Waveform Generater Upconverter An example... Payload Analysis Demodulation RF OUTPUT Decoding RF INPUT RF INPUT Diversity Processing Downconverter Downconverter Digitiser Digitiser PXIe-5673 PXIe Shared Local Oscillator

14 NI-Ettus Research USRP : Universal Software Radio Peripheral Most popular R&D platform for SDR / Communications PC-hosted computation: USB 2.0 / Gigabit Ethernet GNU Radio the gnu software radio C++ 14

15 Signal Processing (PC) Software Radio Receiver TX SMA? RX SMA 15 BUS

16 Software Radio Receiver RX SMA I( t)cos(2π f t) + Q( t)sin(2π f t) Amp Tunable Oscillator f c c Mixer 0 o 90 o Mixer I(t) Q(t) ADC ADC c BUS Signal Processing (PC) f c = center frequency of interest 16

17 Software Radio Receiver RX 1 SMA RX 2 SMA Switch Amp Support multiple antennas 900 MHz Tunable Oscillator Mixer 0 o 90 o Mixer LPF LPF 40 MHz LPF Antialiasing filters ADC ADC 100 MS/s ADC BUS 1 Gb Ethernet Signal Processing (PC) Low pass filters chosen to be below 50MHz Nyquist criteria. 17

18 Software Radio Receiver RX 1 SMA RX 2 SMA Switch Amp 900 MHz Tunable Oscillator Mixer 0 o 90 o Mixer LPF LPF 40 MHz LPF ADC ADC 100 MS/s ADC 3.2 Gb/s BUS 1 Gb Ethernet Signal Processing (PC) Data Rate Calculation: 100 Million Samples/sec x 16 bits/sample x 2 = 3.2 Gigibits/second BUS = 1 Gb Ethernet down-conversion is needed to ~ 25 MS/s or less. 18

19 Software Radio Receiver RX 1 SMA RX 2 SMA Switch Amp 900 MHz Tunable Oscillator Mixer 0 o 90 o Mixer LPF LPF 40 MHz LPF ADC ADC 100 MS/s ADC FPGA DDC: Digital Down-converter DDC: Digital Down-converter RX Control BUS 1 Gb Ethernet Signal Processing (PC) Data Rate Calculation: 100 Million Samples/sec x 16 bits/sample x 2 = 3.2 Gigibits/second BUS = 1 Gb Ethernet down-conversion is needed to ~ 25 MS/s or less. 19

20 Radio NI USRP System Diagram RX 1 TX 1 SMA RX 2 SMA Switch Amp Tunable Oscillator Amp Mixer 0 o 90 o Mixer Mixer 0 o 90 o Mixer LPF LPF LPF LPF DAC DAC ADC ADC Digital Upconverter DUC: Digital Up-converter FPGA DDC: Digital Down-converter DDC: Digital Down-converter TX Control RX Control BUS Signal Processing (PC) Tunable Oscillator NI USRP-2920 System Diagram 20

21 PXI RF System NI PXI-2598NI PXI-5690 RF Switch Gain/Attenuator NI PXIe-5611 RF Upconverter NI PXIe-5450 RF Signal Generator NI PXIe-8133 Controller NI PXI-5652 NI PXI-5690 NI PXIe-5601 RF Downconverter NI PXI-5652 RF Signal Generator NI PXIe-5622 RF Signal Analyzer NI PXIe-1075 Chassis 21

22 NI USRP Tunable RF Transceiver Front Ends Frequency Range 50 MHz 2.2 GHz (NI-2920) 2.4 GHz & 5.5 GHz (NI-2921) Signal Processing and Synthesis NI LabVIEW to develop and explore algorithms NI Modulation Toolkit and LabVIEW add-ons to simulate or process live signals Applications FM Radio TV GPS GSM ZigBee Safety Radio OFDM Passive Radar Dynamic Spectrum Access 1 Gigabit Ethernet to PC Plug-and-play capability Up to 25 MS/s baseband IQ streaming 22

23 NI-USRP Driver Software Initialize Configure Start Read IQ Stop Close 23

24 NI-USRP Driver Software Initialize Configure Start Read IQ Stop Close 24

25 Teaching Lab Packet Radio & OFDM Digital Communications Labs by Dr. Robert Heath, UT Austin Communications Systems Labs by Dr. Sachin Katti, Stanford 1 AWGN Simulator 2.1 Modulation /Demodulation 2.2 Pulse Shaping 3 Energy Detection 4 Equalization 5 Frame Detection 6 Intro to OFDM 7 Frequency Correction & Sync 8 OFDM Channel Coding 1 Source Coding 2 Packet Communication, Sync, and Channel Correction 3 Modulation 4 Demodulation 5 Design Challenge: Packet based Transceiver (Ships in Bundle) (FREE: ni.com/courseware) 25

26 Digital Communication System Source Coding Channel Coding Modulation Upconversion Communications Channel Downconversion Demodulation Channel Decoding Source Decoding 26

27 Digital Communication System NI Modulation Toolkit NI Modulation Toolkit 27

28 Digital Communication System NI Modulation Toolkit NI USRP NI Modulation Toolkit NI USRP 28

29 Stanford University - Networked Systems Group Needs: Exposure to real-world signals Recruit students to RF/Communications early Prepare students for research Solution: SDR Platform Lower learning curve Maintainable Affordable The course evaluations for our class was fantastic. Students rated the class 4.94/5.0, likely one of the highest ratings among all classes in the School of Engineering at Stanford. Dr. Sachin Katti, ECE Stanford, C 29

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